(* -=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-= *) (* Interpret.ma: Operational semantics for the 8051/8052 processor. *) (* -=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-= *) include "ASM/ASM.ma". include "ASM/Arithmetic.ma". include "ASM/BitVectorTrie.ma". include "basics/russell.ma". definition Time ≝ nat. inductive SerialBufferType: Type[0] ≝ Eight: Byte → SerialBufferType | Nine: Bit → Byte → SerialBufferType. inductive LineType: Type[0] ≝ P1: Byte → LineType | P3: Byte → LineType | SerialBuffer: SerialBufferType → LineType. (* What is a continuation, now? *) inductive SFR8051: Type[0] ≝ SFR_SP: SFR8051 | SFR_DPL: SFR8051 | SFR_DPH: SFR8051 | SFR_PCON: SFR8051 | SFR_TCON: SFR8051 | SFR_TMOD: SFR8051 | SFR_TL0: SFR8051 | SFR_TL1: SFR8051 | SFR_TH0: SFR8051 | SFR_TH1: SFR8051 | SFR_P1: SFR8051 | SFR_SCON: SFR8051 | SFR_SBUF: SFR8051 | SFR_IE: SFR8051 | SFR_P3: SFR8051 | SFR_IP: SFR8051 | SFR_PSW: SFR8051 | SFR_ACC_A: SFR8051 | SFR_ACC_B: SFR8051. definition sfr_8051_index ≝ λs: SFR8051. match s with [ SFR_SP ⇒ O | SFR_DPL ⇒ 1 | SFR_DPH ⇒ 2 | SFR_PCON ⇒ 3 | SFR_TCON ⇒ 4 | SFR_TMOD ⇒ 5 | SFR_TL0 ⇒ 6 | SFR_TL1 ⇒ 7 | SFR_TH0 ⇒ 8 | SFR_TH1 ⇒ 9 | SFR_P1 ⇒ 10 | SFR_SCON ⇒ 11 | SFR_SBUF ⇒ 12 | SFR_IE ⇒ 13 | SFR_P3 ⇒ 14 | SFR_IP ⇒ 15 | SFR_PSW ⇒ 16 | SFR_ACC_A ⇒ 17 | SFR_ACC_B ⇒ 18 ]. inductive SFR8052: Type[0] ≝ SFR_T2CON: SFR8052 | SFR_RCAP2L: SFR8052 | SFR_RCAP2H: SFR8052 | SFR_TL2: SFR8052 | SFR_TH2: SFR8052. definition sfr_8052_index ≝ λs: SFR8052. match s with [ SFR_T2CON ⇒ O | SFR_RCAP2L ⇒ 1 | SFR_RCAP2H ⇒ 2 | SFR_TL2 ⇒ 3 | SFR_TH2 ⇒ 4 ]. (* -=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-= *) (* Processor status. *) (* -=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-= *) record PreStatus (M: Type[0]) (code_memory: M) : Type[0] ≝ { low_internal_ram: BitVectorTrie Byte 7; high_internal_ram: BitVectorTrie Byte 7; external_ram: BitVectorTrie Byte 16; program_counter: Word; special_function_registers_8051: Vector Byte 19; special_function_registers_8052: Vector Byte 5; p1_latch: Byte; p3_latch: Byte; clock: Time }. definition Status ≝ PreStatus (BitVectorTrie Byte 16). definition PseudoStatus ≝ PreStatus (pseudo_assembly_program). lemma sfr8051_index_19: ∀i: SFR8051. sfr_8051_index i < 19. # i cases i normalize repeat (@ le_S_S) @ le_O_n qed. lemma sfr8052_index_5: ∀i: SFR8052. sfr_8052_index i < 5. # i cases i normalize repeat (@ le_S_S) @ le_O_n qed. definition set_clock ≝ λM: Type[0]. λcode_memory:M. λs: PreStatus M code_memory. λt: Time. let old_low_internal_ram ≝ low_internal_ram ?? s in let old_high_internal_ram ≝ high_internal_ram ?? s in let old_external_ram ≝ external_ram ?? s in let old_program_counter ≝ program_counter ?? s in let old_special_function_registers_8051 ≝ special_function_registers_8051 ?? s in let old_special_function_registers_8052 ≝ special_function_registers_8052 ?? s in let old_p1_latch ≝ p1_latch ?? s in let old_p3_latch ≝ p3_latch ?? s in mk_PreStatus M code_memory old_low_internal_ram old_high_internal_ram old_external_ram old_program_counter old_special_function_registers_8051 old_special_function_registers_8052 old_p1_latch old_p3_latch t. definition set_p1_latch ≝ λM: Type[0]. λcode_memory:M. λs: PreStatus M code_memory. λb: Byte. let old_low_internal_ram ≝ low_internal_ram ?? s in let old_high_internal_ram ≝ high_internal_ram ?? s in let old_external_ram ≝ external_ram ?? s in let old_program_counter ≝ program_counter ?? s in let old_special_function_registers_8051 ≝ special_function_registers_8051 ?? s in let old_special_function_registers_8052 ≝ special_function_registers_8052 ?? s in let old_p3_latch ≝ p3_latch ?? s in let old_clock ≝ clock ?? s in mk_PreStatus M code_memory old_low_internal_ram old_high_internal_ram old_external_ram old_program_counter old_special_function_registers_8051 old_special_function_registers_8052 b old_p3_latch old_clock. definition set_p3_latch ≝ λM: Type[0]. λcode_memory:M. λs: PreStatus M code_memory. λb: Byte. let old_low_internal_ram ≝ low_internal_ram ?? s in let old_high_internal_ram ≝ high_internal_ram ?? s in let old_external_ram ≝ external_ram ?? s in let old_program_counter ≝ program_counter ?? s in let old_special_function_registers_8051 ≝ special_function_registers_8051 ?? s in let old_special_function_registers_8052 ≝ special_function_registers_8052 ?? s in let old_p1_latch ≝ p1_latch ?? s in let old_clock ≝ clock ?? s in mk_PreStatus M code_memory old_low_internal_ram old_high_internal_ram old_external_ram old_program_counter old_special_function_registers_8051 old_special_function_registers_8052 old_p1_latch b old_clock. definition get_8051_sfr ≝ λM: Type[0]. λcode_memory:M. λs: PreStatus M code_memory. λi: SFR8051. let sfr ≝ special_function_registers_8051 ?? s in let index ≝ sfr_8051_index i in get_index_v … sfr index ?. @ sfr8051_index_19 qed. definition get_8052_sfr ≝ λM: Type[0]. λcode_memory:M. λs: PreStatus M code_memory. λi: SFR8052. let sfr ≝ special_function_registers_8052 ?? s in let index ≝ sfr_8052_index i in get_index_v … sfr index ?. @ sfr8052_index_5 qed. definition set_8051_sfr ≝ λM: Type[0]. λcode_memory:M. λs: PreStatus M code_memory. λi: SFR8051. λb: Byte. let index ≝ sfr_8051_index i in let old_low_internal_ram ≝ low_internal_ram ?? s in let old_high_internal_ram ≝ high_internal_ram ?? s in let old_external_ram ≝ external_ram ?? s in let old_program_counter ≝ program_counter ?? s in let old_special_function_registers_8051 ≝ special_function_registers_8051 ?? s in let old_special_function_registers_8052 ≝ special_function_registers_8052 ?? s in let new_special_function_registers_8051 ≝ set_index Byte 19 old_special_function_registers_8051 index b ? in let old_p1_latch ≝ p1_latch ?? s in let old_p3_latch ≝ p3_latch ?? s in let old_clock ≝ clock ?? s in mk_PreStatus M code_memory old_low_internal_ram old_high_internal_ram old_external_ram old_program_counter new_special_function_registers_8051 old_special_function_registers_8052 old_p1_latch old_p3_latch old_clock. @ (sfr8051_index_19 i) qed. definition set_8052_sfr ≝ λM: Type[0]. λcode_memory:M. λs: PreStatus M code_memory. λi: SFR8052. λb: Byte. let index ≝ sfr_8052_index i in let old_low_internal_ram ≝ low_internal_ram ?? s in let old_high_internal_ram ≝ high_internal_ram ?? s in let old_external_ram ≝ external_ram ?? s in let old_program_counter ≝ program_counter ?? s in let old_special_function_registers_8051 ≝ special_function_registers_8051 ?? s in let old_special_function_registers_8052 ≝ special_function_registers_8052 ?? s in let new_special_function_registers_8052 ≝ set_index Byte 5 old_special_function_registers_8052 index b ? in let old_p1_latch ≝ p1_latch ?? s in let old_p3_latch ≝ p3_latch ?? s in let old_clock ≝ clock ?? s in mk_PreStatus M code_memory old_low_internal_ram old_high_internal_ram old_external_ram old_program_counter old_special_function_registers_8051 new_special_function_registers_8052 old_p1_latch old_p3_latch old_clock. @ (sfr8052_index_5 i) qed. definition set_program_counter ≝ λM: Type[0]. λcode_memory:M. λs: PreStatus M code_memory. λw: Word. let old_low_internal_ram ≝ low_internal_ram ?? s in let old_high_internal_ram ≝ high_internal_ram ?? s in let old_external_ram ≝ external_ram ?? s in let old_special_function_registers_8051 ≝ special_function_registers_8051 ?? s in let old_special_function_registers_8052 ≝ special_function_registers_8052 ?? s in let old_p1_latch ≝ p1_latch ?? s in let old_p3_latch ≝ p3_latch ?? s in let old_clock ≝ clock ?? s in mk_PreStatus M code_memory old_low_internal_ram old_high_internal_ram old_external_ram w old_special_function_registers_8051 old_special_function_registers_8052 old_p1_latch old_p3_latch old_clock. definition set_code_memory ≝ λM,M': Type[0]. λcode_memory:M. λs: PreStatus M code_memory. λr: M'. let old_low_internal_ram ≝ low_internal_ram ?? s in let old_high_internal_ram ≝ high_internal_ram ?? s in let old_external_ram ≝ external_ram ?? s in let old_program_counter ≝ program_counter ?? s in let old_special_function_registers_8051 ≝ special_function_registers_8051 ?? s in let old_special_function_registers_8052 ≝ special_function_registers_8052 ?? s in let old_p1_latch ≝ p1_latch ?? s in let old_p3_latch ≝ p3_latch ?? s in let old_clock ≝ clock ?? s in mk_PreStatus M' r old_low_internal_ram old_high_internal_ram old_external_ram old_program_counter old_special_function_registers_8051 old_special_function_registers_8052 old_p1_latch old_p3_latch old_clock. definition set_low_internal_ram ≝ λM: Type[0]. λcode_memory:M. λs: PreStatus M code_memory. λr: BitVectorTrie Byte 7. let old_high_internal_ram ≝ high_internal_ram ?? s in let old_external_ram ≝ external_ram ?? s in let old_program_counter ≝ program_counter ?? s in let old_special_function_registers_8051 ≝ special_function_registers_8051 ?? s in let old_special_function_registers_8052 ≝ special_function_registers_8052 ?? s in let old_p1_latch ≝ p1_latch ?? s in let old_p3_latch ≝ p3_latch ?? s in let old_clock ≝ clock ?? s in mk_PreStatus M code_memory r old_high_internal_ram old_external_ram old_program_counter old_special_function_registers_8051 old_special_function_registers_8052 old_p1_latch old_p3_latch old_clock. definition set_high_internal_ram ≝ λM: Type[0]. λcode_memory:M. λs: PreStatus M code_memory. λr: BitVectorTrie Byte 7. let old_low_internal_ram ≝ low_internal_ram ?? s in let old_high_internal_ram ≝ high_internal_ram ?? s in let old_external_ram ≝ external_ram ?? s in let old_program_counter ≝ program_counter ?? s in let old_special_function_registers_8051 ≝ special_function_registers_8051 ?? s in let old_special_function_registers_8052 ≝ special_function_registers_8052 ?? s in let old_p1_latch ≝ p1_latch ?? s in let old_p3_latch ≝ p3_latch ?? s in let old_clock ≝ clock ?? s in mk_PreStatus M code_memory old_low_internal_ram r old_external_ram old_program_counter old_special_function_registers_8051 old_special_function_registers_8052 old_p1_latch old_p3_latch old_clock. definition set_external_ram ≝ λM: Type[0]. λcode_memory:M. λs: PreStatus M code_memory. λr: BitVectorTrie Byte 16. let old_low_internal_ram ≝ low_internal_ram ?? s in let old_high_internal_ram ≝ high_internal_ram ?? s in let old_program_counter ≝ program_counter ?? s in let old_special_function_registers_8051 ≝ special_function_registers_8051 ?? s in let old_special_function_registers_8052 ≝ special_function_registers_8052 ?? s in let old_p1_latch ≝ p1_latch ?? s in let old_p3_latch ≝ p3_latch ?? s in let old_clock ≝ clock ?? s in mk_PreStatus M code_memory old_low_internal_ram old_high_internal_ram r old_program_counter old_special_function_registers_8051 old_special_function_registers_8052 old_p1_latch old_p3_latch old_clock. definition get_cy_flag ≝ λM: Type[0]. λcode_memory:M. λs: PreStatus M code_memory. let sfr ≝ special_function_registers_8051 ?? s in let psw ≝ get_index_v Byte 19 sfr (sfr_8051_index SFR_PSW) ? in get_index_v bool 8 psw O ?. normalize @ (le_S_S ? ?) [ @ le_O_n | repeat (@ (le_S_S)); // ] qed. definition get_ac_flag ≝ λM: Type[0]. λcode_memory:M. λs: PreStatus M code_memory. let sfr ≝ special_function_registers_8051 ?? s in let psw ≝ get_index_v Byte 19 sfr (sfr_8051_index SFR_PSW) ? in get_index_v bool 8 psw 1 ?. normalize repeat (@ (le_S_S ? ?)) @ le_O_n qed. definition get_fo_flag ≝ λM: Type[0]. λcode_memory:M. λs: PreStatus M code_memory. let sfr ≝ special_function_registers_8051 ?? s in let psw ≝ get_index_v Byte 19 sfr (sfr_8051_index SFR_PSW) ? in get_index_v bool 8 psw 2 ?. normalize repeat (@ (le_S_S ? ?)) @ le_O_n qed. definition get_rs1_flag ≝ λM: Type[0]. λcode_memory:M. λs: PreStatus M code_memory. let sfr ≝ special_function_registers_8051 ?? s in let psw ≝ get_index_v Byte 19 sfr (sfr_8051_index SFR_PSW) ? in get_index_v bool 8 psw 3 ?. normalize repeat (@ (le_S_S ? ?)) @ le_O_n qed. definition get_rs0_flag ≝ λM: Type[0]. λcode_memory:M. λs: PreStatus M code_memory. let sfr ≝ special_function_registers_8051 ?? s in let psw ≝ get_index_v Byte 19 sfr (sfr_8051_index SFR_PSW) ? in get_index_v bool 8 psw 4 ?. normalize repeat (@ (le_S_S ? ?)) @ le_O_n qed. definition get_ov_flag ≝ λM: Type[0]. λcode_memory:M. λs: PreStatus M code_memory. let sfr ≝ special_function_registers_8051 ?? s in let psw ≝ get_index_v Byte 19 sfr (sfr_8051_index SFR_PSW) ? in get_index_v bool 8 psw 5 ?. normalize repeat (@ (le_S_S ? ?)) @ le_O_n qed. definition get_ud_flag ≝ λM: Type[0]. λcode_memory:M. λs: PreStatus M code_memory. let sfr ≝ special_function_registers_8051 ?? s in let psw ≝ get_index_v Byte 19 sfr (sfr_8051_index SFR_PSW) ? in get_index_v bool 8 psw 6 ?. normalize repeat (@ (le_S_S ? ?)) @ le_O_n qed. definition get_p_flag ≝ λM: Type[0]. λcode_memory:M. λs: PreStatus M code_memory. let sfr ≝ special_function_registers_8051 ?? s in let psw ≝ get_index_v Byte 19 sfr (sfr_8051_index SFR_PSW) ? in get_index_v bool 8 psw 7 ?. normalize repeat (@ (le_S_S ? ?)) @ le_O_n qed. definition set_flags ≝ λM: Type[0]. λcode_memory:M. λs: PreStatus M code_memory. λcy: Bit. λac: option Bit. λov: Bit. let sfr_psw ≝ get_8051_sfr ?? s SFR_PSW in let old_cy ≝ get_index_v ?? sfr_psw O ? in let old_ac ≝ get_index_v ?? sfr_psw 1 ? in let old_fo ≝ get_index_v ?? sfr_psw 2 ? in let old_rs1 ≝ get_index_v ?? sfr_psw 3 ? in let old_rs0 ≝ get_index_v ?? sfr_psw 4 ? in let old_ov ≝ get_index_v ?? sfr_psw 5 ? in let old_ud ≝ get_index_v ?? sfr_psw 6 ? in let old_p ≝ get_index_v ?? sfr_psw 7 ? in let new_ac ≝ match ac with [ None ⇒ old_ac | Some j ⇒ j ] in set_8051_sfr ?? s SFR_PSW [[ old_cy ; new_ac ; old_fo ; old_rs1 ; old_rs0 ; old_ov ; old_ud ; old_p ]]. [1,2,3,4,5,6,7,8: normalize repeat (@ le_S_S) @ le_O_n ] qed. definition initialise_status ≝ λM: Type[0]. λcode_mem: M. let status ≝ mk_PreStatus M code_mem (* Code mem. *) (Stub Byte 7) (* Low mem. *) (Stub Byte 7) (* High mem. *) (Stub Byte 16) (* Ext mem. *) (zero 16) (* PC. *) (replicate Byte 19 (zero 8)) (* 8051 SFR. *) (replicate Byte 5 (zero 8)) (* 8052 SFR. *) (zero 8) (* P1 latch. *) (zero 8) (* P3 latch. *) O (* Clock. *) in set_8051_sfr ?? status SFR_SP (bitvector_of_nat 8 7). definition sfr_of_Byte: Byte → option (SFR8051 + SFR8052) ≝ λb: Byte. let address ≝ nat_of_bitvector … b in if (eqb address 128) then None ? else if (eqb address 144) then Some … (inl … SFR_P1) else if (eqb address 160) then None ? else if (eqb address 176) then Some … (inl … SFR_P3) else if (eqb address 153) then Some … (inl … SFR_SBUF) else if (eqb address 138) then Some … (inl … SFR_TL0) else if (eqb address 139) then Some … (inl … SFR_TL1) else if (eqb address 140) then Some … (inl … SFR_TH0) else if (eqb address 141) then Some … (inl … SFR_TH1) else if (eqb address 200) then Some … (inr … SFR_T2CON) else if (eqb address 202) then Some … (inr … SFR_RCAP2L) else if (eqb address 203) then Some … (inr … SFR_RCAP2H) else if (eqb address 204) then Some … (inr … SFR_TL2) else if (eqb address 205) then Some … (inr … SFR_TH2) else if (eqb address 135) then Some … (inl … SFR_PCON) else if (eqb address 136) then Some … (inl … SFR_TCON) else if (eqb address 137) then Some … (inl … SFR_TMOD) else if (eqb address 152) then Some … (inl … SFR_SCON) else if (eqb address 168) then Some … (inl … SFR_IE) else if (eqb address 184) then Some … (inl … SFR_IP) else if (eqb address 129) then Some … (inl … SFR_SP) else if (eqb address 130) then Some … (inl … SFR_DPL) else if (eqb address 131) then Some … (inl … SFR_DPH) else if (eqb address 208) then Some … (inl … SFR_PSW) else if (eqb address 224) then Some … (inl … SFR_ACC_A) else if (eqb address 240) then Some … (inl … SFR_ACC_B) else None ?. definition get_bit_addressable_sfr: ∀M: Type[0]. ∀code_memory: M. ∀s: PreStatus M code_memory. Byte → bool → Byte ≝ λM: Type[0]. λcode_memory:M. λs: PreStatus M code_memory. λb: Byte. λl: bool. match sfr_of_Byte b with [ None ⇒ match not_implemented in False with [ ] | Some sfr8051_8052 ⇒ match sfr8051_8052 with [ inl sfr ⇒ match sfr with [ SFR_P1 ⇒ if l then p1_latch … s else get_8051_sfr … s SFR_P1 | SFR_P3 ⇒ if l then p3_latch … s else get_8051_sfr … s SFR_P3 | _ ⇒ get_8051_sfr … s sfr ] | inr sfr ⇒ get_8052_sfr M code_memory s sfr ] ]. definition set_bit_addressable_sfr: ∀M: Type[0]. ∀code_memory: M. ∀s: PreStatus M code_memory. Byte → Byte → PreStatus M code_memory ≝ λM: Type[0]. λcode_memory:M. λs: PreStatus M code_memory. λb: Byte. λv: Byte. match sfr_of_Byte b with [ None ⇒ match not_implemented in False with [ ] | Some sfr8051_8052 ⇒ match sfr8051_8052 with [ inl sfr ⇒ match sfr with [ SFR_P1 ⇒ let status_1 ≝ set_8051_sfr ?? s SFR_P1 v in set_p1_latch ?? s v | SFR_P3 ⇒ let status_1 ≝ set_8051_sfr ?? s SFR_P3 v in set_p3_latch ?? s v | _ ⇒ set_8051_sfr ?? s sfr v ] | inr sfr ⇒ set_8052_sfr ?? s sfr v ]]. lemma clock_set_bit_addressable_sfr: ∀M: Type[0]. ∀code_memory: M. ∀s: PreStatus M code_memory. ∀b: Byte. ∀v: Byte. clock … code_memory s = clock … code_memory (set_bit_addressable_sfr M code_memory s b v). #M #code_memory #s #b #v whd in match (set_bit_addressable_sfr ?????); cases (sfr_of_Byte ?) [1: normalize nodelta cases not_implemented |2: * * normalize nodelta % ] qed. lemma program_counter_set_bit_addressable_sfr: ∀M: Type[0]. ∀code_memory: M. ∀s: PreStatus M code_memory. ∀b: Byte. ∀v: Byte. program_counter … code_memory s = program_counter … code_memory (set_bit_addressable_sfr M code_memory s b v). #M #code_memory #s #b #v whd in match (set_bit_addressable_sfr ?????); cases (sfr_of_Byte ?) [1: normalize nodelta cases not_implemented |2: * * % ] qed. definition bit_address_of_register ≝ λM: Type[0]. λcode_memory:M. λs: PreStatus M code_memory. λr: BitVector 3. let b ≝ get_index_v … r O ? in let c ≝ get_index_v … r 1 ? in let d ≝ get_index_v … r 2 ? in let 〈 un, ln 〉 ≝ vsplit ? 4 4 (get_8051_sfr ?? s SFR_PSW) in let 〈 r1, r0 〉 ≝ 〈 get_index_v … 4 un 2 ?, get_index_v … 4 un 3 ? 〉 in let offset ≝ if ¬r1 ∧ ¬r0 then O else if ¬r1 ∧ r0 then 8 else if r1 ∧ r0 then 24 else 16 in bitvector_of_nat 7 (offset + (nat_of_bitvector ? [[ false ; b ; c ; d ]])). [1,2,3,4,5: normalize repeat (@ le_S_S) @ le_O_n; ] qed. definition get_register ≝ λM: Type[0]. λcode_memory:M. λs: PreStatus M code_memory. λr: BitVector 3. let address ≝ bit_address_of_register … s r in lookup ?? address (low_internal_ram … s) (zero 8). definition set_register ≝ λM: Type[0]. λcode_memory:M. λs: PreStatus M code_memory. λr: BitVector 3. λv: Byte. let address ≝ bit_address_of_register … s r in let old_low_internal_ram ≝ low_internal_ram ?? s in let new_low_internal_ram ≝ insert … address v old_low_internal_ram in set_low_internal_ram … s new_low_internal_ram. definition read_from_internal_ram ≝ λM: Type[0]. λcode_memory:M. λs: PreStatus M code_memory. λaddr: Byte. let 〈bit_one, seven_bits〉 ≝ vsplit bool 1 7 addr in let memory ≝ if head' … bit_one then (low_internal_ram ?? s) else (high_internal_ram ?? s) in lookup … seven_bits memory (zero 8). definition read_at_stack_pointer ≝ λM: Type[0]. λcode_memory:M. λs: PreStatus M code_memory. read_from_internal_ram M code_memory s (get_8051_sfr ?? s SFR_SP). definition write_at_stack_pointer ≝ λM: Type[0]. λcode_memory:M. λs: PreStatus M code_memory. λv: Byte. let 〈bit_one, seven_bits〉 ≝ vsplit bool 1 7 (get_8051_sfr ?? s SFR_SP) in if head' … 0 bit_one then let memory ≝ insert … seven_bits v (high_internal_ram ?? s) in set_high_internal_ram ?? s memory else let memory ≝ insert … seven_bits v (low_internal_ram ?? s) in set_low_internal_ram ?? s memory. definition set_arg_16': ∀M: Type[0]. ∀code_memory:M. ∀s:PreStatus M code_memory. Word → [[ dptr ]] → Σs':PreStatus M code_memory. clock ?? s = clock ?? s' ≝ λM,code_memory,s,v,a. match a return λx. bool_to_Prop (is_in ? [[ dptr ]] x) → Σs'. clock M ? s = clock M ? s' with [ DPTR ⇒ λ_:True. let 〈 bu, bl 〉 ≝ vsplit … 8 8 v in let status ≝ set_8051_sfr … s SFR_DPH bu in let status ≝ set_8051_sfr … status SFR_DPL bl in status | _ ⇒ λK. match K in False with [ ] ] (subaddressing_modein … a). // qed. definition set_arg_16: ∀M: Type[0]. ∀code_memory:M. ∀s:PreStatus M code_memory. Word → [[ dptr ]] → PreStatus M code_memory ≝ set_arg_16'. lemma set_arg_16_ok: ∀M,cm,s,v,x. clock M cm s = clock M cm (set_arg_16 M cm s v x). #M #cm #s #x #v whd in match set_arg_16; normalize nodelta @pi2 qed. definition get_arg_16: ∀M: Type[0]. ∀code_memory:M. PreStatus M code_memory → [[ data16 ]] → Word ≝ λm, cm, s, a. match a return λx. bool_to_Prop (is_in ? [[ data16 ]] x) → ? with [ DATA16 d ⇒ λ_:True. d | _ ⇒ λK. match K in False with [ ] ] (subaddressing_modein … a). definition get_arg_8: ∀M: Type[0]. ∀code_memory:M. PreStatus M code_memory → bool → [[ direct ; indirect ; registr ; acc_a ; acc_b ; data ; acc_dptr ; acc_pc ; ext_indirect ; ext_indirect_dptr ]] → Byte ≝ λm, cm, s, l, a. match a return λx. bool_to_Prop (is_in ? [[ direct ; indirect ; registr ; acc_a ; acc_b ; data ; acc_dptr ; acc_pc ; ext_indirect ; ext_indirect_dptr ]] x) → ? with [ ACC_A ⇒ λacc_a: True. get_8051_sfr ?? s SFR_ACC_A | ACC_B ⇒ λacc_b: True. get_8051_sfr ?? s SFR_ACC_B | DATA d ⇒ λdata: True. d | REGISTER r ⇒ λregister: True. get_register ?? s r | EXT_INDIRECT_DPTR ⇒ λext_indirect_dptr: True. let address ≝ (get_8051_sfr ?? s SFR_DPH) @@ (get_8051_sfr ?? s SFR_DPL) in lookup ? 16 address (external_ram ?? s) (zero 8) | EXT_INDIRECT e ⇒ λext_indirect: True. let address ≝ get_register ?? s [[ false; false; e ]] in let padded_address ≝ pad 8 8 address in lookup ? 16 padded_address (external_ram ?? s) (zero 8) | ACC_DPTR ⇒ λacc_dptr: True. let dptr ≝ (get_8051_sfr ?? s SFR_DPH) @@ (get_8051_sfr ?? s SFR_DPL) in let padded_acc ≝ pad 8 8 (get_8051_sfr ?? s SFR_ACC_A) in let 〈carry, address〉 ≝ half_add 16 dptr padded_acc in lookup ? 16 address (external_ram ?? s) (zero 8) | ACC_PC ⇒ λacc_pc: True. let padded_acc ≝ pad 8 8 (get_8051_sfr ?? s SFR_ACC_A) in let 〈 carry, address 〉 ≝ half_add 16 (program_counter ?? s) padded_acc in lookup ? 16 address (external_ram ?? s) (zero 8) | DIRECT d ⇒ λdirect: True. let 〈hd, seven_bits〉 ≝ vsplit bool 1 7 d in match head' … hd with [ true ⇒ get_bit_addressable_sfr m cm s (true:::seven_bits) l | false ⇒ lookup ? 7 seven_bits (low_internal_ram … s) (zero …) ] | INDIRECT i ⇒ λindirect: True. let 〈hd, seven_bits〉 ≝ vsplit bool 1 7 (get_register … s [[false;false;i]]) in match head' … hd with [ true ⇒ lookup ? 7 seven_bits (high_internal_ram … s) (zero …) | false ⇒ lookup ? 7 seven_bits (low_internal_ram … s) (zero …) ] | _ ⇒ λother. match other in False with [ ] ] (subaddressing_modein … a). definition set_arg_8: ∀M: Type[0]. ∀code_memory:M. ∀s:PreStatus M code_memory. ∀addr: [[ direct ; indirect ; registr ; acc_a ; acc_b ; ext_indirect ; ext_indirect_dptr ]]. Byte → PreStatus M code_memory ≝ λm, cm, s, a, v. match a return λx. bool_to_Prop (is_in ? [[ direct ; indirect ; registr ; acc_a ; acc_b ; ext_indirect ; ext_indirect_dptr ]] x) → PreStatus m cm with [ DIRECT d ⇒ λdirect: True. let 〈 bit_one, seven_bits 〉 ≝ vsplit ? 1 7 d in match head' … bit_one with [ true ⇒ set_bit_addressable_sfr ?? s (true:::seven_bits) v | false ⇒ let memory ≝ insert ? 7 seven_bits v (low_internal_ram ?? s) in set_low_internal_ram ?? s memory ] | INDIRECT i ⇒ λindirect: True. let register ≝ get_register ?? s [[ false; false; i ]] in let 〈bit_one, seven_bits〉 ≝ vsplit ? 1 7 register in match head' … bit_one with [ false ⇒ let memory ≝ insert … seven_bits v (low_internal_ram ?? s) in set_low_internal_ram ?? s memory | true ⇒ let memory ≝ insert … seven_bits v (high_internal_ram ?? s) in set_high_internal_ram ?? s memory ] | REGISTER r ⇒ λregister: True. set_register ?? s r v | ACC_A ⇒ λacc_a: True. set_8051_sfr ?? s SFR_ACC_A v | ACC_B ⇒ λacc_b: True. set_8051_sfr ?? s SFR_ACC_B v | EXT_INDIRECT e ⇒ λext_indirect: True. let address ≝ get_register ?? s [[ false; false; e ]] in let padded_address ≝ pad 8 8 address in let memory ≝ insert ? 16 padded_address v (external_ram ?? s) in set_external_ram ?? s memory | EXT_INDIRECT_DPTR ⇒ λext_indirect_dptr: True. let address ≝ (get_8051_sfr ?? s SFR_DPH) @@ (get_8051_sfr ?? s SFR_DPL) in let memory ≝ insert ? 16 address v (external_ram ?? s) in set_external_ram ?? s memory | _ ⇒ λother: False. match other in False with [ ] ] (subaddressing_modein … a). lemma clock_set_arg_8: ∀M,cm,s,x,v. clock M cm s = clock … (set_arg_8 M cm s x v). cases daemon qed. lemma program_counter_set_arg_8: ∀M,cm,s,x,v. program_counter M cm s = program_counter … (set_arg_8 M cm s x v). cases daemon qed. lemma p1_latch_set_arg_8: ∀M.∀cm.∀s.∀x: [[indirect; registr; acc_a; acc_b; ext_indirect; ext_indirect_dptr]]. ∀v. p1_latch M cm s = p1_latch … (set_arg_8 M cm s x v). [2: /2 by subaddressing_modein, orb_Prop_r/ ] #M #cm #s #x #v whd in match set_arg_8; normalize nodelta cases daemon qed. lemma p3_latch_set_arg_8: ∀M.∀cm.∀s.∀x: [[indirect; registr; acc_a; acc_b; ext_indirect; ext_indirect_dptr]]. ∀v. p3_latch M cm s = p3_latch … (set_arg_8 M cm s x v). [2: /2 by subaddressing_modein, orb_Prop_r/ ] #M #cm #s #x #v whd in match set_arg_8; normalize nodelta cases daemon qed. lemma special_function_registers_8052_set_arg_8: ∀M.∀cm.∀s.∀x: [[indirect; registr; acc_a; acc_b; ext_indirect; ext_indirect_dptr]]. ∀v. special_function_registers_8052 M cm s = special_function_registers_8052 … (set_arg_8 M cm s x v). [2: /2 by subaddressing_modein, orb_Prop_r/ ] #M #cm #s #x #v whd in match set_arg_8; normalize nodelta cases daemon qed. theorem modulus_less_than: ∀m,n: nat. (m mod (S n)) < S n. #n #m normalize @ le_S_S lapply (le_n n) generalize in ⊢ (?%? → ?(??%?)?); elim n in ⊢ (∀_:?. ??% → ?(?%??)?); [ normalize #n @ (less_than_or_equal_b_elim n m) normalize [ // | #H #K @(le_inv_ind ?? K …) [ # H1 < H1 // | #x #H1 #H2 #H3 destruct ] ] | normalize # y # H1 # n # H2 @ (less_than_or_equal_b_elim n m) normalize [ // | # K @ H1 cut (n ≤ S y → n - S m ≤ y) /2 by/ cases n normalize // # x # K1 lapply (le_S_S_to_le … K1) generalize in match m; elim x normalize // # w1 # H # m cases m normalize // # q # K2 @H /3/ ] ] qed. definition get_arg_1: ∀M: Type[0]. ∀code_memory:M. PreStatus M code_memory → [[ bit_addr ; n_bit_addr ; carry ]] → bool → bool ≝ λm, cm, s, a, l. match a return λx. bool_to_Prop (is_in ? [[ bit_addr ; n_bit_addr ; carry ]] x) → ? with [ BIT_ADDR b ⇒ λbit_addr: True. let 〈bit_1, seven_bits〉 ≝ vsplit … 1 7 b in match head' … bit_1 with [ true ⇒ let 〈four_bits, three_bits〉 ≝ vsplit bool 4 3 seven_bits in let trans ≝ true:::four_bits @@ [[false; false; false]] in let sfr ≝ get_bit_addressable_sfr ?? s trans l in get_index_v … sfr (nat_of_bitvector … three_bits) ? | false ⇒ let 〈four_bits, three_bits〉 ≝ vsplit bool 4 3 seven_bits in let address' ≝ [[true; false; false]]@@four_bits in let t ≝ lookup … 7 address' (low_internal_ram ?? s) (zero 8) in get_index_v … t (nat_of_bitvector … three_bits) ? ] | N_BIT_ADDR n ⇒ λn_bit_addr: True. let 〈bit_1, seven_bits〉 ≝ vsplit … 1 7 n in match head' … bit_1 with [ true ⇒ let 〈four_bits, three_bits〉 ≝ vsplit bool 4 3 seven_bits in let trans ≝ true:::four_bits @@ [[false; false; false]] in let sfr ≝ get_bit_addressable_sfr ?? s trans l in ¬(get_index_v ?? sfr (nat_of_bitvector … three_bits) ?) | false ⇒ let 〈four_bits, three_bits〉 ≝ vsplit bool 4 3 seven_bits in let address' ≝ [[true; false; false]]@@four_bits in let t ≝ lookup … 7 address' (low_internal_ram ?? s) (zero 8) in ¬(get_index_v … t (nat_of_bitvector … three_bits) ?) ] | CARRY ⇒ λcarry: True. get_cy_flag ?? s | _ ⇒ λother. match other in False with [ ] ] (subaddressing_modein … a). // qed. definition set_arg_1: ∀M: Type[0]. ∀code_memory:M. ∀s:PreStatus M code_memory. [[bit_addr; carry]] → Bit → PreStatus M code_memory ≝ λm: Type[0]. λcm. λs: PreStatus m cm. λa: [[bit_addr; carry]]. λv: Bit. match a return λx. bool_to_Prop (is_in ? [[bit_addr ; carry]] x) → ? with [ BIT_ADDR b ⇒ λbit_addr: True. let 〈bit_1, seven_bits〉 ≝ vsplit bool 1 7 b in match head' … bit_1 with [ true ⇒ let 〈four_bits, three_bits〉 ≝ vsplit bool 4 3 seven_bits in let trans ≝ true:::four_bits @@ [[false; false; false]] in let sfr ≝ get_bit_addressable_sfr … s trans true in let new_sfr ≝ set_index … sfr (nat_of_bitvector … three_bits) v ? in set_bit_addressable_sfr … s new_sfr trans | false ⇒ let 〈four_bits, three_bits〉 ≝ vsplit bool 4 3 seven_bits in let address' ≝ [[true; false; false]]@@four_bits in let t ≝ lookup ? 7 address' (low_internal_ram ?? s) (zero 8) in let n_bit ≝ set_index … t (nat_of_bitvector … three_bits) v ? in let memory ≝ insert ? 7 address' n_bit (low_internal_ram ?? s) in set_low_internal_ram … s memory ] | CARRY ⇒ λcarry: True. let 〈ignore, seven_bits〉 ≝ vsplit bool 1 7 (get_8051_sfr … s SFR_PSW) in let new_psw ≝ v:::seven_bits in set_8051_sfr ?? s SFR_PSW new_psw | _ ⇒ λother: False. match other in False with [ ] ] (subaddressing_modein … a). // qed. lemma set_arg_1_ok: ∀M,cm,s,x,v. clock M cm s = clock … (set_arg_1 M cm s x v). cases daemon qed. definition fetch_pseudo_instruction: ∀code_mem:list labelled_instruction. ∀pc:Word. nat_of_bitvector … pc < |code_mem| → (pseudo_instruction × Word) ≝ λcode_mem. λpc: Word. λpc_ok. let 〈lbl, instr〉 ≝ nth_safe … (nat_of_bitvector ? pc) … code_mem pc_ok in let new_pc ≝ add ? pc (bitvector_of_nat … 1) in 〈instr, new_pc〉. lemma snd_fetch_pseudo_instruction: ∀l,ppc,ppc_ok. \snd (fetch_pseudo_instruction l ppc ppc_ok) = add ? ppc (bitvector_of_nat ? 1). #l #ppc #ppc_ok whd in ⊢ (??(???%)?); @pair_elim #lft #rgt #_ % qed. lemma fetch_pseudo_instruction_vsplit: ∀instr_list,ppc,ppc_ok. ∃pre,suff,lbl. (pre @ [〈lbl,\fst (fetch_pseudo_instruction instr_list ppc ppc_ok)〉]) @ suff = instr_list. #instr_list #ppc #ppc_ok whd in match (fetch_pseudo_instruction ???); cases (nth_safe_append … instr_list … ppc_ok) #pre * #suff #EQ %{pre} %{suff} lapply EQ -EQ cases (nth_safe labelled_instruction ???) #lbl0 #instr normalize nodelta #EQ %{lbl0} @EQ qed. lemma fetch_pseudo_instruction_append: ∀l1,l2. |l1@l2| ≤ 2^16 → ∀ppc,ppc_ok,ppc_ok'. let code_newppc ≝ fetch_pseudo_instruction l2 ppc ppc_ok in fetch_pseudo_instruction (l1@l2) (add … (bitvector_of_nat … (|l1|)) (ppc)) ppc_ok' = 〈\fst code_newppc, add … (bitvector_of_nat … (|l1|)) (\snd code_newppc)〉. #l1 #l2 #l1l2_ok #ppc #ppc_ok whd in match fetch_pseudo_instruction; normalize nodelta cut (|l1| + nat_of_bitvector … ppc < 2^16) [ @(transitive_le … l1l2_ok) >length_append @monotonic_lt_plus_r assumption ] -l1l2_ok #l1ppc_ok >nat_of_bitvector_add >nat_of_bitvector_bitvector_of_nat_inverse try assumption [2,3: @(transitive_le … l1ppc_ok) @le_S_S // ] #ppc_ok' add_associative % qed. definition is_well_labelled_p ≝ λinstr_list. ∀id: Identifier. ∀ppc. ∀ppc_ok. ∀i. \fst (fetch_pseudo_instruction instr_list ppc ppc_ok) = i → instruction_has_label id i → occurs_exactly_once ASMTag pseudo_instruction id instr_list. definition construct_datalabels: preamble → ? ≝ λthe_preamble: preamble. \fst (foldl ((identifier_map ASMTag Word) × Word) ? ( λt. λpreamble. let 〈datalabels, addr〉 ≝ t in let 〈name, size〉 ≝ preamble in let 〈carry, sum〉 ≝ half_add … addr size in 〈add ? ? datalabels name addr, sum〉) 〈empty_map …, zero 16〉 (\snd the_preamble)).