# Changeset 953 for src/ASM/CPP2011/cpp-2011.tex

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Jun 15, 2011, 10:53:50 AM (10 years ago)
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more changes, including additions to the bibliography, and tightening up the introduction

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 r952 \label{sect.introduction} We consider the formalisation of an assembler for the Intel MCS-51 8-bit microprocessor in the Matita proof assistant. This formalisation forms a major component of the EU-funded CerCo project, concering the construction and formalisation of a concrete complexity preserving compiler for a large subset of the C programming language. We consider the formalisation of an assembler for the Intel MCS-51 8-bit microprocessor in the Matita proof assistant~\cite{asperti:user:2007}. This formalisation forms a major component of the EU-funded CerCo project~\cite{cerco:2011}, concering the construction and formalisation of a concrete complexity preserving compiler for a large subset of the C programming language. The MCS-51 dates from the early 1980s and is commonly called the 8051/8052. Despite the microprocessor's age, derivatives are still widely manufactured by a number of semiconductor foundries and the processor is widely used, especially in embedded systems development, where well-tested, cheap, predictable microprocessors find a niche. The MCS-51 dates from the early 1980s and commonly called the 8051/8052. Despite the microprocessor's age, derivatives are still widely manufactured by a number of semiconductor foundries. As a result the processor is widely used, especially in embedded systems development, where well-tested, cheap, predictable microprocessors find their niche. The MCS-51 has a relative paucity of features compared to its more modern brethren. Instead, each semiconductor foundry that produces an MCS-51 derivative is able to provide accurate timing information in clock cycles for each instruction in their derivative's instruction set. It is important to stress that this timing information, unlike in more sophisticated processors, is not an estimate, it is a definition. With the MCS-51, if a manufacturer states that a particular opcode takes three clock cycles to execute, then that opcode \emph{always} takes three clock cycles to execute. For the MCS-51, if a manufacturer states that a particular opcode takes three clock cycles to execute, then that opcode \emph{always} takes three clock cycles to execute. This predicability of timing information is especially attractive to the CerCo consortium. We are in the process of constructing a cost-preserving certified compiler for a realistic processor, and not for building and formalising the worst case execution time (WCET) tools that would be necessary to achieve the same result with, for example, a modern ARM or PowerPC microprocessor. We are in the process of constructing a certified, concrete complexity compiler for a realistic processor, and not for building and formalising the worst case execution time (WCET) tools that would be necessary to achieve the same result with, for example, a modern ARM or PowerPC microprocessor. However, the MCS-51's paucity of features is a double edged sword. In particular, the MCS-51 features relatively miniscule memory spaces (including read-only code memory, stack and internal/external RAM) by modern standards. As a result, our compiler, to have any sort of hope of successfully compiling realistic C programs, must produce tight' machine code. In particular, the MCS-51 features relatively miniscule memory spaces (including read-only code memory, stack and internal/external random access memory) by modern standards. As a result our compiler, to have any sort of hope of successfully compiling realistic C programs, ought to produce tight' machine code. This is not simple. To begin to understand the problems we faced, we here focus on a single issue in the MCS-51's instruction set: unconditional jumps. The MCS-51 features three conditional jump instructions: \texttt{LJMP} and \texttt{SJMP}---long jump' and short jump' respectively---and \texttt{AJMP}, an 11-bit oddity of the MCS-51 that we choose to ignore for simplicity's sake.\footnote{Ignoring \texttt{AJMP} and its analogue \texttt{ACALL} is not idiosyncratic.  The Small Device C Compiler (SDCC), the leading open source C compiler for the MCS-51, also seemingly does not produce \texttt{AJMP} and \texttt{ACALL} instructions.  Their utility in a modern context remains unclear.} We here focus on a single issue in the MCS-51's instruction set: unconditional jumps. The MCS-51 features three conditional jump instructions: \texttt{LJMP} and \texttt{SJMP}---long jump' and short jump' respectively---and an 11-bit oddity of the MCS-51, \texttt{AJMP}, that the prototype CerCo compiler~\cite{cerco-report-code:2011} ignores for simplicity's sake.\footnote{Ignoring \texttt{AJMP} and its analogue \texttt{ACALL} is not idiosyncratic.  The Small Device C Compiler (SDCC)~\cite{sdcc:2011}, the leading open source C compiler for the MCS-51, also seemingly does not produce \texttt{AJMP} and \texttt{ACALL} instructions.  Their utility in a modern context remains unclear.} Each of these three instructions expects arguments in different sizes and behaves in different ways. For instance, \texttt{SJMP} expects an 8-bit offset which is added to the current program counter to produce a relative, local jump. In contrast, \texttt{LJMP} expects a 16-bit addressing mode and can jump to any address in the MCS-51's memory space. As a result, the size of each opcode is different, and to squeeze as much code as possible into the MCS-51's limited code memory, the smallest instruction that produces the required effect should be picked. \texttt{SJMP} may only perform a local jump' whereas \texttt{LJMP} may jump to any address in the MCS-51's memory space. Consequently, the size of each opcode is different, and to squeeze as much code as possible into the MCS-51's limited code memory, the smallest possible opcode should be selected. Having the compiler attempt to select the smallest possible jump instruction was deemed too high a burden, unneccessarily complicating the compilation chain. Instead, we decided to have the compiler target an assembly language, complete with pseudoinstructions. These pseudoinstructions included generic \texttt{Jmp} and \texttt{Call} instructions. We also implemented labels, conditional jumps to labels, a program preamble containing global data and a \texttt{MOV} instruction for moving this global data into the MCS-51's one 16-bit register. The prototype CerCo C compiler does not attempt to select the smallest jump opcode in this manner, as this was thought to unneccessarily complicate the compilation chain. Instead, the compiler targets an assembly language, complete with pseudoinstructions including bespoke \texttt{Jmp} and \texttt{Call} instructions. Labels, conditional jumps to labels, a program preamble containing global data and a \texttt{MOV} instruction for moving this global data into the MCS-51's one 16-bit register also feature. This latter feature will ease any later consideration of separate compilation in the CerCo compiler. Further, our conditional jumps to labels behave differently from their machine code counterparts. At the machine code level, conditional jumps may only jump to a relative offset of the current program counter, limiting their scope. However, at the assembly level, conditional jumps may jump to a label that appears anywhere in the program, significantly liberalising the use of conditional jumps. An assembler is used to expand pseudoinstructions into MCS-51 machine code. However, in line with CerCo's goal to produce a verified compilation chain, this assembly language to machine language translation must also be proved correct. Assemblers are not as simple as they first appear, and are in fact quite hard to formalise. In particular, the CerCo assembler needs to expand labels and pseudoinstructions into a correct representation at the machine level. However, this assembly process is not trivial, for numerous reasons. For example, our conditional jumps to labels behave differently from their machine code counterparts. At the machine code level, conditional jumps may only jump to a relative offset, expressed in a byte, of the current program counter, limiting their range. However, at the assembly level, conditional jumps may jump to a label that appears anywhere in the program, significantly liberalising the use of conditional jumps and further simplifying the design of the CerCo compiler. Trying to na\"ively relate assembly programs with their machine code counterparts simply does not work. Further, trying to na\"ively relate assembly programs with their machine code counterparts simply does not work. Machine code programs that fetch from code memory and programs that combine the program counter with constant shifts do not make sense at the assembly level. More generally, memory addresses can only be compared with other memory addresses. In short, the full preservation of the semantics of the two languages is impossible. A further set of complications is added by the peculiarities of the CerCo project itself. Yet more complications are added by the peculiarities of the CerCo project itself. As mentioned, the CerCo consortium is in the business of constructing a verified compiler for the C programming language. However, unlike CompCert---currently representing the state of the art for industrial grade' verified compilers---and similar projects, CerCo considers not just the \emph{intensional correctness} of the compiler, but also its \emph{extensional correctness}. However, unlike CompCert~\cite{compcert:2011,leroy:formal:2009,leroy:formally:2009}---which currently represents the state of the art for industrial grade' verified compilers---CerCo considers not just the \emph{intensional correctness} of the compiler, but also its \emph{extensional correctness}. That is, CompCert focusses solely on the preservation of the \emph{meaning} of a program during the compilation process, guaranteeing that the program's meaning does not change as it is gradually transformed into assembly code. However in any realistic compiler (even the CompCert compiler!) there is no guarantee that the program's time properties are preserved during the compilation process; a compiler's optimisations' could, in theory, even conspire to degrade the concrete complexity of certain classes of programs.