Changeset 90 for Deliverables/D4.1
 Timestamp:
 Sep 20, 2010, 1:45:10 PM (10 years ago)
 Location:
 Deliverables/D4.1
 Files:

 4 edited
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 Unmodified
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Deliverables/D4.1/ASMInterpret.ml
r83 r90 1 1 open Physical;; 2 open ASM;;3 open Pretty;;4 2 5 3 exception Fetch_exception of string 6 4 7 5 type time = int;; 8 9 type foo10 6 11 7 (* no differentiation between internal and external code memory *) … … 15 11 high_internal_ram: byte Byte7Map.t; 16 12 external_ram: byte WordMap.t; 17 18 19 13 20 14 pc: word; … … 47 41 timer1: word; 48 42 timer2: word; (* can be missing *) 49 io: foo (*(time * ?line? > ?val?)*)43 io: time * int > byte option 50 44 } 51 45 52 let carr status = let (c,_,_,_),_ = status.psw in c 46 let empty = { 47 code_memory = WordMap.empty; 48 low_internal_ram = Byte7Map.empty; 49 high_internal_ram = Byte7Map.empty; 50 external_ram = WordMap.empty; 51 52 pc = zero `Sixteen; 53 54 p0 = zero `Eight; 55 sp = zero `Eight; 56 dpl = zero `Eight; 57 dph = zero `Eight; 58 pcon = zero `Eight; 59 tcon = zero `Eight; 60 tmod = zero `Eight; 61 tl0 = zero `Eight; 62 tl1 = zero `Eight; 63 th0 = zero `Eight; 64 th1 = zero `Eight; 65 p1 = zero `Eight; 66 scon = zero `Eight; 67 sbuf = zero `Eight; 68 p2 = zero `Eight; 69 ie = zero `Eight; 70 p3 = zero `Eight; 71 ip = zero `Eight; 72 psw = zero `Eight; 73 acc = zero `Eight; 74 b = zero `Eight; 75 clock = 0; 76 timer0 = zero `Sixteen; 77 timer1 = zero `Sixteen; 78 timer2 = zero `Sixteen; 79 80 io = (fun (time, line) > None) 81 } 82 83 let get_cy_flag status = 84 let (cy,_,_,_),_ = status.psw in cy 85 let get_ac_flag status = 86 let (_,ac,_,_),_ = status.psw in ac 87 let get_fo_flag status = 88 let (_,_,fo,_),_ = status.psw in fo 89 let get_rs1_flag status = 90 let (_,_,_,rs1),_ = status.psw in rs1 91 let get_rs0_flag status = 92 let _,(rs0,_,_,_) = status.psw in rs0 93 let get_ov_flag status = 94 let _,(_,ov,_,_) = status.psw in ov 95 let get_ud_flag status = 96 let _,(_,_,ud,_) = status.psw in ud 97 let get_p_flag status = 98 let _,(_,_,_,p) = status.psw in p 53 99 54 100 (* timings taken from SIEMENS *) … … 590 636 ;; 591 637 592 let address_of_register status (b1,b2,b3) =638 let get_address_of_register status (b1,b2,b3) = 593 639 let (_,_,rs1,rs0),_ = status.psw in 594 640 let base = … … 602 648 ;; 603 649 604 let fetch_register status reg =605 let addr = address_of_register status reg in606 Byte7Map.find addr status.low_internal_ram650 let get_register status reg = 651 let addr = address_of_register status reg in 652 Byte7Map.find addr status.low_internal_ram 607 653 ;; 608 654 609 655 let set_register status v reg = 610 let addr = address_of_register status reg in611 { status with low_internal_ram =612 Byte7Map.add addr v status.low_internal_ram }656 let addr = address_of_register status reg in 657 { status with low_internal_ram = 658 Byte7Map.add addr v status.low_internal_ram } 613 659 ;; 614 660 615 let fetch_arg8 status =661 let get_arg_8 status = 616 662 function 617 663 `DIRECT addr > 618 (match addr with619 (false,r1,r2,r3),n1 >620 Byte7Map.find (r1,r2,r3,n1) status.low_internal_ram621  (true,r1,r2,r3),n1 >622 (*CSC: SFR access, TO BE IMPLEMENTED *)623 assert false)664 (match addr with 665 (false,r1,r2,r3),n1 > 666 Byte7Map.find (r1,r2,r3,n1) status.low_internal_ram 667  (true,r1,r2,r3),n1 > 668 (*CSC: SFR access, TO BE IMPLEMENTED *) 669 assert false) 624 670  `INDIRECT b > 625 let addr = fetch_register status (false,false,b) in 626 (match addr with 627 (false,r1,r2,r3),n1 > 628 Byte7Map.find (r1,r2,r3,n1) status.low_internal_ram 629  (true,r1,r2,r3),n1 > 630 Byte7Map.find (r1,r2,r3,n1) status.high_internal_ram) 631  `REG (b1,b2,b3) > 632 fetch_register status (b1,b2,b3) 671 let addr = get_register status (false,false,b) in 672 (match addr with 673 (false,r1,r2,r3),n1 > 674 Byte7Map.find (r1,r2,r3,n1) status.low_internal_ram 675  (true,r1,r2,r3),n1 > 676 Byte7Map.find (r1,r2,r3,n1) status.high_internal_ram) 677  `REG (b1,b2,b3) > get_register status (b1,b2,b3) 633 678  `A > status.acc 634 679  `B > status.b 635 680  `DATA b > b 636 681  `A_DPTR > 637 let dpr = status.dph,status.dpl in638 (* CSC: what is the right behaviour in case of overflow?639 assert false for now. Try to understand what DEC really does *)640 let addr = dpr ++ (int_of_bytestatus.acc) in641 WordMap.find addr status.external_ram682 let dpr = status.dph,status.dpl in 683 (* CSC: what is the right behaviour in case of overflow? 684 assert false for now. Try to understand what DEC really does *) 685 let addr = dpr ++ (int_of_vect `Eight status.acc) in 686 WordMap.find addr status.external_ram 642 687  `A_PC > 643 (* CSC: what is the right behaviour in case of overflow?644 assert false for now *)645 let addr = status.pc ++ (int_of_bytestatus.acc) in646 WordMap.find addr status.external_ram688 (* CSC: what is the right behaviour in case of overflow? 689 assert false for now *) 690 let addr = status.pc ++ (int_of_vect `Eight status.acc) in 691 WordMap.find addr status.external_ram 647 692  `IND_DPTR > 648 let dpr = status.dph,status.dpl in649 WordMap.find dpr status.external_ram693 let dpr = status.dph, status.dpl in 694 WordMap.find dpr status.external_ram 650 695 ;; 651 696 652 let fetch_arg16 status =697 let get_arg_16 status = 653 698 function 654 699 `DATA16 w > w 655 700 656 let fetch_arg1 status =701 let get_arg_1 status = 657 702 function 658 703 `BIT addr … … 661 706 (match addr with 662 707 (false,r1,r2,r3),n1 > 663 let addr = (int_of_ byte7(r1,r2,r3,n1)) in664 let addr' = byte7_of_int ((addr / 8) + 32) in665 nth_bit (addr mod 8) (Byte7Map.find addr' status.low_internal_ram)708 let addr = (int_of_vect `Seven (r1,r2,r3,n1)) in 709 let addr' = vect_of_int ((addr / 8) + 32) in 710 nth_bit (addr mod 8) (Byte7Map.find addr' status.low_internal_ram) 666 711  (true,r1,r2,r3),n1 > 667 712 (*CSC: SFR access, TO BE IMPLEMENTED *) … … 669 714 in (match x with `BIT _ > res  _ > not res) 670 715  `C > 671 let ((b1,_,_,_),_) = status.psw in 672 b1 716 let ((b1,_,_,_),_) = status.psw in b1 673 717 674 718 let set_arg1 status v = … … 677 721 (match addr with 678 722 (false,r1,r2,r3),n1 > 679 let addr = (int_of_ byte7(r1,r2,r3,n1)) in680 let addr' = byte7_of_int ((addr / 8) + 32) in723 let addr = (int_of_vect `Seven (r1,r2,r3,n1)) in 724 let addr' = vect_of_int ((addr / 8) + 32) in 681 725 { status with low_internal_ram = 682 726 Byte7Map.add addr' (set_nth_bit (addr mod 8) v (Byte7Map.find addr' status.low_internal_ram)) status.low_internal_ram } … … 701 745 assert false) 702 746  `INDIRECT b > 703 let addr = fetch_register status (false,false,b) in747 let addr = get_register status (false,false,b) in 704 748 (match addr with 705 749 (false,r1,r2,r3),n1 > … … 740 784 ;; 741 785 742 let power_on =743 status744 {745 code_memory = WordMap.empty;746 external_memory = WordMap.empty;747 low_internal_ram = Byte7Map.empty;748 high_internal_ram = Byte7Map.empty;749 750 pc =751 }752 ;;753 754 755 786 let execute1 status = 756 787 let instr,pc,ticks = fetch status.code_memory status.pc in … … 759 790 ADD (`A,d1) > 760 791 let v,c,ac,ov = 761 add8_with_c ( fetch_arg8 status `A) (fetch_arg8 status d1) false792 add8_with_c (get_arg_8 status `A) (get_arg_8 status d1) false 762 793 in 763 794 set_flags (set_arg8 status v `A) c (Some ac) ov 764 795  ADDC (`A,d1) > 765 796 let v,c,ac,ov = 766 add8_with_c ( fetch_arg8 status `A) (fetch_arg8 status d1) (carr status)797 add8_with_c (get_arg_8 status `A) (get_arg_8 status d1) (carr status) 767 798 in 768 799 set_flags (set_arg8 status v `A) c (Some ac) ov 769 800  SUBB (`A,d1) > 770 801 let v,c,ac,ov = 771 subb8_with_c ( fetch_arg8 status `A) (fetch_arg8 status d1) (carr status)802 subb8_with_c (get_arg_8 status `A) (get_arg_8 status d1) (carr status) 772 803 in 773 804 set_flags (set_arg8 status v `A) c (Some ac) ov … … 784 815 status 785 816  INC ((`A  `REG _  `DIRECT _  `INDIRECT _) as d) > 786 let b = fetch_arg8 status d in817 let b = get_arg_8 status d in 787 818 let res = inc b in 788 819 set_arg8 status res d 789 820  DEC d > 790 let b = fetch_arg8 status d in821 let b = get_arg_8 status d in 791 822 let res = dec b in 792 823 set_arg8 status res d … … 847 878 (* logical operations *) 848 879  ANL (`U1(`A, ag)) > 849 let (ac1,ac2,ac3,ac4),(ac5,ac6,ac7,ac8) = fetch_arg8 status `A in850 let (ag1,ag2,ag3,ag4),(ag5,ag6,ag7,ag8) = fetch_arg8 status ag in880 let (ac1,ac2,ac3,ac4),(ac5,ac6,ac7,ac8) = get_arg_8 status `A in 881 let (ag1,ag2,ag3,ag4),(ag5,ag6,ag7,ag8) = get_arg_8 status ag in 851 882 let and_val = ((ac1 && ag1, ac2 && ag2, ac3 && ag3, ac4 && ag4), 852 883 (ac5 && ag5, ac6 && ag6, ac7 && ag7, ac8 && ag8)) in 853 884 set_arg8 status and_val `A 854 885  ANL (`U2((`DIRECT d), ag)) > 855 let (d1,d2,d3,d4),(d5,d6,d7,d8) = fetch_arg8 status (`DIRECT d) in856 let (ag1,ag2,ag3,ag4),(ag5,ag6,ag7,ag8) = fetch_arg8 status ag in886 let (d1,d2,d3,d4),(d5,d6,d7,d8) = get_arg_8 status (`DIRECT d) in 887 let (ag1,ag2,ag3,ag4),(ag5,ag6,ag7,ag8) = get_arg_8 status ag in 857 888 let and_val = ((d1 && ag1, d2 && ag2, d3 && ag3, d4 && ag4), 858 889 (d5 && ag5, d6 && ag6, d7 && ag7, d8 && ag8)) in … … 860 891  ANL (`U3 (`C, (`BIT b))) > 861 892 let (cy,ac,fo,rs1),(rs0,ov,ud,p) = status.psw in 862 let c = fetch_arg1 status `C in863 let ag_val = fetch_arg1 status (`BIT b) in893 let c = get_arg_1 status `C in 894 let ag_val = get_arg_1 status (`BIT b) in 864 895 { status with psw = (c && ag_val,ac,fo,rs1),(rs0,ov,ud,p) } 865 896  ANL (`U3 (`C, (`NBIT b))) > 866 897 let (cy,ac,fo,rs1),(rs0,ov,ud,p) = status.psw in 867 let c = fetch_arg1 status `C in868 let ag_val = not ( fetch_arg1 status (`NBIT b)) in898 let c = get_arg_1 status `C in 899 let ag_val = not (get_arg_1 status (`NBIT b)) in 869 900 { status with psw = (c && ag_val,ac,fo,rs1),(rs0,ov,ud,p) } 870 901  ORL (`U1(`A, ag)) > 871 let (ac1,ac2,ac3,ac4),(ac5,ac6,ac7,ac8) = fetch_arg8 status `A in872 let (ag1,ag2,ag3,ag4),(ag5,ag6,ag7,ag8) = fetch_arg8 status ag in902 let (ac1,ac2,ac3,ac4),(ac5,ac6,ac7,ac8) = get_arg_8 status `A in 903 let (ag1,ag2,ag3,ag4),(ag5,ag6,ag7,ag8) = get_arg_8 status ag in 873 904 let and_val = ((ac1  ag1, ac2  ag2, ac3  ag3, ac4  ag4), 874 905 (ac5  ag5, ac6  ag6, ac7  ag7, ac8  ag8)) in 875 906 set_arg8 status and_val `A 876 907  ORL (`U2((`DIRECT d), ag)) > 877 let (d1,d2,d3,d4),(d5,d6,d7,d8) = fetch_arg8 status (`DIRECT d) in878 let (ag1,ag2,ag3,ag4),(ag5,ag6,ag7,ag8) = fetch_arg8 status ag in908 let (d1,d2,d3,d4),(d5,d6,d7,d8) = get_arg_8 status (`DIRECT d) in 909 let (ag1,ag2,ag3,ag4),(ag5,ag6,ag7,ag8) = get_arg_8 status ag in 879 910 let and_val = ((d1  ag1, d2  ag2, d3  ag3, d4  ag4), 880 911 (d5  ag5, d6  ag6, d7  ag7, d8  ag8)) in … … 882 913  ORL (`U3 (`C, (`BIT b))) > 883 914 let (cy,ac,fo,rs1),(rs0,ov,ud,p) = status.psw in 884 let c = fetch_arg1 status `C in885 let ag_val = fetch_arg1 status (`BIT b) in915 let c = get_arg_1 status `C in 916 let ag_val = get_arg_1 status (`BIT b) in 886 917 { status with psw = (c  ag_val,ac,fo,rs1),(rs0,ov,ud,p) } 887 918  ORL (`U3 (`C, (`NBIT b))) > 888 919 let (cy,ac,fo,rs1),(rs0,ov,ud,p) = status.psw in 889 let c = fetch_arg1 status `C in890 let ag_val = not ( fetch_arg1 status (`NBIT b)) in920 let c = get_arg_1 status `C in 921 let ag_val = not (get_arg_1 status (`NBIT b)) in 891 922 { status with psw = (c  ag_val,ac,fo,rs1),(rs0,ov,ud,p) } 892 923  XRL (`U1(`A, ag)) > 893 let (ac1,ac2,ac3,ac4),(ac5,ac6,ac7,ac8) = fetch_arg8 status `A in894 let (ag1,ag2,ag3,ag4),(ag5,ag6,ag7,ag8) = fetch_arg8 status ag in924 let (ac1,ac2,ac3,ac4),(ac5,ac6,ac7,ac8) = get_arg_8 status `A in 925 let (ag1,ag2,ag3,ag4),(ag5,ag6,ag7,ag8) = get_arg_8 status ag in 895 926 let and_val = ((xor ac1 ag1, xor ac2 ag2, xor ac3 ag3, xor ac4 ag4), 896 927 (xor ac5 ag5, xor ac6 ag6, xor ac7 ag7, xor ac8 ag8)) in 897 928 set_arg8 status and_val `A 898 929  XRL (`U2((`DIRECT d), ag)) > 899 let (d1,d2,d3,d4),(d5,d6,d7,d8) = fetch_arg8 status (`DIRECT d) in900 let (ag1,ag2,ag3,ag4),(ag5,ag6,ag7,ag8) = fetch_arg8 status ag in930 let (d1,d2,d3,d4),(d5,d6,d7,d8) = get_arg_8 status (`DIRECT d) in 931 let (ag1,ag2,ag3,ag4),(ag5,ag6,ag7,ag8) = get_arg_8 status ag in 901 932 let and_val = ((xor d1 ag1, xor d2 ag2, xor d3 ag3, xor d4 ag4), 902 933 (xor d5 ag5, xor d6 ag6, xor d7 ag7, xor d8 ag8)) in … … 909 940 set_arg1 status false a 910 941  CPL `A > 911 let acc_val = fetch_arg8 status `A in942 let acc_val = get_arg_8 status `A in 912 943 { status with acc = complement acc_val } 913 944  CPL `C > 914 let ag_val = fetch_arg1 status `C in945 let ag_val = get_arg_1 status `C in 915 946 set_arg1 status (not ag_val) `C 916 947  CPL (`BIT b) > 917 let ag_val = fetch_arg1 status (`BIT b) in948 let ag_val = get_arg_1 status (`BIT b) in 918 949 set_arg1 status (not ag_val) (`BIT b) 919 950  RL `A > … … 937 968 { status with acc = (acc_n_2, acc_n_1) } 938 969  MOV(`U1(b1, b2)) > 939 let arg = fetch_arg8 status b2 in970 let arg = get_arg_8 status b2 in 940 971 set_arg8 status arg b1 941 972  MOV(`U2(b1, b2)) > 942 let arg = fetch_arg8 status b2 in973 let arg = get_arg_8 status b2 in 943 974 set_arg8 status arg b1 944 975  MOV(`U3(b1, b2)) > 945 let arg = fetch_arg8 status b2 in976 let arg = get_arg_8 status b2 in 946 977 set_arg8 status arg b1 947 978  MOV(`U4(b1,b2)) > 948 let arg = fetch_arg16 status b2 in979 let arg = get_arg_16 status b2 in 949 980 set_arg16 status arg b1 950 981  MOV(`U5(b1,b2))> 951 let arg = fetch_arg1 status b2 in982 let arg = get_arg_1 status b2 in 952 983 set_arg1 status arg b1 953 984  MOV(`U6(b1,b2))> 954 let arg = fetch_arg1 status b2 in985 let arg = get_arg_1 status b2 in 955 986 set_arg1 status arg b1 956 987  MOVC (`A, `A_DPTR) > … … 983 1014 status 984 1015  XCH(`A, arg) > 985 let old_arg = fetch_arg8 status arg in1016 let old_arg = get_arg_8 status arg in 986 1017 let old_acc = status.acc in 987 1018 let new_status = set_arg8 status old_acc arg in 988 1019 { new_status with acc = old_arg } 989 1020  XCHD(`A, (`INDIRECT i)) > 990 let ((a1,a2,a3,a4),(a5,a6,a7,a8)) = fetch_arg8 status `A in991 let ((i1,i2,i3,i4),(i5,i6,i7,i8)) = fetch_arg8 status (`INDIRECT i) in1021 let ((a1,a2,a3,a4),(a5,a6,a7,a8)) = get_arg_8 status `A in 1022 let ((i1,i2,i3,i4),(i5,i6,i7,i8)) = get_arg_8 status (`INDIRECT i) in 992 1023 let new_acc_val = ((a1,a2,a3,a4),(i5,i6,i7,i8)) in 993 1024 let new_reg_val = ((i1,i2,i3,i4),(a5,a6,a7,a8)) in … … 1009 1040 status 1010 1041  JB ((`BIT b1), (`REL rel)) > 1011 let val_bit = fetch_arg1 status (`BIT b1) in1042 let val_bit = get_arg_1 status (`BIT b1) in 1012 1043 if val_bit = true then 1013 1044 { status with pc = status.pc ++ (int_of_byte rel) } … … 1015 1046 status 1016 1047  JNB ((`BIT b1), (`REL rel)) > 1017 let val_bit = fetch_arg1 status (`BIT b1) in1048 let val_bit = get_arg_1 status (`BIT b1) in 1018 1049 if val_bit = false then 1019 1050 { status with pc = status.pc ++ (int_of_byte rel) } … … 1021 1052 status 1022 1053  JBC ((`BIT b1), (`REL rel)) > 1023 let val_bit = fetch_arg1 status (`BIT b1) in1054 let val_bit = get_arg_1 status (`BIT b1) in 1024 1055 let new_status = set_arg1 status false (`BIT b1) in 1025 1056 if val_bit = true then … … 1094 1125 status 1095 1126  CJNE ((`U1 (`A, ag)), `REL rel) > 1096 let ag_val = fetch_arg8 status ag in1127 let ag_val = get_arg_8 status ag in 1097 1128 let acc_val = status.acc in 1098 1129 let (b1,b2,b3,b4),n2 = status.psw in … … 1103 1134 { status with psw = (new_carry, b2, b3, b4),n2 } 1104 1135  CJNE ((`U2 (ag, `DATA d)), `REL rel) > 1105 let ag_val = fetch_arg8 status ag in1136 let ag_val = get_arg_8 status ag in 1106 1137 let (b1,b2,b3,b4),n2 = status.psw in 1107 1138 let new_carry = ag_val < d in … … 1111 1142 { status with psw = (new_carry, b2, b3, b4),n2 } 1112 1143  DJNZ (ag, (`REL rel)) > 1113 let ag_val = fetch_arg8 status ag in1144 let ag_val = get_arg_8 status ag in 1114 1145 let new_ag_val = byte_of_int ((int_of_byte ag_val)  1) in 1115 1146 if ag_val <> ((false,false,false,false),(false,false,false,false)) then 
Deliverables/D4.1/BitVectors.ml
r89 r90 137 137 pad diff big_list 138 138 139 let zero size = pad (size_lookup size) [] 
Deliverables/D4.1/BitVectors.mli
r89 r90 25 25 26 26 val int_of_vect: 'a vect > int 27 val vect_of_int: int > [ `Four  `Seven  `Eight  `Eleven  `Sixteen ] > [`Four  `Seven  `Eight  `Eleven  `Sixteen ] vect27 val vect_of_int: int > [< `Four  `Seven  `Eight  `Eleven  `Sixteen ] > [`Four  `Seven  `Eight  `Eleven  `Sixteen ] vect 28 28 29 29 val (&): 'a vect > 'a vect > 'a vect … … 38 38 val string_of_vect: 'a vect > string 39 39 40 val zero: [< `Four  `Seven  `Eight  `Eleven  `Sixteen ] > [< `Four  `Seven  `Eight  `Eleven  `Sixteen ] vect 41 40 42 val half_add: 'a vect > 'a vect > bit * 'a vect 41 43 val full_add: 'a vect > 'a vect > bit > bit * 'a vect 
Deliverables/D4.1/physical.ml
r88 r90 1 open Bit _vectors1 open BitVectors;; 2 2 3 3 exception Byte7_conversion … … 14 14 15 15 let add8_with_c b1 b2 c = 16 let n1 = int_of_ byteb1 in17 let n2 = int_of_ byteb2 in18 let c = int_of_ bit c in16 let n1 = int_of_vect b1 in 17 let n2 = int_of_vect b2 in 18 let c = int_of_vect c in 19 19 let res = n1 + n2 + c in 20 20 let ac = n1 mod 16 + n2 mod 16 + c >= 16 in … … 22 22 let res,c = res mod 256, res >= 256 in 23 23 let ov = c <> c6 in 24 byte_of_int res,c,ac,ov24 vect_of_int res,c,ac,ov 25 25 ;; 26 26 27 27 let subb8_with_c b1 b2 c = 28 let n1 = int_of_ byteb1 in29 let n2 = int_of_ byteb2 in30 let c = int_of_ bit c in28 let n1 = int_of_vect b1 in 29 let n2 = int_of_vect b2 in 30 let c = int_of_vect c in 31 31 let res = n1  n2  c in 32 32 let ac = n1 mod 16  n2 mod 16  c < 0 in … … 36 36 else n1 + 256  n2  c, true in 37 37 let ov = c <> c6 in 38 byte_of_int res,c,ac,ov38 (vect_of_int res `Eight,c,ac,ov) 39 39 ;; 40 40 41 41 let dec b = 42 let res = int_of_ byteb  1 in43 if res < 0 then byte_of_int 25544 else byte_of_int res42 let res = int_of_vect b  1 in 43 if res < 0 then vect_of_int 255 `Eight 44 else vect_of_int res `Eight 45 45 ;; 46 46 47 47 let inc b = 48 let res = int_of_ byteb + 1 in49 if res > 255 then byte_of_int 050 else byte_of_int res48 let res = int_of_vect b + 1 in 49 if res > 255 then vect_of_int 0 `Eight 50 else vect_of_int res `Eight 51 51 ;; 52 52
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