Ignore:
Timestamp:
May 19, 2011, 4:03:04 PM (10 years ago)
Author:
ayache
Message:

32 and 16 bits operations support in D2.2/8051

Location:
Deliverables/D2.2/8051/src/ASM
Files:
4 edited

Legend:

Unmodified
Added
Removed
  • Deliverables/D2.2/8051/src/ASM/ASMInterpret.ml

    r743 r818  
    19351935  let status = serial_port_output status out_cont in
    19361936  let status = interrupts status in
    1937   let status = { status with previous_p1_val = get_bit status.p3 4;
    1938                    previous_p3_val = get_bit status.p3 5 } in
    1939     status
     1937  { status with previous_p1_val = get_bit status.p3 4;
     1938    previous_p3_val = get_bit status.p3 5 }
    19401939;;
    19411940
     
    19691968;;
    19701969
     1970
    19711971let load_program p =
    19721972  let st = load p.ASM.code initialize in
     
    19821982
    19831983let result st =
    1984   let i = BitVectors.int_of_vect st.dpl in
    1985   IntValue.Int8.of_int i
    1986 
    1987 let interpret print_result p =
    1988   if print_result then Printf.printf "8051: %!" ;
     1984  let dpl = st.dpl in
     1985  let dpr = st.dph in
     1986  let addr i = BitVectors.vect_of_int i `Seven in
     1987  let get_ireg i = Physical.Byte7Map.find (addr i) st.low_internal_ram in
     1988  let r00 = get_ireg 0 in
     1989  let r01 = get_ireg 1 in
     1990  let is = [dpl ; dpr ; r00 ; r01] in
     1991  let f i = IntValue.Int32.of_int (BitVectors.int_of_vect i) in
     1992  IntValue.Int32.merge (List.map f is)
     1993
     1994let interpret debug p =
     1995  Printf.printf "*** 8051 interpret ***\n%!" ;
    19891996  if p.ASM.has_main then
    19901997    let st = load_program p in
     
    19932000    let st = execute callback st in
    19942001    let res = result st in
    1995     if print_result then
    1996       Printf.printf "%s\n%!" (IntValue.Int8.to_string res) ;
     2002    if debug then
     2003      Printf.printf "Result = %s\n%!" (IntValue.Int32.to_string res) ;
    19972004    (res, List.rev !trace)
    1998   else (IntValue.Int8.zero, [])
     2005  else (IntValue.Int32.zero, [])
  • Deliverables/D2.2/8051/src/ASM/I8051.ml

    r740 r818  
    66type opaccs =
    77  | Mul
    8   | Divu
    9   | Modu
     8  | DivuModu
    109
    1110type op1 =
     
    2322let print_opaccs = function
    2423  | Mul -> "mul"
    25   | Divu -> "divu"
    26   | Modu -> "modu"
     24  | DivuModu -> "divu"
    2725
    2826let print_op1 = function
     
    4139module Eval (Val : Value.S) = struct
    4240
    43   let opaccs = function
    44     | Mul -> Val.mul
    45     | Divu -> Val.divu
    46     | Modu -> Val.modulou
     41  let eval_int_mul size i1 i2 =
     42    let module Int = IntValue.Make (struct let size = 2 * size end) in
     43    match Int.break (Int.mul i1 i2) 2 with
     44      | res1 :: res2 :: _ -> (Val.of_int_repr res1, Val.of_int_repr res2)
     45      | _ -> assert false (* should be impossible *)
     46
     47  let eval_mul v1 v2 =
     48    if Val.is_int v1 && Val.is_int v2 then
     49      eval_int_mul Val.int_size (Val.to_int_repr v1) (Val.to_int_repr v2)
     50    else (Val.undef, Val.undef)
     51
     52  let opaccs op v1 v2 = match op with
     53    | Mul -> eval_mul v1 v2
     54    | DivuModu -> (Val.divu v1 v2, Val.modulou v1 v2)
    4755
    4856  let op1 = function
     
    152160  | _ -> assert false (* impossible *)
    153161
    154 let sst = r03
    155 let st0 = r04
    156 let st1 = r05
     162let sst = r10
     163let st0 = r02
     164let st1 = r03
     165let st2 = r04
     166let st3 = r05
     167let sts = [st0 ; st1 ; st2 ; st3]
    157168let spl = r06
    158169let sph = r07
     170let rets = [dpl ; dph ; r00 ; r01]
     171
     172let isp_addr = 129
     173let isp_init = 47
    159174
    160175let set_of_list rl = List.fold_right RegisterSet.add rl RegisterSet.empty
     
    169184
    170185let forbidden =
    171   set_of_list [(* a ; b ; dpl ; dph ; *) spl ; sph ; st0 ; st1 ; sst]
     186  set_of_list
     187    [a ; b ; dpl ; dph ; spl ; sph ; st0 ; st1 ; st2 ; st3 ; sst]
    172188
    173189let parameters =
  • Deliverables/D2.2/8051/src/ASM/I8051.mli

    r740 r818  
    44type opaccs =
    55  | Mul
    6   | Divu
    7   | Modu
     6  | DivuModu
    87
    98type op1 =
     
    2423
    2524module Eval (Val : Value.S) : sig
    26   val opaccs : opaccs -> Val.t -> Val.t -> Val.t
     25  val opaccs : opaccs -> Val.t -> Val.t ->
     26               (Val.t (* first result (ACC) *) *
     27                Val.t (* second result (BACC) *))
    2728  val op1    : op1 -> Val.t -> Val.t
    2829  val op2    : Val.t (* carry *) -> op2 -> Val.t -> Val.t ->
     
    4748val st0 : register
    4849val st1 : register
     50val st2 : register
     51val st3 : register
     52val sts : register list
     53val rets : register list
    4954val sst : register
    5055val carry : register (* only used for the liveness analysis *)
     56
     57val isp_addr : int
     58val isp_init : int
    5159
    5260val registers : RegisterSet.t
  • Deliverables/D2.2/8051/src/ASM/Pretty.ml

    r645 r818  
    100100  let f (s, pc) _ =
    101101    let (inst, new_pc, cost) = ASMInterpret.fetch mem pc in
    102     (Printf.sprintf "%s% 6s  %- 18s ;; %d  %s\n"
     102    (Printf.sprintf "%s% 6X:  %- 18s ;; %d  %s\n"
    103103       s
    104        ((string_of_int (BitVectors.int_of_vect pc)) ^ ":")
     104       (BitVectors.int_of_vect pc)
    105105       (pp_instruction inst)
    106106       cost
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