Ignore:
Timestamp:
Apr 4, 2011, 5:18:15 PM (9 years ago)
Author:
ayache
Message:

New memory model and bug fixes in 8051 branch. Added primitive operations in interpreters from Clight to LIN.

File:
1 edited

Legend:

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  • Deliverables/D2.2/8051/src/ASM/I8051.ml

    r619 r740  
    183183
    184184let reg_addr r = `DIRECT (BitVectors.vect_of_int r `Eight)
     185
     186(* External RAM size *)
     187let ext_ram_size = MiscPottier.pow 2 16
     188(* Internal RAM size *)
     189let int_ram_size = MiscPottier.pow 2 8
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