Ignore:
Timestamp:
Mar 2, 2011, 3:27:41 PM (9 years ago)
Author:
ayache
Message:

Update of D2.2 from Paris.

File:
1 edited

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  • Deliverables/D2.2/8051/src/ASM/ASMInterpret.mli

    r486 r619  
    33
    44exception CodeTooLarge
    5 
     5 
    66type time = int;;
    77type line = [ `P1 of byte
     
    1818(* In:  reception time, line of input, new continuation,
    1919   Out: transmission time, output line, expected duration until reply,
    20         new continuation.
     20   new continuation.
    2121*)
    2222type continuation =
    2323  [`In of time * line * epsilon * continuation] option *
    24   [`Out of (time -> line -> time * continuation) ];;
    25 
    26 module IntMap: Map.S with type key = int
    27 type costs = CostLabel.t IntMap.t
     24    [`Out of (time -> line -> time * continuation) ];;
    2825
    2926type status =
    30 {
    31   (* Memory *)
    32   code_memory: WordMap.map;        (* can be reduced *)
    33   low_internal_ram: Byte7Map.map;
    34   high_internal_ram: Byte7Map.map;
    35   external_ram: WordMap.map;
     27    {
     28      (* Memory *)
     29      code_memory: WordMap.map;        (* can be reduced *)
     30      low_internal_ram: Byte7Map.map;
     31      high_internal_ram: Byte7Map.map;
     32      external_ram: WordMap.map;
     33     
     34      (* Program counter *)
     35      pc: word;
     36     
     37      (* SFRs *)
     38      sp: byte;
     39      dpl: byte;
     40      dph: byte;
     41      pcon: byte;
     42      tcon: byte;
     43      tmod: byte;
     44      tl0: byte;
     45      tl1: byte;
     46      th0: byte;
     47      th1: byte;
     48      p1: byte;
     49      scon: byte;
     50      sbuf: byte;
     51      ie: byte;
     52      p3: byte;
     53      ip: byte;
     54      psw: byte;
     55      acc: byte;
     56      b: byte;
     57      t2con: byte;   (* 8052 only *)
     58      rcap2l: byte;  (* 8052 only *)
     59      rcap2h: byte;  (* 8052 only *)
     60      tl2: byte;     (* 8052 only *)
     61      th2: byte;     (* 8052 only *)
     62     
     63      (* Latches for the output lines *)
     64      p1_latch: byte;
     65      p3_latch: byte;
     66     
     67      (* Fields for tracking the state of the processor. *)
     68     
     69      (* IO specific *)
     70      previous_p1_val: bool;
     71      previous_p3_val: bool;
     72     
     73      serial_epsilon_out: epsilon option;
     74      serial_epsilon_in: epsilon option;
     75     
     76      io_epsilon: epsilon;
     77     
     78      serial_v_in: [`Eight of byte | `Nine of (BitVectors.bit * byte) ] option;
     79      serial_v_out: [`Eight of byte | `Nine of (BitVectors.bit * byte) ] option;
     80     
     81      serial_k_out: continuation option;
     82     
     83      io: continuation;
     84      expected_out_time: [ `None | `Now | `At of time ];
     85     
     86      (* Timer and clock specific *)
     87      clock: time;
     88      timer0: word;
     89      timer1: word;
     90      timer2: word;  (* can be missing *)
     91     
     92      esi_running: bool;
     93      t0i_running: bool;
     94      t1i_running: bool;
     95      e0i_running: bool;
     96      e1i_running: bool;
     97      es_running: bool;
    3698
    37   (* Program counter *)
    38   pc: word;
    39 
    40   (* SFRs *)
    41   sp: byte;
    42   dpl: byte;
    43   dph: byte;
    44   pcon: byte;
    45   tcon: byte;
    46   tmod: byte;
    47   tl0: byte;
    48   tl1: byte;
    49   th0: byte;
    50   th1: byte;
    51   p1: byte;
    52   scon: byte;
    53   sbuf: byte;
    54   ie: byte;
    55   p3: byte;
    56   ip: byte;
    57   psw: byte;
    58   acc: byte;
    59   b: byte;
    60   t2con: byte;   (* 8052 only *)
    61   rcap2l: byte;  (* 8052 only *)
    62   rcap2h: byte;  (* 8052 only *)
    63   tl2: byte;     (* 8052 only *)
    64   th2: byte;     (* 8052 only *)
    65 
    66   (* Latches for the output lines *)
    67   p1_latch: byte;
    68   p3_latch: byte;
    69 
    70   (* Fields for tracking the state of the processor. *)
    71  
    72   (* IO specific *)
    73   previous_p1_val: bool;
    74   previous_p3_val: bool;
    75 
    76   serial_epsilon_out: epsilon option;
    77   serial_epsilon_in: epsilon option;
    78 
    79   io_epsilon: epsilon;
    80 
    81   serial_v_in: [`Eight of byte | `Nine of (BitVectors.bit * byte) ] option;
    82   serial_v_out: [`Eight of byte | `Nine of (BitVectors.bit * byte) ] option;
    83 
    84   serial_k_out: continuation option;
    85 
    86   io: continuation;
    87   expected_out_time: [ `None | `Now | `At of time ];
    88 
    89   (* Timer and clock specific *)
    90   clock: time;
    91   timer0: word;
    92   timer1: word;
    93   timer2: word;  (* can be missing *)
    94 
    95   esi_running: bool;
    96   t0i_running: bool;
    97   t1i_running: bool;
    98   e0i_running: bool;
    99   e1i_running: bool;
    100   es_running: bool;
    101 
    102   exit_pc: word option;
    103   costs: costs;
    104 }
    105 
     99      exit_addr   : BitVectors.word;
     100      cost_labels : string BitVectors.WordMap.t
     101    }
     102     
    106103val string_of_status: status -> string
    107104
    108 val assembly: ASM.program -> BitVectors.byte list (*ASM.instruction list * symbol_table *) * word (* exit pc *) * string IntMap.t
     105
     106val assembly:
     107  [< ASM.labelled_instruction] ASM.pretty_program -> ASM.program
    109108
    110109(*
    111 val link:
    112  (ASM.instruction list * symbol_table * cost_map) list -> BitVectors.byte list
     110  val link:
     111  (ASM.instruction list * symbol_table * cost_map) list -> BitVectors.byte list
    113112*)
    114 
     113 
    115114val initialize: status
    116 
    117 val load_mem: Physical.WordMap.map -> word option -> costs -> status -> status
    118 val load: BitVectors.byte list -> word option -> costs -> status -> status
    119 
     115 
     116val load_code_memory: BitVectors.byte list -> Physical.WordMap.map
     117val load_mem: Physical.WordMap.map -> status -> status
     118val load: BitVectors.byte list -> status -> status
     119 
    120120exception Halt  (* to be raised to stop execution *)
    121 
     121 
    122122(* the callback function is used to observe the execution
    123123   trace; it can raise Hold to stop execution. Otherwise
    124124   the processor never halts. *)
    125125val execute: (status -> unit) -> status -> status
    126 
     126 
    127127val fetch: Physical.WordMap.map -> word -> ASM.instruction * word * int
    128128
    129 val interpret : ASM.program -> AST.trace
    130 
    131 val parse_and_interpret_hex : string -> unit
     129val load_program : ASM.program -> status
     130val interpret    : bool -> ASM.program -> AST.trace
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