Changeset 559


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Timestamp:
Feb 17, 2011, 3:07:20 PM (6 years ago)
Author:
mulligan
Message:

Added picture from Brian's report on 8051 memory layout

File:
1 edited

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  • Deliverables/D4.1/ITP-Paper/itp-2011.tex

    r558 r559  
    157157
    158158\begin{figure}[t]
    159 \begin{center}
    160 \includegraphics[scale=0.5]{memorylayout.png}
    161 \end{center}
    162 \caption{High level overview of the 8051 memory layout}
     159\setlength{\unitlength}{0.87pt}
     160\begin{picture}(410,250)(-50,200)
     161%\put(-50,200){\framebox(410,250){}}
     162\put(12,410){\makebox(80,0)[b]{Internal (256B)}}
     163\put(13,242){\line(0,1){165}}
     164\put(93,242){\line(0,1){165}}
     165\put(13,407){\line(1,0){80}}
     166\put(12,400){\makebox(0,0)[r]{0h}}  \put(14,400){\makebox(0,0)[l]{Register bank 0}}
     167\put(13,393){\line(1,0){80}}
     168\put(12,386){\makebox(0,0)[r]{8h}}  \put(14,386){\makebox(0,0)[l]{Register bank 1}}
     169\put(13,379){\line(1,0){80}}
     170\put(12,372){\makebox(0,0)[r]{10h}}  \put(14,372){\makebox(0,0)[l]{Register bank 2}}
     171\put(13,365){\line(1,0){80}}
     172\put(12,358){\makebox(0,0)[r]{18h}} \put(14,358){\makebox(0,0)[l]{Register bank 3}}
     173\put(13,351){\line(1,0){80}}
     174\put(12,344){\makebox(0,0)[r]{20h}} \put(14,344){\makebox(0,0)[l]{Bit addressable}}
     175\put(13,323){\line(1,0){80}}
     176\put(12,316){\makebox(0,0)[r]{30h}}
     177  \put(14,309){\makebox(0,0)[l]{\quad \vdots}}
     178\put(13,291){\line(1,0){80}}
     179\put(12,284){\makebox(0,0)[r]{80h}}
     180  \put(14,263){\makebox(0,0)[l]{\quad \vdots}}
     181\put(12,249){\makebox(0,0)[r]{ffh}}
     182\put(13,242){\line(1,0){80}}
     183
     184\qbezier(-2,407)(-6,407)(-6,393)
     185\qbezier(-6,393)(-6,324)(-10,324)
     186\put(-12,324){\makebox(0,0)[r]{Indirect/stack}}
     187\qbezier(-6,256)(-6,324)(-10,324)
     188\qbezier(-2,242)(-6,242)(-6,256)
     189
     190\qbezier(94,407)(98,407)(98,393)
     191\qbezier(98,393)(98,349)(102,349)
     192\put(104,349){\makebox(0,0)[l]{Direct}}
     193\qbezier(98,305)(98,349)(102,349)
     194\qbezier(94,291)(98,291)(98,305)
     195
     196\put(102,242){\framebox(20,49){SFR}}
     197% bit access to sfrs?
     198
     199\qbezier(124,291)(128,291)(128,277)
     200\qbezier(128,277)(128,266)(132,266)
     201\put(134,266){\makebox(0,0)[l]{Direct}}
     202\qbezier(128,257)(128,266)(132,266)
     203\qbezier(124,242)(128,242)(128,256)
     204
     205\put(164,410){\makebox(80,0)[b]{External (64kB)}}
     206\put(164,220){\line(0,1){187}}
     207\put(164,407){\line(1,0){80}}
     208\put(244,220){\line(0,1){187}}
     209\put(164,242){\line(1,0){80}}
     210\put(163,400){\makebox(0,0)[r]{0h}}
     211\put(164,324){\makebox(80,0){Paged access}}
     212  \put(164,310){\makebox(80,0){Direct/indirect}}
     213\put(163,235){\makebox(0,0)[r]{80h}}
     214  \put(164,228){\makebox(80,0){\vdots}}
     215  \put(164,210){\makebox(80,0){Direct/indirect}}
     216
     217\put(264,410){\makebox(80,0)[b]{Code (64kB)}}
     218\put(264,220){\line(0,1){187}}
     219\put(264,407){\line(1,0){80}}
     220\put(344,220){\line(0,1){187}}
     221\put(263,400){\makebox(0,0)[r]{0h}}
     222  \put(264,228){\makebox(80,0){\vdots}}
     223  \put(264,324){\makebox(80,0){Direct}}
     224  \put(264,310){\makebox(80,0){PC relative}}
     225\end{picture}
     226\caption{The 8051 memory model}
    163227\label{fig.memory.layout}
    164228\end{figure}
    165229
    166230The 8051 has a relatively straightforward architecture, unencumbered by advanced features of modern processors, making it an ideal target for formalisation.
    167 A high-level overview of the processor's memory layout is provided in Figure~\ref{fig.memory.layout}.
     231A high-level overview of the processor's memory layout, along with the ways in which different memory spaces may be addressed, is provided in Figure~\ref{fig.memory.layout}.
    168232
    169233Processor RAM is divided into numerous segments, with the most prominent division being between internal and (optional) external memory.
     
    173237Bit memory, followed by a small amount of stack space, resides in the memory space immediately after the register banks.
    174238What remains of the IRAM may be treated as general purpose memory.
    175 A schematic view of IRAM layout is provided in Figure~\ref{fig.iram.layout}.
     239A schematic view of IRAM layout is also provided in Figure~\ref{fig.memory.layout}.
    176240
    177241External RAM (XRAM), limited to a maximum size of 64 kilobytes, is optional, and may be provided on or off chip, depending on the manufacturer.
     
    203267Similarly, `exceptional circumstances' that would otherwise trigger an interrupt on more modern processors, for example, division by zero, are also signalled by setting flags.
    204268
    205 \begin{figure}[t]
    206 \begin{center}
    207 \includegraphics[scale=0.5]{iramlayout.png}
    208 \end{center}
    209 \caption{Schematic view of 8051 IRAM layout}
    210 \label{fig.iram.layout}
    211 \end{figure}
     269%\begin{figure}[t]
     270%\begin{center}
     271%\includegraphics[scale=0.5]{iramlayout.png}
     272%\end{center}
     273%\caption{Schematic view of 8051 IRAM layout}
     274%\label{fig.iram.layout}
     275%\end{figure}
    212276
    213277%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
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