Changeset 52 for Deliverables/D4.1
- Timestamp:
- Sep 10, 2010, 11:20:52 AM (10 years ago)
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- 1 edited
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Deliverables/D4.1/ASMInterpret.ml
r51 r52 798 798 | CLR of [ acc | carry | bit ] 799 799 | CPL of [ acc | carry | bit ] 800 | RL of acc 800 *) 801 | RL `A -> 802 let (b1,b2,b3,b4),(b5,b6,b7,b8) = status.acc in 803 { status with acc = (b2,b3,b4,b5),(b6,b7,b8,b1) } 804 (* 801 805 | RLC of acc 802 | RR of acc 806 *) 807 | RR `A -> 808 let (b1,b2,b3,b4),(b5,b6,b7,b8) = status.acc in 809 { status with acc = (b8,b1,b2,b3),(b4,b5,b6,b7) } 810 (* 803 811 | RRC of acc 804 | SWAP of acc805 812 *) 806 813 | SWAP `A -> 814 let (acc_n_1, acc_n_2) = status.acc in 815 { status with acc = (acc_n_2, acc_n_1) } 807 816 | MOV(`U1(b1, b2)) -> 808 817 let arg = fetch_arg8 status b2 in
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