Ignore:
Timestamp:
Mar 26, 2013, 4:51:40 PM (8 years ago)
Author:
sacerdot
Message:

New extraction, it diverges in RTL execution now.

File:
1 edited

Legend:

Unmodified
Added
Removed
  • extracted/rTLabsToRTL.ml

    r2951 r2960  
    154154    -> 'a1) -> register_type -> 'a1 **)
    155155let rec register_type_rect_Type4 h_register_int h_register_ptr = function
    156 | Register_int x_18401 -> h_register_int x_18401
    157 | Register_ptr (x_18403, x_18402) -> h_register_ptr x_18403 x_18402
     156| Register_int x_60 -> h_register_int x_60
     157| Register_ptr (x_62, x_61) -> h_register_ptr x_62 x_61
    158158
    159159(** val register_type_rect_Type5 :
     
    161161    -> 'a1) -> register_type -> 'a1 **)
    162162let rec register_type_rect_Type5 h_register_int h_register_ptr = function
    163 | Register_int x_18407 -> h_register_int x_18407
    164 | Register_ptr (x_18409, x_18408) -> h_register_ptr x_18409 x_18408
     163| Register_int x_66 -> h_register_int x_66
     164| Register_ptr (x_68, x_67) -> h_register_ptr x_68 x_67
    165165
    166166(** val register_type_rect_Type3 :
     
    168168    -> 'a1) -> register_type -> 'a1 **)
    169169let rec register_type_rect_Type3 h_register_int h_register_ptr = function
    170 | Register_int x_18413 -> h_register_int x_18413
    171 | Register_ptr (x_18415, x_18414) -> h_register_ptr x_18415 x_18414
     170| Register_int x_72 -> h_register_int x_72
     171| Register_ptr (x_74, x_73) -> h_register_ptr x_74 x_73
    172172
    173173(** val register_type_rect_Type2 :
     
    175175    -> 'a1) -> register_type -> 'a1 **)
    176176let rec register_type_rect_Type2 h_register_int h_register_ptr = function
    177 | Register_int x_18419 -> h_register_int x_18419
    178 | Register_ptr (x_18421, x_18420) -> h_register_ptr x_18421 x_18420
     177| Register_int x_78 -> h_register_int x_78
     178| Register_ptr (x_80, x_79) -> h_register_ptr x_80 x_79
    179179
    180180(** val register_type_rect_Type1 :
     
    182182    -> 'a1) -> register_type -> 'a1 **)
    183183let rec register_type_rect_Type1 h_register_int h_register_ptr = function
    184 | Register_int x_18425 -> h_register_int x_18425
    185 | Register_ptr (x_18427, x_18426) -> h_register_ptr x_18427 x_18426
     184| Register_int x_84 -> h_register_int x_84
     185| Register_ptr (x_86, x_85) -> h_register_ptr x_86 x_85
    186186
    187187(** val register_type_rect_Type0 :
     
    189189    -> 'a1) -> register_type -> 'a1 **)
    190190let rec register_type_rect_Type0 h_register_int h_register_ptr = function
    191 | Register_int x_18431 -> h_register_int x_18431
    192 | Register_ptr (x_18433, x_18432) -> h_register_ptr x_18433 x_18432
     191| Register_int x_90 -> h_register_int x_90
     192| Register_ptr (x_92, x_91) -> h_register_ptr x_92 x_91
    193193
    194194(** val register_type_inv_rect_Type4 :
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