Changeset 201 for Deliverables/D4.1/ASMInterpret.ml
 Timestamp:
 Oct 20, 2010, 4:29:31 PM (9 years ago)
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Deliverables/D4.1/ASMInterpret.ml
r200 r201 1115 1115 { status with high_internal_ram = memory } 1116 1116 ;; 1117 1118 let timer0 status b1 b2 ticks = 1119 let b = get_bit status.tcon 4 in 1120 (* Timer0 first *) 1121 (match b1,b2 with 1122 true,true > 1123 (* Archaic 13 bit mode. *) 1124 if b then 1125 let res,_,_,_ = add8_with_c status.tl0 (vect_of_int ticks `Eight) false in 1126 let res = int_of_vect res in 1127 if res > 31 then 1128 let res = res mod 32 in 1129 let res',cy',ov',ac' = add8_with_c status.th0 (vect_of_int 1 `Eight) false in 1130 if ov' then 1131 let b = set_bit status.tcon 7 true in 1132 { status with tcon = b; th0 = res'; tl0 = vect_of_int res `Eight } 1133 else 1134 { status with th0 = res'; tl0 = vect_of_int res `Eight } 1135 else 1136 { status with tl0 = vect_of_int res `Eight } 1137 else 1138 status 1139  false,false > 1140 (* 8 bit split timer mode. *) 1141 let status = 1142 (if b then 1143 let res,cy,ov,ac = add8_with_c status.tl0 (vect_of_int ticks `Eight) false in 1144 if ov then 1145 let b = set_bit status.tcon 5 true in 1146 { status with tcon = b; tl0 = res } 1147 else 1148 { status with tl0 = res } 1149 else 1150 status) 1151 in 1152 if get_bit status.tcon 6 then 1153 let res,cy,ov,ac = add8_with_c status.th0 (vect_of_int ticks `Eight) false in 1154 if ov then 1155 let b = set_bit status.tcon 7 true in 1156 { status with tcon = b; th0 = res } 1157 else 1158 { status with th0 = res } 1159 else 1160 status 1161  false,true > 1162 (* 16 bit timer mode. *) 1163 if b then 1164 let res,_,ov,_ = add16_with_c (mk_word status.th0 status.tl0) (vect_of_int ticks `Sixteen) false in 1165 if ov then 1166 let b = set_bit status.tcon 5 true in 1167 let new_th0,new_tl0 = from_word res in 1168 { status with tcon = b; th0 = new_th0; tl0 = new_tl0 } 1169 else 1170 let new_th0,new_tl0 = from_word res in 1171 { status with th0 = new_th0; tl0 = new_tl0 } 1172 else 1173 status 1174  true,false > 1175 (* 8 bit single timer mode. *) 1176 if b then 1177 let res,_,ov,_ = add8_with_c status.tl0 (vect_of_int ticks `Eight) false in 1178 if ov then 1179 let b = set_bit status.tcon 5 true in 1180 { status with tcon = b; tl0 = status.th0; } 1181 else 1182 { status with tl0 = res } 1183 else 1184 status) 1185 1186 let timer1 status b3 b4 ticks = 1187 let b = get_bit status.tcon 4 in 1188 (match b3,b4 with 1189 true,true > 1190 (* Archaic 13 bit mode. *) 1191 if b then 1192 let res,_,_,_ = add8_with_c status.tl1 (vect_of_int ticks `Eight) false in 1193 let res = int_of_vect res in 1194 if res > 31 then 1195 let res = res mod 32 in 1196 let res',cy',ov',ac' = add8_with_c status.th1 (vect_of_int 1 `Eight) false in 1197 if ov' then 1198 let b = set_bit status.tcon 7 true in 1199 { status with tcon = b; th1 = res'; tl1 = vect_of_int res `Eight } 1200 else 1201 { status with th1 = res'; tl0 = vect_of_int res `Eight } 1202 else 1203 { status with tl1 = vect_of_int res `Eight } 1204 else 1205 status 1206  false,false > 1207 (* 8 bit split timer mode. *) 1208 let status = 1209 (if b then 1210 let res,cy,ov,ac = add8_with_c status.tl1 (vect_of_int ticks `Eight) false in 1211 if ov then 1212 let b = set_bit status.tcon 5 true in 1213 { status with tcon = b; tl1 = res } 1214 else 1215 { status with tl1 = res } 1216 else 1217 status) 1218 in 1219 if get_bit status.tcon 6 then 1220 let res,cy,ov,ac = add8_with_c status.th1 (vect_of_int ticks `Eight) false in 1221 if ov then 1222 let b = set_bit status.tcon 7 true in 1223 { status with tcon = b; th1 = res } 1224 else 1225 { status with th1 = res } 1226 else 1227 status 1228  false,true > 1229 (* 16 bit timer mode. *) 1230 if b then 1231 let res,_,ov,_ = add16_with_c (mk_word status.th0 status.tl1) (vect_of_int ticks `Sixteen) false in 1232 if ov then 1233 let b = set_bit status.tcon 5 true in 1234 let new_th1,new_tl1 = from_word res in 1235 { status with tcon = b; th1 = new_th1; tl1 = new_tl1 } 1236 else 1237 let new_th1,new_tl1 = from_word res in 1238 { status with th1 = new_th1; tl1 = new_tl1 } 1239 else 1240 status 1241  true,false > 1242 (* 8 bit single timer mode. *) 1243 if b then 1244 let res,_,ov,_ = add8_with_c status.tl1 (vect_of_int ticks `Eight) false in 1245 if ov then 1246 let b = set_bit status.tcon 5 true in 1247 { status with tcon = b; tl1 = status.th1; } 1248 else 1249 { status with tl1 = res } 1250 else 1251 status) 1117 1252 1118 1253 let execute1 status = … … 1407 1542 (* DPM: Clock/Timer code follows. *) 1408 1543 match bits_of_byte status.tmod with 1409 (true,_,_,_),_ > assert false 1410  (_,true,_,_),_ > assert false 1544 (*  (_,true,_,_),_ > assert false 1411 1545  _,(true,_,_,_) > assert false 1412  _,(_,true,_,_) > assert false 1413  (_,_,b1,b2),(_,_,b3,b4) > 1414 let b = get_bit status.tcon 4 in 1415 let status = 1416 (* Timer0 first *) 1417 (match b1,b2 with 1418 true,true > 1419 (* Archaic 13 bit mode. *) 1420 if b then 1421 let res,_,_,_ = add8_with_c status.tl0 (vect_of_int ticks `Eight) false in 1422 let res = int_of_vect res in 1423 if res > 31 then 1424 let res = res mod 32 in 1425 let res',cy',ov',ac' = add8_with_c status.th0 (vect_of_int 1 `Eight) false in 1426 if ov' then 1427 let b = set_bit status.tcon 7 true in 1428 { status with tcon = b; th0 = res'; tl0 = vect_of_int res `Eight } 1429 else 1430 { status with th0 = res'; tl0 = vect_of_int res `Eight } 1431 else 1432 { status with tl0 = vect_of_int res `Eight } 1433 else 1434 status 1435  false,false > 1436 (* 8 bit split timer mode. *) 1437 let status = 1438 (if b then 1439 let res,cy,ov,ac = add8_with_c status.tl0 (vect_of_int ticks `Eight) false in 1440 if ov then 1441 let b = set_bit status.tcon 5 true in 1442 { status with tcon = b; tl0 = res } 1443 else 1444 { status with tl0 = res } 1445 else 1446 status) 1447 in 1448 if get_bit status.tcon 6 then 1449 let res,cy,ov,ac = add8_with_c status.th0 (vect_of_int ticks `Eight) false in 1450 if ov then 1451 let b = set_bit status.tcon 7 true in 1452 { status with tcon = b; th0 = res } 1453 else 1454 { status with th0 = res } 1455 else 1456 status 1457  false,true > 1458 (* 16 bit timer mode. *) 1459 if b then 1460 let res,_,ov,_ = add16_with_c (mk_word status.th0 status.tl0) (vect_of_int ticks `Sixteen) false in 1461 if ov then 1462 let b = set_bit status.tcon 5 true in 1463 let new_th0,new_tl0 = from_word res in 1464 { status with tcon = b; th0 = new_th0; tl0 = new_tl0 } 1465 else 1466 let new_th0,new_tl0 = from_word res in 1467 { status with th0 = new_th0; tl0 = new_tl0 } 1468 else 1469 status 1470  true,false > 1471 (* 8 bit single timer mode. *) 1472 if b then 1473 let res,_,ov,_ = add8_with_c status.tl0 (vect_of_int ticks `Eight) false in 1474 if ov then 1475 let b = set_bit status.tcon 5 true in 1476 { status with tcon = b; tl0 = status.th0; } 1477 else 1478 { status with tl0 = res } 1479 else 1480 status) in 1481 (* Timer 1 follows. *) 1482 let status = 1483 (match b3,b4 with 1484 true,true > 1485 (* Archaic 13 bit mode. *) 1486 if b then 1487 let res,_,_,_ = add8_with_c status.tl1 (vect_of_int ticks `Eight) false in 1488 let res = int_of_vect res in 1489 if res > 31 then 1490 let res = res mod 32 in 1491 let res',cy',ov',ac' = add8_with_c status.th1 (vect_of_int 1 `Eight) false in 1492 if ov' then 1493 let b = set_bit status.tcon 7 true in 1494 { status with tcon = b; th1 = res'; tl1 = vect_of_int res `Eight } 1495 else 1496 { status with th1 = res'; tl0 = vect_of_int res `Eight } 1497 else 1498 { status with tl1 = vect_of_int res `Eight } 1499 else 1500 status 1501  false,false > 1502 (* 8 bit split timer mode. *) 1503 let status = 1504 (if b then 1505 let res,cy,ov,ac = add8_with_c status.tl1 (vect_of_int ticks `Eight) false in 1506 if ov then 1507 let b = set_bit status.tcon 5 true in 1508 { status with tcon = b; tl1 = res } 1509 else 1510 { status with tl1 = res } 1511 else 1512 status) 1513 in 1514 if get_bit status.tcon 6 then 1515 let res,cy,ov,ac = add8_with_c status.th1 (vect_of_int ticks `Eight) false in 1516 if ov then 1517 let b = set_bit status.tcon 7 true in 1518 { status with tcon = b; th1 = res } 1519 else 1520 { status with th1 = res } 1521 else 1522 status 1523  false,true > 1524 (* 16 bit timer mode. *) 1525 if b then 1526 let res,_,ov,_ = add16_with_c (mk_word status.th0 status.tl1) (vect_of_int ticks `Sixteen) false in 1527 if ov then 1528 let b = set_bit status.tcon 5 true in 1529 let new_th1,new_tl1 = from_word res in 1530 { status with tcon = b; th1 = new_th1; tl1 = new_tl1 } 1531 else 1532 let new_th1,new_tl1 = from_word res in 1533 { status with th1 = new_th1; tl1 = new_tl1 } 1534 else 1535 status 1536  true,false > 1537 (* 8 bit single timer mode. *) 1538 if b then 1539 let res,_,ov,_ = add8_with_c status.tl1 (vect_of_int ticks `Eight) false in 1540 if ov then 1541 let b = set_bit status.tcon 5 true in 1542 { status with tcon = b; tl1 = status.th1; } 1543 else 1544 { status with tl1 = res } 1545 else 1546 status) in 1546  _,(_,true,_,_) > assert false*) 1547  (g1,c1,b1,b2),(g0,c0,b3,b4) > 1548 let status = 1549 (if g0 then 1550 if get_bit status.p3 2 then 1551 timer0 status b1 b2 ticks 1552 else 1553 status 1554 else 1555 timer0 status b1 b2 ticks) in 1556 (* Timer 1 follows. *) 1557 let status = 1558 (if g1 then 1559 if get_bit status.p1 3 then 1560 timer1 status b3 b4 ticks 1561 else 1562 status 1563 else 1564 timer1 status b3 b4 ticks) in 1547 1565 (* Serial port code now follows *) 1548 1566 let in_cont, `Out out_cont = status.io in … … 1553 1571 let status = 1554 1572 match line with 1555 `P1 b > assert false 1556  `P3 b > assert false 1573 `P1 b > 1574 { status with p1 = b; p1_latch = b; } 1575  `P3 b > { status with p3 = b; p3_latch = b; } 1557 1576  `SerialBuff (`Eight b) > 1558 1577 let b7 = get_bit (status.scon) 7 in
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