Ignore:
Timestamp:
Nov 25, 2011, 7:43:39 PM (8 years ago)
Author:
tranquil
Message:
  • Immediates introduced (but not fully used yet in RTLabs to RTL pass)
  • translation streamlined
  • BUGGY: interpretation fails in LTL, trying to fetch a function with incorrect address
File:
1 edited

Legend:

Unmodified
Added
Removed
  • Deliverables/D2.2/8051/src/LIN/LINToASM.ml

    r1542 r1568  
    5555let byte_of_int i = vect_of_int i `Eight
    5656let data_of_int i = `DATA (byte_of_int i)
     57let reg_or_data = function
     58  | LTL.Imm k -> data_of_int k
     59  | LTL.Reg r -> I8051.reg_addr r
    5760let data16_of_int i = `DATA16 (vect_of_int i `Sixteen)
    5861let acc_addr = I8051.reg_addr I8051.a
     
    9598  | LIN.St_op1 I8051.Inc ->
    9699    [`INC `A]
    97   | LIN.St_op2 (I8051.Add, r) ->
    98     [`ADD (`A, I8051.reg_addr r)]
    99   | LIN.St_op2 (I8051.Addc, r) ->
    100     [`ADDC (`A, I8051.reg_addr r)]
    101   | LIN.St_op2 (I8051.Sub, r) ->
    102     [`SUBB (`A, I8051.reg_addr r)]
     100  | LIN.St_op1 I8051.Rl ->
     101    [`RL `A]
     102  | LIN.St_op2 (I8051.Add, a) ->
     103    [`ADD (`A, reg_or_data a)]
     104  | LIN.St_op2 (I8051.Addc, a) ->
     105    [`ADDC (`A, reg_or_data a)]
     106  | LIN.St_op2 (I8051.Sub, a) ->
     107    [`SUBB (`A, reg_or_data a)]
    103108  | LIN.St_op2 (I8051.And, r) ->
    104     [`ANL (`U1 (`A, I8051.reg_addr r))]
     109    [`ANL (`U1 (`A, reg_or_data r))]
    105110  | LIN.St_op2 (I8051.Or, r) ->
    106     [`ORL (`U1 (`A, I8051.reg_addr r))]
     111    [`ORL (`U1 (`A, reg_or_data r))]
    107112  | LIN.St_op2 (I8051.Xor, r) ->
    108     [`XRL (`U1 (`A, I8051.reg_addr r))]
     113    [`XRL (`U1 (`A, reg_or_data r))]
    109114  | LIN.St_clear_carry ->
    110115    [`CLR `C]
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