Changeset 147 for Deliverables/D4.1
- Timestamp:
- Sep 30, 2010, 6:46:44 PM (10 years ago)
- Location:
- Deliverables/D4.1
- Files:
-
- 5 edited
Legend:
- Unmodified
- Added
- Removed
-
Deliverables/D4.1/ASMInterpret.ml
r145 r147 387 387 let pc,b1 = next pc in 388 388 let pc,b2 = next pc in 389 `MOV (`U3 (`DIRECT b1, `DATA b2)), pc, 2389 `MOV (`U3 (`DIRECT b1, `DATA b2)), pc, 3 390 390 | (true,true,true,true),(false,true,true,i1) -> 391 391 `MOV (`U2 (`INDIRECT i1, `A)), pc, 1 … … 992 992 | `INC ((`A | `REG _ | `DIRECT _ | `INDIRECT _) as d) -> 993 993 let b = get_arg_8 status d in 994 let cry, res = half_add b (vect_of_int 0`Eight) in994 let cry, res = half_add b (vect_of_int 1 `Eight) in 995 995 set_arg_8 status res d 996 996 | `DEC d -> … … 1132 1132 | `JC (`REL rel) -> 1133 1133 if get_cy_flag status then 1134 let cry, new_pc = half_add status.pc ( mk_word (zero `Eight)rel) in1134 let cry, new_pc = half_add status.pc (sign_extension rel) in 1135 1135 { status with pc = new_pc } 1136 1136 else … … 1138 1138 | `JNC (`REL rel) -> 1139 1139 if not $ get_cy_flag status then 1140 let cry, new_pc = half_add status.pc ( mk_word (zero `Eight)rel) in1140 let cry, new_pc = half_add status.pc (sign_extension rel) in 1141 1141 { status with pc = new_pc } 1142 1142 else … … 1144 1144 | `JB (b, (`REL rel)) -> 1145 1145 if get_arg_1 status b then 1146 let cry, new_pc = half_add status.pc ( mk_word (zero `Eight)rel) in1146 let cry, new_pc = half_add status.pc (sign_extension rel) in 1147 1147 { status with pc = new_pc } 1148 1148 else … … 1150 1150 | `JNB (b, (`REL rel)) -> 1151 1151 if not $ get_arg_1 status b then 1152 let cry, new_pc = half_add status.pc ( mk_word (zero `Eight)rel) in1152 let cry, new_pc = half_add status.pc (sign_extension rel) in 1153 1153 { status with pc = new_pc } 1154 1154 else … … 1157 1157 let status = set_arg_1 status false b in 1158 1158 if get_arg_1 status b then 1159 let cry, new_pc = half_add status.pc ( mk_word (zero `Eight)rel) in1159 let cry, new_pc = half_add status.pc (sign_extension rel) in 1160 1160 { status with pc = new_pc } 1161 1161 else … … 1179 1179 { status with pc = mk_word high_bits low_bits } 1180 1180 | `ACALL (`ADDR11 a) -> 1181 let cry, new_pc = half_add status.pc (vect_of_int 2 `Sixteen) in1182 let status = { status with pc = new_pc } in1183 1181 let cry, new_sp = half_add status.sp (vect_of_int 1 `Eight) in 1184 1182 let status = { status with sp = new_sp } in … … 1194 1192 { status with pc = addr } 1195 1193 | `LCALL (`ADDR16 addr) -> 1196 let cry, new_pc = half_add status.pc (vect_of_int 3 `Sixteen) in1197 let status = { status with pc = new_pc } in1198 1194 let cry, new_sp = half_add status.sp (vect_of_int 1 `Eight) in 1199 1195 let status = { status with sp = new_sp } in … … 1205 1201 { status with pc = addr } 1206 1202 | `AJMP (`ADDR11 a) -> 1207 let cry, new_pc = half_add status.pc (vect_of_int 2 `Sixteen) in1208 let status = { status with pc = new_pc } in1209 1203 let pc_upper_byte, pc_lower_byte = from_word status.pc in 1210 1204 let n1, n2 = from_byte pc_upper_byte in … … 1217 1211 { status with pc = a } 1218 1212 | `SJMP (`REL rel) -> 1219 let cry, new_pc = half_add status.pc ( mk_word (zero `Eight)rel) in1213 let cry, new_pc = half_add status.pc (sign_extension rel) in 1220 1214 { status with pc = new_pc } 1221 1215 | `JMP `IND_DPTR -> … … 1227 1221 | `JZ (`REL rel) -> 1228 1222 if status.acc = zero `Eight then 1229 let cry, new_pc = half_add status.pc ( mk_word (zero `Eight)rel) in1223 let cry, new_pc = half_add status.pc (sign_extension rel) in 1230 1224 { status with pc = new_pc } 1231 1225 else … … 1233 1227 | `JNZ (`REL rel) -> 1234 1228 if status.acc <> zero `Eight then 1235 let cry, new_pc = half_add status.pc ( mk_word (zero `Eight)rel) in1229 let cry, new_pc = half_add status.pc (sign_extension rel) in 1236 1230 { status with pc = new_pc } 1237 1231 else … … 1240 1234 let new_carry = status.acc < get_arg_8 status ag in 1241 1235 if get_arg_8 status ag <> status.acc then 1242 let cry, new_pc = half_add status.pc ( mk_word (zero `Eight)rel) in1236 let cry, new_pc = half_add status.pc (sign_extension rel) in 1243 1237 let status = set_flags status new_carry None (get_ov_flag status) in 1244 1238 { status with pc = new_pc; } … … 1248 1242 let new_carry = get_arg_8 status ag < d in 1249 1243 if get_arg_8 status ag <> d then 1250 let cry, new_pc = half_add status.pc ( mk_word (zero `Eight)rel) in1244 let cry, new_pc = half_add status.pc (sign_extension rel) in 1251 1245 let status = { status with pc = new_pc } in 1252 1246 set_flags status new_carry None (get_ov_flag status) … … 1257 1251 let status = set_arg_8 status new_ag ag in 1258 1252 if new_ag <> zero `Eight then 1259 let cry, new_pc = half_add status.pc ( mk_word (zero `Eight)rel) in1253 let cry, new_pc = half_add status.pc (sign_extension rel) in 1260 1254 { status with pc = new_pc } 1261 1255 else -
Deliverables/D4.1/BitVectors.ml
r142 r147 67 67 let full_add l r c = List.fold_right2 (fun b1 b2 (c,r) -> b1 & b2 || c & (b1 || b2),xor (xor b1 b2) c::r) l r (c,[]) 68 68 let half_add l r = full_add l r false 69 70 let sign_extension = 71 function 72 [] -> assert false 73 | (he::_) as l -> 74 [he;he;he;he;he;he;he;he] @ l 75 ;; 76 69 77 70 78 let rec split_last = -
Deliverables/D4.1/BitVectors.mli
r140 r147 33 33 val hex_string_of_vect: 'a vect -> string 34 34 35 36 35 val (-&-): 'a vect -> 'a vect -> 'a vect 37 36 val (-|-): 'a vect -> 'a vect -> 'a vect … … 49 48 val half_add: 'a vect -> 'a vect -> bit * 'a vect 50 49 val full_add: 'a vect -> 'a vect -> bit -> bit * 'a vect 50 val sign_extension: byte -> word 51 51 52 52 val rotate_left : 'a vect -> 'a vect -
Deliverables/D4.1/Pretty.ml
r146 r147 8 8 | `C -> "C" 9 9 | `DPTR -> "DPTR" 10 | `ADDR11 x -> "addr11"11 | `ADDR16 x -> "addr16"12 | `DATA x -> " data"13 | `DATA16 x -> " data16"14 | `BIT x -> "bit "15 | `NBIT x -> "nbit "16 | `REG x -> "reg"17 | `REL x -> "rel"10 | `ADDR11 x -> hex_string_of_vect x 11 | `ADDR16 x -> hex_string_of_vect x 12 | `DATA x -> "#" ^ hex_string_of_vect x 13 | `DATA16 x -> "#" ^ hex_string_of_vect x 14 | `BIT x -> "bit " ^ hex_string_of_vect (x: byte) 15 | `NBIT x -> "nbit " ^ hex_string_of_vect (x: byte) 16 | `REG (r1, r2, r3) -> "R" ^ string_of_int (int_of_vect (mk_nibble false r1 r2 r3)) 17 | `REL x -> hex_string_of_vect x 18 18 | `A_DPTR -> "@DPTR" 19 19 | `A_PC -> "@PC" 20 | `DIRECT x -> "direct"21 | `EXT_INDIRECT x -> "ext_indirect "20 | `DIRECT x -> hex_string_of_vect (x: byte) 21 | `EXT_INDIRECT x -> "ext_indirect " ^ string_of_bool x 22 22 | `EXT_IND_DPTR -> "ext_indirect_dptr" 23 | `INDIRECT x -> "indirect"24 | `IND_DPTR -> " ind_dptr"23 | `INDIRECT x -> if x then "@R0" else "@R1" 24 | `IND_DPTR -> "@DPTR" 25 25 ;; 26 26 -
Deliverables/D4.1/test.ml
r145 r147 1 open BitVectors;; 2 open Util;; 3 open Pretty;; 4 1 5 let hex = IntelHex.intel_hex_of_file "Test.hex" in 2 6 let mem = IntelHex.process_intel_hex hex in … … 6 10 let instr,_,_ = ASMInterpret.fetch status.ASMInterpret.code_memory pc in 7 11 prerr_string (BitVectors.hex_string_of_vect pc) ; 8 prerr_endline (": " ^ Pretty.pp_instruction instr)12 prerr_endline (": " ^ pp_instruction instr) 9 13 in 14 (* DPM: for debugging! *) 15 let mem_pretty_print status = 16 let rec aux status pc = 17 let instr, pc', cost = ASMInterpret.fetch status.ASMInterpret.code_memory pc in 18 prerr_string $ ((hex_string_of_vect pc) ^ ": "); 19 prerr_string $ (pp_instruction instr) ^ " "; 20 prerr_endline $ string_of_int cost; 21 if int_of_vect pc' > 105 then (* DPM: hardcoded on a case-by-case basis *) 22 () 23 else 24 aux status pc' 25 in 26 aux status status.ASMInterpret.pc; 27 prerr_endline "-------------------------------------" 28 in 29 (* mem_pretty_print status; *) 10 30 ASMInterpret.execute observe status 11 31 ;;
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