Changeset 143


Ignore:
Timestamp:
Sep 29, 2010, 1:41:12 PM (9 years ago)
Author:
sacerdot
Message:

More SFRs (8052 ones were missing).
SFR catalogation (is that fully correct?).

Location:
Deliverables/D4.1
Files:
2 edited

Legend:

Unmodified
Added
Removed
  • Deliverables/D4.1/ASMInterpret.ml

    r142 r143  
    4949   acc: byte;
    5050   b: byte;
     51   t2con: byte;  (* 8052 only *)
     52   rcap2l: byte;  (* 8052 only *)
     53   rcap2h: byte;  (* 8052 only *)
     54   tl2: byte;  (* 8052 only *)
     55   th2: byte;  (* 8052 only *)
    5156
    5257   clock: time;
     
    6166let get_sfr status addr =
    6267 match int_of_vect addr with
     68  (* I/O and timer ports *)
    6369    0x80 -> status.p0
    64   | 0x81 -> status.sp
    65   | 0x82 -> status.dpl
    66   | 0x83 -> status.dph
    67   | 0x87 -> status.pcon
    68   | 0x88 -> status.tcon
    69   | 0x89 -> status.tmod
     70  | 0x90 -> status.p1
     71  | 0xA0 -> status.p2
     72  | 0xB0 -> status.p3
     73  | 0x99 -> status.sbuf
    7074  | 0x90 -> status.tl0
    7175  | 0x91 -> status.tl1
    7276  | 0x92 -> status.th0
    7377  | 0x93 -> status.th1
    74   | 0x90 -> status.p1
     78  | 0xC8 -> status.t2con
     79  | 0xCA -> status.rcap2l
     80  | 0xCB -> status.rcap2h
     81  | 0xCD -> status.tl2
     82  | 0xCE -> status.th2
     83
     84  (* control ports *)
     85  | 0x87 -> status.pcon
     86  | 0x88 -> status.tcon
     87  | 0x89 -> status.tmod
    7588  | 0x98 -> status.scon
    76   | 0x99 -> status.sbuf
    77   | 0xA0 -> status.p2
    7889  | 0xA8 -> status.ie
    79   | 0xB0 -> status.p3
    8090  | 0xB8 -> status.ip
     91
     92  (* registers *)
     93  | 0x81 -> status.sp
     94  | 0x82 -> status.dpl
     95  | 0x83 -> status.dph
    8196  | 0xD0 -> status.psw
    8297  | 0xE0 -> status.acc
     
    88103let set_sfr status addr v =
    89104 match int_of_vect addr with
     105  (* I/O and timer ports *)
    90106    0x80 -> { status with p0 = v }
    91   | 0x81 -> { status with sp = v }
    92   | 0x82 -> { status with dpl = v }
    93   | 0x83 -> { status with dph = v }
    94   | 0x87 -> { status with pcon = v }
    95   | 0x88 -> { status with tcon = v }
    96   | 0x89 -> { status with tmod = v }
     107  | 0x90 -> { status with p1 = v }
     108  | 0xA0 -> { status with p2 = v }
     109  | 0xB0 -> { status with p3 = v }
     110  | 0x99 -> { status with sbuf = v }
    97111  | 0x90 -> { status with tl0 = v }
    98112  | 0x91 -> { status with tl1 = v }
    99113  | 0x92 -> { status with th0 = v }
    100114  | 0x93 -> { status with th1 = v }
    101   | 0x90 -> { status with p1 = v }
     115  | 0xC8 -> { status with t2con = v }
     116  | 0xCA -> { status with rcap2l = v }
     117  | 0xCB -> { status with rcap2h = v }
     118  | 0xCD -> { status with tl2 = v }
     119  | 0xCE -> { status with th2 = v }
     120
     121  (* control ports *)
     122  | 0x87 -> { status with pcon = v }
     123  | 0x88 -> { status with tcon = v }
     124  | 0x89 -> { status with tmod = v }
    102125  | 0x98 -> { status with scon = v }
    103   | 0x99 -> { status with sbuf = v }
    104   | 0xA0 -> { status with p2 = v }
    105126  | 0xA8 -> { status with ie = v }
    106   | 0xB0 -> { status with p3 = v }
    107127  | 0xB8 -> { status with ip = v }
     128
     129  (* registers *)
     130  | 0x81 -> { status with sp = v }
     131  | 0x82 -> { status with dpl = v }
     132  | 0x83 -> { status with dph = v }
    108133  | 0xD0 -> { status with psw = v }
    109134  | 0xE0 -> { status with acc = v }
     
    141166  acc = zero `Eight;
    142167  b = zero `Eight;
     168  t2con = zero `Eight;
     169  rcap2l = zero `Eight;
     170  rcap2h = zero `Eight;
     171  tl2 = zero `Eight;
     172  th2 = zero `Eight;
     173
    143174  clock = 0;
    144175  timer0 = zero `Sixteen;
  • Deliverables/D4.1/ASMInterpret.mli

    r141 r143  
    4242   acc: byte;
    4343   b: byte;
     44   t2con: byte; (* 8052 only *)
     45   rcap2l: byte; (* 8052 only *)
     46   rcap2h: byte; (* 8052 only *)
     47   tl2: byte; (* 8052 only *)
     48   th2: byte; (* 8052 only *)
    4449
    4550   clock: time;
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