Ignore:
Timestamp:
Sep 29, 2010, 1:27:40 PM (9 years ago)
Author:
sacerdot
Message:

Rough implementation of direct (i.e. no BIT) SFR access.
Note: I/O is not handled properly. Thus the current implementation only
makes sense for real registers like SP, PSW, etc.

File:
1 edited

Legend:

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Added
Removed
  • Deliverables/D4.1/ASMInterpret.ml

    r138 r142  
    5656   io: continuation
    5757 }
     58
     59(* Try to understand what DEC really does!!! *)
     60(* Try to understand I/O *)
     61let get_sfr status addr =
     62 match int_of_vect addr with
     63    0x80 -> status.p0
     64  | 0x81 -> status.sp
     65  | 0x82 -> status.dpl
     66  | 0x83 -> status.dph
     67  | 0x87 -> status.pcon
     68  | 0x88 -> status.tcon
     69  | 0x89 -> status.tmod
     70  | 0x90 -> status.tl0
     71  | 0x91 -> status.tl1
     72  | 0x92 -> status.th0
     73  | 0x93 -> status.th1
     74  | 0x90 -> status.p1
     75  | 0x98 -> status.scon
     76  | 0x99 -> status.sbuf
     77  | 0xA0 -> status.p2
     78  | 0xA8 -> status.ie
     79  | 0xB0 -> status.p3
     80  | 0xB8 -> status.ip
     81  | 0xD0 -> status.psw
     82  | 0xE0 -> status.acc
     83  | 0xF0 -> status.b
     84  | _ -> assert false
     85;;
     86
     87(* Try to understand I/O *)
     88let set_sfr status addr v =
     89 match int_of_vect addr with
     90    0x80 -> { status with p0 = v }
     91  | 0x81 -> { status with sp = v }
     92  | 0x82 -> { status with dpl = v }
     93  | 0x83 -> { status with dph = v }
     94  | 0x87 -> { status with pcon = v }
     95  | 0x88 -> { status with tcon = v }
     96  | 0x89 -> { status with tmod = v }
     97  | 0x90 -> { status with tl0 = v }
     98  | 0x91 -> { status with tl1 = v }
     99  | 0x92 -> { status with th0 = v }
     100  | 0x93 -> { status with th1 = v }
     101  | 0x90 -> { status with p1 = v }
     102  | 0x98 -> { status with scon = v }
     103  | 0x99 -> { status with sbuf = v }
     104  | 0xA0 -> { status with p2 = v }
     105  | 0xA8 -> { status with ie = v }
     106  | 0xB0 -> { status with p3 = v }
     107  | 0xB8 -> { status with ip = v }
     108  | 0xD0 -> { status with psw = v }
     109  | 0xE0 -> { status with acc = v }
     110  | 0xF0 -> { status with b = v }
     111  | _ -> assert false
     112;;
    58113
    59114let initialize = {
     
    735790          (false,r1,r2,r3) ->
    736791            Byte7Map.find (mk_byte7 r1 r2 r3 n1) status.low_internal_ram
    737         | (true,r1,r2,r3) ->
    738              (*CSC: SFR access, TO BE IMPLEMENTED *)
    739             assert false)
     792        | _ -> get_sfr status addr)
    740793  | `INDIRECT b ->
    741794       let (b1, b2) = from_byte (get_register status (false,false,b)) in
     
    800853              | Some n_bit' ->
    801854                  { status with low_internal_ram = Byte7Map.add addr' n_bit' status.low_internal_ram })
    802                         | (true,r1,r2,r3) ->
     855      | (true,r1,r2,r3) ->
    803856           (*CSC: SFR access, TO BE IMPLEMENTED *)
    804857           (* assert false for now. Try to understand what DEC really does *)
     
    817870           { status with low_internal_ram =
    818871              Byte7Map.add (mk_byte7 r1 r2 r3 b2) v status.low_internal_ram }
    819        | (true,r1,r2,r3) ->
    820            (*CSC: SFR access, TO BE IMPLEMENTED *)
    821            (* assert false for now. Try to understand what DEC really does *)
    822 prerr_endline ("!!! SFR USED !!!");
    823            status (*assert false*))
     872       | _ -> set_sfr status addr v)
    824873  | `INDIRECT b ->
    825874     let (b1, b2) = from_byte (get_register status (false,false,b)) in
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