Changeset 1017 for src/ASM/CPP2011


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Timestamp:
Jun 21, 2011, 11:15:31 AM (8 years ago)
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mulligan
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complete, just under 16 pages

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  • src/ASM/CPP2011/cpp-2011.tex

    r1016 r1017  
    6969This formalisation forms a major component of the EU-funded CerCo project~\cite{cerco:2011}, concering the construction and formalisation of a concrete complexity preserving compiler for a large subset of the C programming language.
    7070
    71 The MCS-51 dates from the early 1980s and is commonly called the 8051/8052.
     71The MCS-51 dates from the early 1980s and is commonly called the 8051/8052.\footnote{Being strict, the 8051 and 8052 are two different microprocessors, though the features that the 8052 added over the 8051 are minor, and largely irrelevant for our formalisation project.}
    7272Despite the microprocessor's age, derivatives are still widely manufactured by a number of semiconductor foundries.
    7373As a result the processor is widely used, especially in embedded systems development, where well-tested, cheap, predictable microprocessors find their niche.
     
    7676In particular, the MCS-51 does not possess a cache or any instruction pipelining that would make predicting the concrete cost of executing a single instruction an involved process.
    7777Instead, each semiconductor foundry that produces an MCS-51 derivative is able to provide accurate timing information in clock cycles for each instruction in their derivative's instruction set.
    78 It is important to stress that this timing information, unlike in more sophisticated processors, is not an estimate, it is a definition.
     78It is important to stress that this timing information, unlike in more sophisticated processors, is not an estimate, it is a `definition'.
    7979For the MCS-51, if a manufacturer states that a particular opcode takes three clock cycles to execute, then that opcode \emph{always} takes three clock cycles to execute.
    8080
    8181This predicability of timing information is especially attractive to the CerCo consortium.
    82 We are in the process of constructing a certified, concrete complexity compiler for a realistic processor, and not for building and formalising the worst case execution time (WCET) tools that would be necessary to achieve the same result with, for example, a modern ARM or PowerPC microprocessor.
    83 
    84 However, the MCS-51's paucity of features is a double edged sword.
    85 In particular, the MCS-51 features relatively miniscule memory spaces (including read-only code memory, stack and internal/external random access memory) by modern standards.
    86 As a result our compiler, to have any sort of hope of successfully compiling realistic C programs, ought to produce `tight' machine code.
     82We are in the process of constructing a certified, concrete complexity compiler for a realistic processor, and not for building and formalising the worst case execution time tools (WCET---see~\cite{yan:wcet:2008} and~\cite{bate:wcet:2011}, amongst many others, for an application of WCET technology to microprocessors with more complex designs) that would be necessary to achieve the same result with, for example, a modern ARM or PowerPC microprocessor.
     83
     84As in most things, what one hand giveth, the other taketh away: the MCS-51's paucity of features, though an advantage in many respects, also quickly become a hindrance, and successfully compiling high-level code for this architecture is a cumbrous and involved process.
     85In particular, the MCS-51 features a relatively miniscule series of memory spaces (including read-only code memory, stack and internal/external random access memory) by modern standards.
     86As a result our C compiler, to have any sort of hope of successfully compiling realistic programs for embedded devices, ought to produce `tight' machine code.
    8787This is not simple and requires the use of optimisations.
    8888
    8989For example, the MCS-51 features three unconditional jump instructions: \texttt{LJMP} and \texttt{SJMP}---`long jump' and `short jump' respectively---and an 11-bit oddity of the MCS-51, \texttt{AJMP}.
    90 Each of these three instructions expects arguments in different sizes and behaves in different ways: \texttt{SJMP} may only perform a `local jump'; \texttt{LJMP} may jump to any address in the MCS-51's memory space and \texttt{AJMP} may jump to any address in the current memory page.
    91 Consequently, the size of each opcode is different, and to squeeze as much code as possible into the MCS-51's limited code memory, the smallest possible opcode should be selected.
    92 
    93 The prototype CerCo C compiler does not attempt to select the smallest jump opcode in this manner, as this was thought to unneccessarily complicate the compilation chain.
    94 Instead, the compiler targets an assembly language, complete with pseudoinstructions including bespoke \texttt{Jmp} and \texttt{Call} instructions.
     90Each of these three instructions expects arguments in different sizes and behaves in markedly different ways: \texttt{SJMP} may only perform a `local jump'; \texttt{LJMP} may jump to any address in the MCS-51's memory space and \texttt{AJMP} may jump to any address in the current memory page.
     91Consequently, the size of each opcode is different, and to squeeze as much code as possible into the MCS-51's limited code memory, the smallest possible opcode that will suffice should be selected.
     92
     93The prototype CerCo C compiler does not attempt to select the smallest jump opcode in this manner, as this was thought to unneccessarily complicate the compilation chain, making the eventual translation and formalisation of the compiler into Matita much harder.
     94Instead, the compiler targets a bespoke assembly language, similar to `real world' assembly languages, complete with pseudoinstructions including \texttt{Jmp} and \texttt{Call} instructions.
    9595Labels, conditional jumps to labels, a program preamble containing global data and a \texttt{MOV} instruction for moving this global data into the MCS-51's one 16-bit register also feature.
    9696This latter feature will ease any later consideration of separate compilation in the CerCo compiler.
     
    106106More generally, memory addresses can only be compared with other memory addresses.
    107107However, checking that memory addresses are only compared against each other at the assembly level is in fact undecidable.
    108 In short, we come to the shocking realisation that, with optimisations, the full preservation of the semantics of the two languages is impossible.
     108In short, we come to the shocking\footnote{For us, anyway.} realisation that, with optimisations, the full preservation of the semantics of all assembly programs is impossible.
    109109We believe that this revelation is significant for large formalisation projects that assume the existence of a correct assembler.
    110 Projects in this class include both the recent CompCert~\cite{compcert:2011,leroy:formal:2009} and seL4 formalisations~\cite{klein:sel4:2009}.
     110Projects in this class include both the recent CompCert~\cite{compcert:2011,leroy:formal:2009} and seL4 formalisations~\cite{klein:sel4:2009,klein:sel4:2010}.
    111111
    112112Yet, the situation is even more complex than having to expand pseudoinstructions correctly.
    113113In particular, when formalising the assembler, we must make sure that the assembly process does not change the timing characteristics of an assembly program for two reasons.
     114
    114115First, the semantics of some functions of the MCS-51, notably I/O, depend on the microprocessor's clock.
    115116Changing how long a particular program takes to execute can affect the semantics of a program.
     
    121122However in any realistic compiler (even the CompCert compiler!) there is no guarantee that the program's time properties are preserved during the compilation process; a compiler's `optimisations' could, in theory, even conspire to degrade the concrete complexity of certain classes of programs.
    122123CerCo aims to expand the current state of the art by producing a compiler where this temporal degradation is guaranteed not to happen.
    123 Moreover, CerCo's approach lifts a program's timing information to the source (C language) level, wherein the programmer can reason about a program's intensional properties by directly examining the source code that they write.
    124 
    125 In order to achieve this CerCo imposes a cost model on programs, or more specifically, on simple blocks of instructions.
     124Moreover, CerCo's approach lifts a program's timing information to the source (C language) level.
     125This has the advantage of allowing a programmer to reason about a program's intensional properties directly on the source code that they write, not on the code that the compiler produces.
     126
     127In order to achieve this, CerCo imposes a cost model on programs or, more specifically, on simple blocks of instructions.
    126128This cost model is induced by the compilation process itself, and its non-compositional nature allows us to assign different costs to identical blocks of instructions depending on how they are compiled.
    127129In short, we aim to obtain a very precise costing for a program by embracing the compilation process, not ignoring it.
    128 This, however, complicates the proof of correctness for the compiler proper: for every translation pass from intermediate language to intermediate language, we must prove that not only has the meaning of a program been preserved, but also its complexity characteristics.
     130This, however, complicates the proof of correctness for the compiler proper: for every translation pass from intermediate language to intermediate language, we must prove that not only has the meaning of a program been preserved, but also its concrete complexity characteristics.
    129131This also applies for the translation from assembly language to machine code.
    130132
    131 How do we assign a cost to a pseudoinstruction?
     133Naturally, this raises a question: how do we assign an \emph{accurate} cost to a pseudoinstruction?
    132134As mentioned, conditional jumps at the assembly level can jump to a label appearing anywhere in the program.
    133135However, at the machine code level, conditional jumps are limited to jumping `locally', using a measly byte offset.
    134 To translate a jump to a label, a single conditional jump pseudoinstruction may be translated into a block of three real instructions, as follows (here, \texttt{JZ} is `jump if accumulator is zero'):
     136To translate a jump to a label, a single conditional jump pseudoinstruction may be translated into a block of three real instructions as follows (here, \texttt{JZ} is `jump if accumulator is zero'):
    135137\begin{displaymath}
    136138\begin{array}{r@{\quad}l@{\;\;}l@{\qquad}c@{\qquad}l@{\;\;}l}
    137        & \mathtt{JZ}  & label                      &                 & \mathtt{JZ}   & \text{size of \texttt{SJMP} instruction} \\
     139       & \mathtt{JZ}  & \mathtt{label}                      &                 & \mathtt{JZ}   & \text{size of \texttt{SJMP} instruction} \\
    138140       & \ldots       &                            & \text{translates to}   & \mathtt{SJMP} & \text{size of \texttt{LJMP} instruction} \\
    139 label: & \mathtt{MOV} & \mathtt{A}\;\;\mathtt{B}   & \Longrightarrow & \mathtt{LJMP} & \text{address of \textit{label}} \\
     141\mathtt{label:} & \mathtt{MOV} & \mathtt{A}\;\;\mathtt{B}   & \Longrightarrow & \mathtt{LJMP} & \text{address of \textit{label}} \\
    140142       &              &                            &                 & \ldots        & \\
    141143       &              &                            &                 & \mathtt{MOV}  & \mathtt{A}\;\;\mathtt{B}
     
    143145\end{displaymath}
    144146In the translation, if \texttt{JZ} fails, we fall through to the \texttt{SJMP} which jumps over the \texttt{LJMP}.
    145 Naturally, if \textit{label} is close enough, a conditional jump pseudoinstruction is mapped directly to a conditional jump machine instruction; the above translation only applies if \textit{label} is not sufficiently local.
     147Naturally, if \texttt{label} is close enough, a conditional jump pseudoinstruction is mapped directly to a conditional jump machine instruction; the above translation only applies if \texttt{label} is not sufficiently local.
    146148This leaves the problem, addressed below, of calculating whether a label is indeed `close enough' for the simpler translation to be used.
    147149
    148150Crucially, the above translation demonstrates the difficulty in predicting how many clock cycles a pseudoinstruction will take to execute.
    149151A conditional jump may be mapped to a single machine instruction or a block of three.
    150 Perhaps more insidious, the number of cycles needed to execute the instructions in the two branches of a translated conditional jump may be different.
     152Perhaps more insidious is the realisation that the number of cycles needed to execute the instructions in the two branches of a translated conditional jump may be different.
    151153Depending on the particular MCS-51 derivative at hand, an \texttt{SJMP} could in theory take a different number of clock cycles to execute than an \texttt{LJMP}.
    152 These issues must also be dealt with in order to prove that the translation pass preserves the concrete complexity of the code, and that the semantics of a program using the MCS-51's I/O facilities does not change.
     154These issues must also be dealt with in order to prove that the translation pass preserves the concrete complexity of assembly code, and that the semantics of a program using the MCS-51's I/O facilities does not change.
    153155We address this problem by parameterizing the semantics over a cost model.
    154156We prove the preservation of concrete complexity only for the program-dependent cost model induced by the optimisation.
    155157
    156 The question remains: how do we decide whether to expand a jump into an \texttt{SJMP} or an \texttt{LJMP}?
    157 To understand why this problem is not trivial, consider the following snippet of assembly code:
     158Yet one more question remains: how do we decide whether to expand a jump into an \texttt{SJMP} or an \texttt{LJMP}?
     159To understand, again, why this problem is not trivial, consider the following snippet of assembly code:
    158160\begin{displaymath}
    159161\begin{array}{r@{\qquad}r@{\quad}l@{\;\;}l@{\qquad}l}
     
    172174
    173175Further, consider what happens if, instead of appearing at memory address \texttt{0x100}, the instruction at line 5 instead appeared \emph{just} beyond the size of code memory, and all other memory addresses were shifted accordingly.
    174 Now, in order to be able to successfully fit our program into the MCS-51's code memory, we are \emph{obliged} to shrink the \texttt{LJMP} occurring at line 5.
    175 That is, the shrinking process is not just related to optimisation, but also the completeness of the assembler.
     176Now, in order to be able to successfully fit our program into the MCS-51's limited code memory, we are \emph{obliged} to shrink the \texttt{LJMP} occurring at line 5.
     177That is, the shrinking process is not just related to the optimisation of generated machine code but also the completeness of the assembler itself.
    176178
    177179How we went about resolving this problem affected the shape of our proof of correctness for the whole assembler in a rather profound way.
    178 We first attempted to synthesize a solution bottom up: starting with no solution, we gradually refine a solution using the same functions that implement the jump expansion.
    179 Using this technique, solutions can fail to exist, and the proof quickly descends into a diabolical quagmire.
     180We first attempted to synthesize a solution bottom up: starting with no solution, we gradually refine a solution using the same functions that implement the jump expansion process.
     181Using this technique, solutions can fail to exist, and the proof of correctness for the assembler quickly descends into a diabolical quagmire.
    180182
    181183Abandoning this attempt, we instead split the `policy'---the decision over how any particular jump should be expanded---from the implementation that actually expands assembly programs into machine code.
    182184Assuming the existence of a correct policy, we proved the implementation of the assembler correct.
    183 Further, we proved that the assembler fails to assemble an assembly program if and only if a correct policy does not exist. This is achieved by means of dependent types: the assembly function is total over a program, a policy and the proof
    184 that the policy is correct for the program.
    185 
    186 Policies do not exist in only a limited number of circumstances: namely, if a pseudoinstruction attempts to jump to a label that does not exist, or the program is too large to fit in code memory even after shrinking jumps according to the
    187 best policy.
    188 The first circumstance is an example of a serious compiler error, as an ill-formed assembly program was generated.
    189 It does not count against the completeness of the assembler.
     185Further, we proved that the assembler fails to assemble an assembly program if and only if a correct policy does not exist.
     186This is achieved by means of dependent types: the assembly function is total over a program, a policy and the proof that the policy is correct for that program.
     187
     188Policies do not exist in only a limited number of circumstances: namely, if a pseudoinstruction attempts to jump to a label that does not exist, or the program is too large to fit in code memory, even after shrinking jumps according to the best policy.
     189The first circumstance is an example of a serious compiler error, as an ill-formed assembly program was generated, and does not (and should not) count as a mark against the completeness of the assembler.
    190190We plan to employ dependent types in CerCo in order to restrict the domain of the compiler to those programs that are `semantically correct' and should be compiled.
    191191In particular, in CerCo we are also interested in the completeness of the compilation process, whereas previous formalisations only focused on correctness.
    192192
    193 The rest of this paper is a detailed description of this proof.
     193The rest of this paper is a detailed description of our proof.
    194194
    195195% ---------------------------------------------------------------------------- %
     
    370370\begin{lstlisting}
    371371lemma assembly_ok: $\forall$p,pol,assembled.
    372   let $\langle$labels, costs$\rangle$ := build_maps program pol in
     372  let $\langle$labels, costs$\rangle$ := build_maps p pol in
    373373  $\langle$assembled,costs$\rangle$ = assembly p pol $\rightarrow$
    374374  let cmem := load_code_memory assembled in
    375   let preamble := $\pi_1$ program in
     375  let preamble := $\pi_1$ p in
    376376  let dlbls := construct_datalabels preamble in
    377   let addr := address_of_word_labels_code_mem ($\pi_2$ program) in
    378   let lk_lbls := λx. sigma program pol (addr x) in
     377  let addr := address_of_word_labels_code_mem ($\pi_2$ p) in
     378  let lk_lbls := λx. sigma p pol (addr x) in
    379379  let lk_dlbls := λx. lookup $\ldots$ x datalabels (zero ?) in
    380380  $\forall$ppc, pi, newppc.
    381   $\forall$prf: $\langle$pi, newppc$\rangle$ = fetch_pseudo_instruction ($\pi_2$ program) ppc.
     381  $\forall$prf: $\langle$pi, newppc$\rangle$ = fetch_pseudo_instruction ($\pi_2$ p) ppc.
    382382  $\forall$len, assm.
    383383  let spol := sigma program pol ppc in
     
    388388    echeck $\wedge$ sigma p pol newppc = spol_len.
    389389\end{lstlisting}
    390 Suppose also we assemble our program \texttt{p} in accordance with a policy \texttt{pol} to obtain \texttt{assembled}, loading the assembled program into code memory \texttt{cmem}.
    391 %dpm finish
     390Suppose also we assemble our program \texttt{p} in accordance with a policy \texttt{pol} to obtain \texttt{assembled}.
     391Here, we perform a `sanity check' to ensure that the two cost label maps generated are identical, before loading the assembled program into code memory \texttt{cmem}.
     392Then, for every pseudoinstruction \texttt{pi}, pseudo program counter \texttt{ppc} and new pseudo program counter \texttt{newppc}, such that we obtain \texttt{pi} and \texttt{newppc} from fetching a pseudoinstruction at \texttt{ppc}, we check that assembling this pseudoinstruction produces the correct number of machine code instructions, and that the new pseudo program counter \texttt{ppc} has the value expected of it.
    392393
    393394Theorem \texttt{fetch\_assembly} establishes that the \texttt{fetch} and \texttt{assembly1} functions interact correctly.
     
    544545
    545546It is interesting to compare our work to an `industrial grade' assembler for the MCS-51: SDCC~\cite{sdcc:2011}.
    546 SDCC is the only open source C compiler available that targets the MCS-51 instruction set.
     547SDCC is the only open source C compiler that targets the MCS-51 instruction set.
    547548It appears that all pseudojumps in SDCC assembly are expanded to \texttt{LJMP} instructions, the worst possible jump expansion policy from an efficiency point of view.
    548549Note that this policy is the only possible policy \emph{in theory} that can preserve the semantics of an assembly program during the assembly process.
    549550However, this comes at the expense of assembler completeness: the generated program may be too large to fit into code memory.
    550 In this respect, there is a fundamental trade-off between the completeness of the assembler and the efficiency of the assembled program.
     551In this respect, there is a trade-off between the completeness of the assembler and the efficiency of the assembled program.
    551552The definition and proof of an complete, optimal (in the sense that jump pseudoinstructions are expanded to the smallest possible opcode) and correct jump expansion policy is ongoing work.
    552553
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