source: src/ASM/CPP2012-asm/cpp-2012-asm.tex @ 2066

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37\title{On the correctness of an assembler for the Intel MCS-51 microprocessor\thanks{The project CerCo acknowledges the financial support of the Future and Emerging Technologies (FET) programme within the Seventh Framework Programme for Research of the European Commission, under FET-Open grant number: 243881}}
38\author{Dominic P. Mulligan \and Claudio Sacerdoti Coen}
39\institute{Dipartimento di Scienze dell'Informazione, Universit\'a di Bologna}
40
41\bibliographystyle{splncs03}
42
43\begin{document}
44
45\maketitle
46
47\begin{abstract}
48We present a proof of correctness, in the Matita proof assistant, for an optimising assembler for the MCS-51 8-bit microcontroller.
49This assembler constitutes a major component of the EU's CerCo (`Certified Complexity') project.
50
51The efficient expansion of pseudoinstructions---particularly jumps---into MCS-51 machine instructions is complex.
52We isolate the decision making over how jumps should be expanded from the expansion process itself as much as possible using `policies'.
53This makes the proof of correctness for the assembler significantly more straightforward.
54
55We observe that it is impossible for an optimising assembler to preserve the semantics of every assembly program.
56Assembly language programs can manipulate concrete addresses in arbitrary ways.
57Our proof strategy contains a notion of `good addresses' and only assembly programs that use good addresses have their semantics preserved under assembly.
58Our strategy offers increased flexibility over the traditional approach of keeping addresses in assembly opaque.
59In particular, we may experiment with allowing the benign manipulation of addresses.
60\end{abstract}
61
62% ---------------------------------------------------------------------------- %
63% SECTION                                                                      %
64% ---------------------------------------------------------------------------- %
65\section{Introduction}
66\label{sect.introduction}
67
68We consider the formalisation of an assembler for the Intel MCS-51 8-bit microprocessor in the Matita proof assistant~\cite{asperti:user:2007}.
69This formalisation forms a major component of the EU-funded CerCo (`Certified Complexity') project~\cite{cerco:2011}, concerning the construction and formalisation of a concrete complexity preserving compiler for a large subset of the C programming language.
70
71The MCS-51 dates from the early 1980s and is commonly called the 8051/8052.
72Despite the microprocessor's age, derivatives are still widely manufactured by a number of semiconductor foundries.
73As a result the processor is widely used, especially in embedded systems development, where well-tested, cheap, predictable microprocessors find their niche.
74
75The MCS-51 has a relative paucity of features compared to its more modern brethren, with the lack of any caching or pipelining features means that timing of execution is predictable, making the MCS-51 very attractive for CerCo's ends.
76Yet, as in most things, what one hand giveth the other taketh away, and the MCS-51's paucity of features---though an advantage in many respects---also quickly becomes a hindrance.
77In particular, the MCS-51 features a relatively minuscule series of memory spaces by modern standards.
78As a result our C compiler, to have any sort of hope of successfully compiling realistic programs for embedded devices, ought to produce `tight' machine code.
79
80Branch displacement is not a simple problem to solve and requires the implementation of an optimising assembler.
81Labels, conditional jumps to labels, a program preamble containing global data and a \texttt{MOV} instruction for moving this global data into the MCS-51's one 16-bit register all feature in our assembly language.
82We simplify the process by assuming that all assembly programs are pre-linked (i.e. we do not formalise a linker).
83The assembler expands pseudoinstructions into MCS-51 machine code, but this assembly process is not trivial, for numerous reasons.
84For example, our conditional jumps to labels behave differently from their machine code counterparts.
85At the machine code level, all conditional jumps are `short', limiting their range.
86However, at the assembly level, conditional jumps may jump to a label that appears anywhere in the program, significantly liberalising the use of conditional jumps.
87
88Yet, the situation is even more complex than having to expand pseudoinstructions correctly.
89In particular, when formalising the assembler, we must make sure that the assembly process does not change the timing characteristics of an assembly program for two reasons.
90
91First, the semantics of some functions of the MCS-51, notably I/O, depend on the microprocessor's clock.
92Changing how long a particular program takes to execute can affect the semantics of a program.
93This is undesirable.
94
95Second, CerCo imposes a cost model on C programs or, more specifically, on simple blocks of instructions.
96This cost model is induced by the compilation process itself, and its non-compositional nature allows us to assign different costs to identical blocks of instructions depending on how they are compiled.
97In short, we aim to obtain a very precise costing for a program by embracing the compilation process, not ignoring it.
98This, however, complicates the proof of correctness for the compiler proper.
99In each translation pass from intermediate language to intermediate language, we must prove that both the meaning and concrete complexity characteristics of the program are preserved.
100This also applies for the translation from assembly language to machine code.
101
102Yet one more question remains: how do we decide whether to expand a jump into an \texttt{SJMP} or an \texttt{LJMP}?
103To understand, again, why this problem is not trivial, consider the following snippet of assembly code:
104{\small{
105\begin{displaymath}
106\begin{array}{r@{\qquad}r@{\quad}l@{\;\;}l@{\qquad}l}
107\text{1:} & \mathtt{(0x000)}  & \texttt{LJMP} & \texttt{0x100}  & \text{\texttt{;; Jump forward 256.}} \\
108\text{2:} & \mathtt{...}    & \mathtt{...}  &                 &                                               \\
109\text{3:} & \mathtt{(0x0FA)}  & \texttt{LJMP} & \texttt{0x100}  & \text{\texttt{;; Jump forward 256.}} \\
110\text{4:} & \mathtt{...}    & \mathtt{...}  &                 &                                               \\
111\text{5:} & \mathtt{(0x100)}  & \texttt{LJMP} & \texttt{-0x100}  & \text{\texttt{;; Jump backward 256.}} \\
112\end{array}
113\end{displaymath}}}
114We observe that $100_{16} = 256_{10}$, and lies \emph{just} outside the range expressible in an 8-bit byte (0--255).
115
116As our example shows, given an occurrence $l$ of an \texttt{LJMP} instruction, it may be possible to shrink $l$ to an occurrence of an \texttt{SJMP}---consuming fewer bytes of code memory---provided we can shrink any \texttt{LJMP}s that exist between $l$ and its target location.
117In particular, if we wish to shrink the \texttt{LJMP} occurring at line 1, then we must shrink the \texttt{LJMP} occurring at line 3.
118However, to shrink the \texttt{LJMP} occurring at line 3 we must also shrink the \texttt{LJMP} occurring at line 5, and \emph{vice versa}.
119
120Further, consider what happens if, instead of appearing at memory address \texttt{0x100}, the instruction at line 5 appeared \emph{just} beyond the size of code memory, and all other memory addresses were shifted accordingly.
121Now, in order to be able to successfully fit our program into the MCS-51's limited code memory, we are \emph{obliged} to shrink the \texttt{LJMP} occurring at line 5.
122That is, the shrinking process is not just related to the optimisation of generated machine code but also the completeness of the assembler itself.
123
124How we went about resolving this problem affected the shape of our proof of correctness for the whole assembler in a rather profound way.
125We first attempted to synthesise a solution bottom up: starting with no solution, we gradually refine a solution using the same functions that implement the jump expansion process.
126Using this technique, solutions can fail to exist, and the proof of correctness for the assembler quickly descends into a diabolical quagmire.
127
128Abandoning this attempt, we instead split the `policy'---the decision over how any particular jump should be expanded---from the implementation that actually expands assembly programs into machine code.
129Assuming the existence of a correct policy, we proved the implementation of the assembler correct.
130Further, we proved that the assembler fails to assemble an assembly program if and only if a correct policy does not exist.
131This is achieved by means of dependent types: the assembly function is total over a program, a policy and the proof that the policy is correct for that program.
132
133Policies do not exist in only a limited number of circumstances: namely, if a pseudoinstruction attempts to jump to a label that does not exist, or the program is too large to fit in code memory, even after shrinking jumps according to the best policy.
134The first circumstance is an example of a serious compiler error, as an ill-formed assembly program was generated, and does not (and should not) count as a mark against the completeness of the assembler.
135
136The rest of this paper is a detailed description of our proof that is, in part, still a work in progress.
137
138% ---------------------------------------------------------------------------- %
139% SECTION                                                                      %
140% ---------------------------------------------------------------------------- %
141\subsection{Overview of the paper}
142\label{subsect.overview.of.the.paper}
143In Section~\ref{sect.matita} we provide a brief overview of the Matita proof assistant for the unfamiliar reader.
144In Section~\ref{sect.the.proof} we discuss the design and implementation of the proof proper.
145In Section~\ref{sect.conclusions} we conclude.
146
147% ---------------------------------------------------------------------------- %
148% SECTION                                                                      %
149% ---------------------------------------------------------------------------- %
150\section{Matita}
151\label{sect.matita}
152
153Matita is a proof assistant based on a variant of the Calculus of (Co)inductive Constructions~\cite{asperti:user:2007}.
154In particular, it features dependent types that we heavily exploit in the formalisation.
155The syntax of the statements and definitions in the paper should be self-explanatory, at least to those exposed to dependent type theory.
156We only remark the use of of `$\mathtt{?}$' or `$\mathtt{\ldots}$' for omitting single terms or sequences of terms to be inferred automatically by the system, respectively.
157Those that are not inferred are left to the user as proof obligations.
158Pairs are denoted with angular brackets, $\langle-, -\rangle$.
159
160Matita features a liberal system of coercions.
161It is possible to define a uniform coercion $\lambda x.\langle x,?\rangle$ from every type $T$ to the dependent product $\Sigma x:T.P~x$.
162The coercion opens a proof obligation that asks the user to prove that $P$ holds for $x$.
163When a coercion must be applied to a complex term (a $\lambda$-abstraction, a local definition, or a case analysis), the system automatically propagates the coercion to the sub-terms
164 For instance, to apply a coercion to force $\lambda x.M : A \to B$ to have type $\forall x:A.\Sigma y:B.P~x~y$, the system looks for a coercion from $M: B$ to $\Sigma y:B.P~x~y$ in a context augmented with $x:A$.
165This is significant when the coercion opens a proof obligation, as the user will be presented with multiple, but simpler proof obligations in the correct context.
166In this way, Matita supports the ``Russell'' proof methodology developed by Sozeau in~\cite{sozeau:subset:2006}, with an implementation that is lighter and more tightly integrated with the system than that of Coq.
167
168% ---------------------------------------------------------------------------- %
169% SECTION                                                                      %
170% ---------------------------------------------------------------------------- %
171\section{The proof}
172\label{sect.the.proof}
173
174% ---------------------------------------------------------------------------- %
175% SECTION                                                                      %
176% ---------------------------------------------------------------------------- %
177
178\subsection{Machine code semantics}
179\label{subsect.machine.code.semantics}
180
181Our emulator centres around a \texttt{Status} record, describing the microprocessor's state.
182This record contains fields corresponding to the microprocessor's program counter, registers, and so on.
183At the machine code level, code memory is implemented as a compact trie of bytes, addressed by the program counter.
184We parameterise \texttt{Status} records by this representation as a few technical tasks manipulating statuses are made simpler using this approach, as well as permitting a modicum of abstraction.
185
186We may execute a single step of a machine code program using the \texttt{execute\_1} function, which returns an updated \texttt{Status}:
187\begin{lstlisting}
188definition execute_1: $\forall$cm. Status cm $\rightarrow$ Status cm := $\ldots$
189\end{lstlisting}
190The function \texttt{execute} allows one to execute an arbitrary, but fixed (due to Matita's normalisation requirement) number of steps of a program.
191The function \texttt{execute\_1} closely matches the operation of the MCS-51 hardware, as described by a Siemen's manufacturer's data sheet.
192We first fetch, using the program counter, from code memory the first byte of the instruction to be executed, decoding the resulting opcode, fetching more bytes as is necessary.
193Decoded instructions are represented as an inductive type:
194
195\begin{lstlisting}
196inductive preinstruction (A: Type[0]): Type[0] :=
197 | ADD: [[acc_a]] → [[ registr; direct; indirect; data ]] → preinstruction A
198 | INC: [[ acc_a; registr; direct ; indirect ; dptr ]] → preinstruction A
199 | JB: [[bit_addr]] → A → preinstruction A
200 | ...
201
202inductive instruction: Type[0] ≝
203  | LCALL: [[addr16]] → instruction
204  | AJMP: [[addr11]] → instruction
205  | RealInstruction: preinstruction [[ relative ]] → instruction.
206\end{lstlisting}
207Here, we use dependent types to provide a precise typing for instructions, specifying in their type the permitted addressing modes that their arguments can belong to.
208The parameterised type $A$ of \texttt{preinstruction} represents the addressing mode for conditional jumps; in \texttt{instruction} we fix this type to be a relative offset in the constructor \texttt{RealInstruction}.
209
210Once decoded, execution proceeds by a case analysis on the decoded instruction, following the operation of the hardware.
211For example:
212
213\begin{lstlisting}
214  | DEC addr $\Rightarrow$
215    let s := add_ticks1 s in
216    let $\langle$result, flags$\rangle$ := sub_8_with_carry (get_arg_8 $\ldots$ s true addr)
217      (bitvector_of_nat 8 1) false in
218      set_arg_8 $\ldots$ s addr result
219\end{lstlisting}
220
221Here, \texttt{add\_ticks1} models the incrementing of the internal clock of the microprocessor.
222
223% ---------------------------------------------------------------------------- %
224% SECTION                                                                      %
225% ---------------------------------------------------------------------------- %
226
227\subsection{Assembly code semantics}
228\label{subsect.assembly.code.semantics}
229
230An assembly program is a list of potentially labelled pseudoinstructions, bundled with a preamble consisting of a list of symbolic names for locations in data memory.
231Pseudoinstructions are implemented as an inductive type:
232\begin{lstlisting}
233inductive pseudo_instruction: Type[0] ≝
234  | Instruction: preinstruction Identifier → pseudo_instruction
235    ...
236  | Jmp: Identifier → pseudo_instruction
237  | Call: Identifier → pseudo_instruction
238  | Mov: [[dptr]] → Identifier → pseudo_instruction.
239\end{lstlisting}
240The pseudoinstructions \texttt{Jmp}, \texttt{Call} and \texttt{Mov} are generalisations of machine code unconditional jumps, calls and move instructions respectively, all of whom act on labels, as opposed to concrete memory addresses.
241Similarly, conditional jumps can now only jump to labels, as is implied by the first constructor of the type above.
242All other object code instructions are available at the assembly level, with the exception of those that appeared in the \texttt{instruction} type, such as \texttt{ACALL} and \texttt{LJMP}.
243These are jumps and calls to absolute addresses, which we do not wish to allow at the assembly level.
244
245Execution of pseudoinstructions is a function from \texttt{PseudoStatus} to \texttt{PseudoStatus}.
246Both \texttt{Status} and \texttt{PseudoStatus} are instances of a more general type parameterised over the representation of code memory.
247This allows us to share some code that is common to both records (for instance, `setter' and `getter' functions).
248
249Emulation for pseudoinstructions is handled by \texttt{execute\_1\_pseudo\_instruction}:
250\begin{lstlisting}
251definition execute_1_pseudo_instruction:
252 (Word $\rightarrow$ nat $\times$ nat) $\rightarrow$ $\forall$cm. PseudoStatus cm $\rightarrow$ PseudoStatus cm := $\ldots$
253\end{lstlisting}
254Notice, here, that the emulation function for assembly programs takes an additional argument over \texttt{execute\_1}.
255This is a function that maps program counters (at the assembly level) to pairs of natural numbers representing the number of clock ticks that the pseudoinstruction needs to execute, post expansion.
256We call this function a \emph{costing}, and note that the costing is induced by the particular strategy we use to expand pseudoinstructions.
257If we change how we expand conditional jumps to labels, for instance, then the costing needs to change, hence \texttt{execute\_1\_pseudo\_instruction}'s parametricity in the costing.
258
259The costing returns \emph{pairs} of natural numbers because, in the case of expanding conditional jumps to labels, the expansion of the `true branch' and `false branch' may differ in execution time.
260This timing information is used inside \texttt{execute\_1\_pseudo\_instruction} to update the clock of the \texttt{PseudoStatus}.
261During the proof of correctness of the assembler we relate the clocks of \texttt{Status}es and \texttt{PseudoStatus}es for the policy induced by the cost model and optimisations.
262
263Execution proceeds by first fetching from pseudo-code memory using the program counter---treated as an index into the pseudoinstruction list.
264No decoding is required.
265We then proceed by case analysis over the pseudoinstruction, reusing the code for object code for all instructions present in the MCS-51's instruction set.
266For all newly introduced pseudoinstructions, we simply translate labels to concrete addresses before behaving as a `real' instruction.
267
268In contrast to other approaches, we do not perform any kind of symbolic execution, wherein data is the disjoint union of bytes and addresses, with addresses kept opaque and immutable.
269Labels are immediately translated to concrete addresses, and registers and memory locations only ever contain bytes, never labels.
270As a consequence, we allow the programmer to mangle, change and generally adjust addresses as they want, under the proviso that the translation process may not be able to preserve the semantics of programs that do this.
271This will be further discussed in Subsection~\ref{subsect.total.correctness.for.well.behaved.assembly.programs}.
272
273% ---------------------------------------------------------------------------- %
274% SECTION                                                                      %
275% ---------------------------------------------------------------------------- %
276
277\subsection{The assembler}
278\label{subsect.the.assembler}
279
280Conceptually the assembler works in two passes.
281The first pass expands pseudoinstructions into a list of machine code instructions using the function \texttt{expand\_pseudo\_instruction}.
282The second pass encodes as a list of bytes the expanded instruction list by mapping the function \texttt{assembly1} across the list, and then flattening.
283\begin{displaymath}
284[\mathtt{P_1}, \ldots \mathtt{P_n}] \xrightarrow{\left(\mathtt{P_i} \xrightarrow{\mbox{\fontsize{7}{9}\selectfont$\mathtt{expand\_pseudo\_instruction}$}} \mathtt{[I^1_i, \ldots I^q_i]} \xrightarrow{\mbox{\fontsize{7}{9}\selectfont$\mathtt{~~~~~~~~assembly1^{*}~~~~~~~~}$}} \mathtt{[0110]}\right)^{*}} \mathtt{[010101]}
285\end{displaymath}
286The most complex of the two passes is the first, which expands pseudoinstructions and must perform the task of branch displacement~\cite{holmes:branch:2006}.
287
288The branch displacement problems consists of the problem of expanding pseudojumps into their concrete counterparts, preferably as efficiently as possible.
289For instance, the MCS-51 features three unconditional jump instructions: \texttt{LJMP} and \texttt{SJMP}---`long jump' and `short jump' respectively---and an 11-bit oddity of the MCS-51, \texttt{AJMP}.
290Each of these three instructions expects arguments in different sizes and behaves in markedly different ways: \texttt{SJMP} may only perform a `local jump'; \texttt{LJMP} may jump to any address in the MCS-51's memory space and \texttt{AJMP} may jump to any address in the current memory page.
291Consequently, the size of each opcode is different, and to squeeze as much code as possible into the MCS-51's limited code memory, the smallest possible opcode that will suffice should be selected.
292This is a well known problem to assembler writers who target RISC architectures.
293
294Similarly, a conditional pseudojump must be translated potentially into a configuration of machine code instructions, depending on the distance to the jump's target.
295For example, to translate a jump to a label, a single conditional jump pseudoinstruction may be translated into a block of three real instructions as follows (here, \texttt{JZ} is `jump if accumulator is zero'):
296{\small{
297\begin{displaymath}
298\begin{array}{r@{\quad}l@{\;\;}l@{\qquad}c@{\qquad}l@{\;\;}l}
299       & \mathtt{JZ}  & \mathtt{label}                      &                 & \mathtt{JZ}   & \text{size of \texttt{SJMP} instruction} \\
300       & \ldots       &                            & \text{translates to}   & \mathtt{SJMP} & \text{size of \texttt{LJMP} instruction} \\
301\mathtt{label:} & \mathtt{MOV} & \mathtt{A}\;\;\mathtt{B}   & \Longrightarrow & \mathtt{LJMP} & \text{address of \textit{label}} \\
302       &              &                            &                 & \ldots        & \\
303       &              &                            &                 & \mathtt{MOV}  & \mathtt{A}\;\;\mathtt{B}
304\end{array}
305\end{displaymath}}}
306Here, if \texttt{JZ} fails, we fall through to the \texttt{SJMP} which jumps over the \texttt{LJMP}.
307Naturally, if \texttt{label} is `close enough', a conditional jump pseudoinstruction is mapped directly to a conditional jump machine instruction; the above translation only applies if \texttt{label} is not sufficiently local.
308
309In order to implement branch displacement it is impossible to really make the \texttt{expand\_pseudo\_instruction} function completely independent of the encoding function.
310This is due to branch displacement requiring the distance in bytes of the target of the jump.
311Moreover the standard solutions for solving the branch displacement problem find their solutions iteratively, by either starting from a solution where all jumps are long, and shrinking them when possible, or starting from a state where all jumps are short and increasing their length as needed.
312Proving the correctness of such algorithms is already quite involved and the correctness of the assembler as a whole does not depend on the `quality' of the solution found to a branch displacement problem.
313For this reason, we try to isolate the computation of a branch displacement problem from the proof of correctness for the assembler by parameterising our \texttt{expand\_pseudo\_instruction} by a `policy'.
314
315\begin{lstlisting}
316definition expand_pseudo_instruction:
317 $\forall$lookup_labels: Identifier $\rightarrow$ Word.
318 $\forall$sigma: Word $\rightarrow$ Word.
319 $\forall$policy: Word $\rightarrow$ bool.
320 $\forall$ppc: Word.
321 $\forall$lookup_datalabels: Identifier $\rightarrow$ Word.
322 $\forall$pi: pseudo_instruction.
323  list instruction := ...
324\end{lstlisting}
325Here, the functions \texttt{lookup\_labels} and \texttt{lookup\_datalabels} are the functions that map labels and datalabels to program counters respectively, both of them used in the semantics of assembly.
326The input \texttt{pi} is the pseudoinstruction to be expanded and is found at address \texttt{ppc} in the assembly program.
327The policy is defined using the two functions \texttt{sigma} and \texttt{policy}, of which \texttt{sigma} is the most interesting.
328The function $\sigma$ maps pseudo program counters to program counters: the encoding of the expansion of the pseudoinstruction found at address \texttt{a} in the assembly code should be placed into code memory at address \texttt{sigma(a)}.
329Of course this is possible only if the policy is correct, which means that the encoding of consecutive assembly instructions must be consecutive in code memory.
330\begin{displaymath}
331\texttt{sigma}(\texttt{ppc} + 1) = \texttt{pc} + \texttt{current\_instruction\_size}
332\end{displaymath}
333Here, \texttt{current\_instruction\_size} is the size in bytes of the encoding of the expanded pseudoinstruction found at \texttt{ppc}.
334The \texttt{expand\_pseudo\_instruction} function uses the \texttt{sigma} map to determine the size of jump required when expanding pseudojumps, computing the jump size by examining the size of the differences between program counters.
335In some circumstances the decision as to what machine code jump a particular pseudojump should be expanded into is ambiguous, and requires the use of the \texttt{policy} function to force a decision.
336
337% ---------------------------------------------------------------------------- %
338% SECTION                                                                      %
339% ---------------------------------------------------------------------------- %
340\subsection{Correctness of the assembler with respect to fetching}
341\label{subsect.total.correctness.of.the.assembler}
342
343Throughout the proof of correctness for assembly we assume that policies are bifurcated into two functions: \texttt{sigma} mapping \texttt{Word} to \texttt{Word} and \texttt{policy} mapping \texttt{Word} to \texttt{bool}.
344For our purposes, \texttt{sigma} is most interesting, as it maps pseudo program counters to program counters; \texttt{policy} is merely a technical device used in jump expansion.
345
346Using our policies, we now work toward proving the total correctness of the assembler.
347By `total correctness', we mean that the assembly process never fails when provided with a good policy and that the process does not change the semantics of a certain class of well behaved assembly programs.
348By `good policy' we mean
349We assume the correctness of the policies given to us using a function, \texttt{sigma\_policy\_specification} that we take in input, when needed.
350
351We expand pseudoinstructions using the function \texttt{expand\_pseudo\_instruction}.
352This takes an assembly program (consisting of a list of pseudoinstructions), a policy for the program, a map detailing the physical addresses of data labels from the pseudo program's preamble, and the pseudoinstruction to be expanded.
353It returns a list of instructions, corresponding to the expanded pseudoinstruction referenced by the pointer.
354Execution proceeds by case analysis on the pseudoinstruction given as input.
355The policy, \texttt{sigma}, is used to decide how to expand \texttt{Call}s, \texttt{Jmp}s and conditional jumps.
356\begin{lstlisting}
357definition expand_pseudo_instruction:
358 $\forall$lookup_labels: Identifier $\rightarrow$ Word.
359 $\forall$sigma: Word $\rightarrow$ Word.
360 $\forall$policy: Word $\rightarrow$ bool.
361  Word $\rightarrow$ (Identifier $\rightarrow$ Word) $\rightarrow$
362   pseudo_instruction $\rightarrow$ list instruction := ...
363\end{lstlisting}
364
365We can express the following lemma, expressing the correctness of the assembly function (slightly simplified):
366\begin{lstlisting}
367lemma assembly_ok:
368 $\forall$program: pseudo_assembly_program.
369 $\forall$sigma: Word $\rightarrow$ Word.
370 $\forall$policy: Word $\rightarrow$ bool.
371 $\forall$sigma_policy_witness.
372 $\forall$assembled.
373 $\forall$costs': BitVectorTrie costlabel 16.
374 let $\langle$preamble, instr_list$\rangle$ := program in
375 let $\langle$labels, costs$\rangle$ := create_label_cost_map instr_list in
376  $\langle$assembled,costs'$\rangle$ = assembly program sigma policy $\rightarrow$
377   let cmem := load_code_memory assembled in
378   $\forall$ppc.
379    let $\langle$pi, newppc$\rangle$ := fetch_pseudo_instruction instr_list ppc in     
380    let $\langle$len,assembled$\rangle$ := assembly_1_pseudoinstruction $\ldots$ ppc $\ldots$ pi in
381    let pc := sigma ppc in
382    let pc_plus_len := add $\ldots$ pc (bitvector_of_nat $\ldots$ len) in
383     encoding_check cmem pc pc_plus_len assembled $\wedge$
384      sigma newppc = add $\ldots$ pc (bitvector_of_nat $\ldots$ len).
385\end{lstlisting}
386Here, \texttt{encoding\_check} is a recursive function that checks that assembled machine code is correctly stored in code memory.
387Suppose also we assemble our program \texttt{p} in accordance with a policy \texttt{sigma} to obtain \texttt{assembled}, loading the assembled program into code memory \texttt{cmem}.
388Then, for every pseudoinstruction \texttt{pi}, pseudo program counter \texttt{ppc} and new pseudo program counter \texttt{newppc}, such that we obtain \texttt{pi} and \texttt{newppc} from fetching a pseudoinstruction at \texttt{ppc}, we check that assembling this pseudoinstruction produces the correct number of machine code instructions, and that the new pseudo program counter \texttt{ppc} has the value expected of it.
389
390Lemma \texttt{fetch\_assembly} establishes that the \texttt{fetch} and \texttt{assembly1} functions interact correctly.
391The \texttt{fetch} function, as its name implies, fetches the instruction indexed by the program counter in the code memory, while \texttt{assembly1} maps a single instruction to its byte encoding:
392\begin{lstlisting}
393lemma fetch_assembly:
394 $\forall$pc: Word.
395 $\forall$i: instruction.
396 $\forall$code_memory: BitVectorTrie Byte 16.
397 $\forall$assembled: list Byte.
398  assembled = assembly1 i $\rightarrow$
399  let len := length $\ldots$ assembled in
400  let pc_plus_len := add $\ldots$ pc (bitvector_of_nat $\ldots$ len) in
401   encoding_check code_memory pc pc_plus_len assembled $\rightarrow$
402   let $\langle$instr, pc', ticks$\rangle$ := fetch code_memory pc in
403    (eq_instruction instr i $\wedge$
404     eqb ticks (ticks_of_instruction instr) $\wedge$
405     eq_bv $\ldots$ pc' pc_plus_len) = true.
406\end{lstlisting}
407In particular, we read \texttt{fetch\_assembly} as follows.
408Given an instruction, \texttt{i}, we first assemble the instruction to obtain \texttt{assembled}, checking that the assembled instruction was stored in code memory correctly.
409Fetching from code memory, we obtain a tuple consisting of the instruction, new program counter, and the number of ticks this instruction will take to execute.
410We finally check that the fetched instruction is the same instruction that we began with, and the number of ticks this instruction will take to execute is the same as the result returned by a lookup function, \texttt{ticks\_of\_instruction}, devoted to tracking this information.
411Or, in plainer words, assembling and then immediately fetching again gets you back to where you started.
412
413Lemma \texttt{fetch\_assembly\_pseudo} (slightly simplified, here) is obtained by composition of \texttt{expand\_pseudo\_instruction} and \texttt{assembly\_1\_pseudoinstruction}:
414\begin{lstlisting}
415lemma fetch_assembly_pseudo:
416 $\forall$program: pseudo_assembly_program.
417 $\forall$sigma: Word $\rightarrow$ Word.
418 $\forall$policy: Word $\rightarrow$ bool.
419 $\forall$ppc.
420 $\forall$code_memory.
421 let $\langle$preamble, instr_list$\rangle$ := program in
422 let pi := $\pi_1$ (fetch_pseudo_instruction instr_list ppc) in
423 let pc := sigma ppc in
424 let instrs := expand_pseudo_instruction $\ldots$ sigma policy ppc $\ldots$ pi in
425 let $\langle$l, a$\rangle$ := assembly_1_pseudoinstruction $\ldots$ sigma policy ppc $\ldots$ pi in
426 let pc_plus_len := add $\ldots$ pc (bitvector_of_nat $\ldots$ l) in
427  encoding_check code_memory pc pc_plus_len a $\rightarrow$
428   fetch_many code_memory pc_plus_len pc instructions.
429\end{lstlisting}
430Here, \texttt{l} is the number of machine code instructions the pseudoinstruction at hand has been expanded into.
431We assemble a single pseudoinstruction with \texttt{assembly\_1\_pseudoinstruction}, which internally calls \texttt{jump\_expansion} and \texttt{expand\_pseudo\_instruction}.
432The function \texttt{fetch\_many} fetches multiple machine code instructions from code memory and performs some routine checks.
433
434Intuitively, Lemma \texttt{fetch\_assembly\_pseudo} can be read as follows.
435Suppose we expand the pseudoinstruction at \texttt{ppc} with the policy decision \texttt{sigma}, obtaining the list of machine code instructions \texttt{instrs}.
436Suppose we also assemble the pseudoinstruction at \texttt{ppc} to obtain \texttt{a}, a list of bytes.
437Then, we check with \texttt{fetch\_many} that the number of machine instructions that were fetched matches the number of instruction that \texttt{expand\_pseudo\_instruction} expanded.
438
439The final lemma in this series is \texttt{fetch\_assembly\_pseudo2} that combines the Lemma \texttt{fetch\_assembly\_pseudo} with the correctness of the functions that load object code into the processor's memory.
440Again, we slightly simplify:
441\begin{lstlisting}
442lemma fetch_assembly_pseudo2:
443 $\forall$program.
444 $\forall$sigma.
445 $\forall$policy.
446 $\forall$sigma_policy_specification_witness.
447 $\forall$ppc.
448  let $\langle$preamble, instr_list$\rangle$ := program in
449  let $\langle$labels, costs$\rangle$ := create_label_cost_map instr_list in
450  let $\langle$assembled, costs'$\rangle$ := $\pi_1$ $\ldots$ (assembly program sigma policy) in
451  let cmem := load_code_memory assembled in
452  let $\langle$pi, newppc$\rangle$ := fetch_pseudo_instruction instr_list ppc in
453  let instructions := expand_pseudo_instruction $\ldots$ sigma ppc $\ldots$ pi in
454    fetch_many cmem (sigma newppc) (sigma ppc) instructions.
455\end{lstlisting}
456
457Here we use $\pi_1 \ldots$ to eject out the existential witness from the Russell-typed function \texttt{assembly}.
458
459We read \texttt{fetch\_assembly\_pseudo2} as follows.
460Suppose we are able to successfully assemble an assembly program using \texttt{assembly} and produce a code memory, \texttt{cmem}.
461Then, fetching a pseudoinstruction from the pseudo code memory at address \texttt{ppc} corresponds to fetching a sequence of instructions from the real code memory using $\sigma$ to expand pseudoinstructions.
462The fetched sequence corresponds to the expansion, according to \texttt{sigma}, of the pseudoinstruction.
463
464At first, the lemmas appears to immediately imply the correctness of the assembler.
465However, this property is \emph{not} strong enough to establish that the semantics of an assembly program has been preserved by the assembly process since it does not establish the correspondence between the semantics of a pseudo-instruction and that of its expansion.
466In particular, the two semantics differ on instructions that \emph{could} directly manipulate program addresses.
467
468% ---------------------------------------------------------------------------- %
469% SECTION                                                                      %
470% ---------------------------------------------------------------------------- %
471\subsection{Total correctness for `well behaved' assembly programs}
472\label{subsect.total.correctness.for.well.behaved.assembly.programs}
473
474The traditional approach to verifying the correctness of an assembler is to treat memory addresses as opaque structures that cannot be modified.
475This prevents assembly programs from performing any `dangerous', semantics breaking manipulations of memory addresses by making these programs simply unrepresentable in the source language.
476
477Here, we take a different approach to this problem: we trace memory locations (and, potentially, registers) that contain memory addresses.
478We then prove that only those assembly programs that use addresses in `safe' ways have their semantics preserved by the assembly process.
479We believe that this approach is more flexible when compared to the traditional approach, as in principle it allows us to introduce some permitted \emph{benign} manipulations of addresses that the traditional approach, using opaque addresses, cannot handle, therefore expanding the set of input programs that can be assembled correctly.
480
481However, with this approach we must detect (at run time) programs that manipulate addresses in well behaved ways, according to some approximation of well-behavedness.
482Second, we must compute statuses that correspond to pseudo-statuses.
483The contents of the program counter must be translated, as well as the contents of all traced locations, by applying the \texttt{sigma} map.
484Remaining memory cells are copied \emph{verbatim}.
485
486For instance, after a function call, the two bytes that form the return pseudo address are pushed on top of the stack, i.e. in internal RAM.
487This pseudo internal RAM corresponds to an internal RAM where the stack holds the real addresses after optimisation, and all the other values remain untouched.
488
489We use an \texttt{internal\_pseudo\_address\_map} to trace addresses of code memory addresses in internal RAM:
490\begin{lstlisting}
491definition internal_pseudo_address_map :=
492  list ((BitVector 8) $\times$ (bool $\times$ Word)) $\times$ (option (bool $\times$ Word)).
493\end{lstlisting}
494The implementation of \texttt{internal\_pseudo\_address\_map} is complicated by some peculiarities of the MCS-51's instruction set.
495Note here that all addresses are 16 bit words, but are stored (and manipulated) as 8 bit bytes.
496All \texttt{MOV} instructions in the MCS-51 must use the accumulator \texttt{A} as an intermediary, moving a byte at a time.
497The second component of \texttt{internal\_pseudo\_address\_map} therefore states whether the accumulator currently holds a piece of an address, and if so, whether it is the upper or lower byte of the address (using the boolean flag) complete with the corresponding, source address in full.
498The first component, on the other hand, performs a similar task for the rest of external RAM.
499Again, we use a boolean flag to describe whether a byte is the upper or lower component of a 16-bit address.
500
501The \texttt{low\_internal\_ram\_of\_pseudo\_low\_internal\_ram} function converts the lower internal RAM of a \texttt{PseudoStatus} into the lower internal RAM of a \texttt{Status}.
502A similar function exists for higher internal RAM.
503Note that both RAM segments are indexed using addresses 7-bits long.
504The function is currently axiomatised, and an associated set of axioms prescribe the behaviour of the function:
505\begin{lstlisting}
506axiom low_internal_ram_of_pseudo_low_internal_ram:
507 internal_pseudo_address_map$\rightarrow$BitVectorTrie Byte 7$\rightarrow$BitVectorTrie Byte 7.
508\end{lstlisting}
509
510Next, we are able to translate \texttt{PseudoStatus} records into \texttt{Status} records using \texttt{status\_of\_pseudo\_status}.
511Translating a \texttt{PseudoStatus}'s code memory requires we expand pseudoinstructions and then assemble to obtain a trie of bytes.
512This never fails, provided that our policy is correct:
513\begin{lstlisting}
514definition status_of_pseudo_status:
515 internal_pseudo_address_map $\rightarrow$ $\forall$pap. $\forall$ps: PseudoStatus pap.
516 $\forall$sigma: Word $\rightarrow$ Word. $\forall$policy: Word $\rightarrow$ bool.
517  Status (code_memory_of_pseudo_assembly_program pap sigma policy)
518\end{lstlisting}
519
520The \texttt{next\_internal\_pseudo\_address\_map} function is responsible for run time monitoring of the behaviour of assembly programs, in order to detect well behaved ones.
521It returns a map that traces memory addresses in internal RAM after execution of the next pseudoinstruction, failing when the instruction tampers with memory addresses in unanticipated (but potentially correct) ways.
522It thus decides the membership of a strict subset of the set of well behaved programs.
523\begin{lstlisting}
524definition next_internal_pseudo_address_map: internal_pseudo_address_map
525 $\rightarrow$ PseudoStatus $\rightarrow$ option internal_pseudo_address_map
526\end{lstlisting}
527Note, if we wished to allow `benign manipulations' of addresses, it would be this function that needs to be changed.
528
529The function \texttt{ticks\_of} computes how long---in clock cycles---a pseudoinstruction will take to execute when expanded in accordance with a given policy.
530The function returns a pair of natural numbers, needed for recording the execution times of each branch of a conditional jump.
531\begin{lstlisting}
532axiom ticks_of:
533 $\forall$p:pseudo_assembly_program. policy p $\rightarrow$ Word $\rightarrow$ nat $\times$ nat := $\ldots$
534\end{lstlisting}
535
536Finally, we are able to state and prove our main theorem.
537This relates the execution of a single assembly instruction and the execution of (possibly) many machine code instructions, as long as we are able to track memory addresses properly:
538\begin{lstlisting}
539theorem main_thm:
540 $\forall$M, M': internal_pseudo_address_map.
541 $\forall$program: pseudo_assembly_program.
542 let $\langle$preamble, instr_list$\rangle$ := program in
543 $\forall$is_well_labelled: is_well_labelled_p instr_list.
544 $\forall$sigma: Word $\rightarrow$ Word.
545 $\forall$policy: Word $\rightarrow$ bool.
546 $\forall$sigma_policy_specification_witness.
547 $\forall$ps: PseudoStatus program.
548 $\forall$program_counter_in_bounds.
549  next_internal_pseudo_address_map M program ps = Some $\ldots$ M' $\rightarrow$
550  $\exists$n. execute n $\ldots$ (status_of_pseudo_status M $\ldots$ ps sigma policy) =
551   status_of_pseudo_status M' $\ldots$ (execute_1_pseudo_instruction
552     (ticks_of program sigma policy) program ps) sigma policy.
553\end{lstlisting}
554The statement is standard for forward simulation, but restricted to \texttt{PseudoStatuses} \texttt{ps} whose next instruction to be executed is well-behaved with respect to the \texttt{internal\_pseudo\_address\_map} \texttt{M}.
555Further, we explicitly requires proof that our policy is correct and the pseudo program counter lies within the bounds of the program.
556Theorem \texttt{main\_thm} establishes the total correctness of the assembly process and can simply be lifted to the forward simulation of an arbitrary number of well behaved steps on the assembly program.
557
558% ---------------------------------------------------------------------------- %
559% SECTION                                                                      %
560% ---------------------------------------------------------------------------- %
561\section{Conclusions}
562\label{sect.conclusions}
563
564We are proving the total correctness of an assembler for MCS-51 assembly language.
565In particular, our assembly language featured labels, arbitrary conditional and unconditional jumps to labels, global data and instructions for moving this data into the MCS-51's single 16-bit register.
566Expanding these pseudoinstructions into machine code instructions is not trivial, and the proof that the assembly process is `correct', in that the semantics of a subset of assembly programs are not changed is complex.
567
568The formalisation is a key component of the CerCo project, which aims to produce a verified concrete complexity preserving compiler for a large subset of the C programming language.
569The verified assembler, complete with the underlying formalisation of the semantics of MCS-51 machine code (described fully in~\cite{mulligan:executable:2011}), will form the bedrock layer upon which the rest of the CerCo project will build its verified compiler platform.
570
571It is interesting to compare our work to an `industrial grade' assembler for the MCS-51: SDCC~\cite{sdcc:2011}.
572SDCC is the only open source C compiler that targets the MCS-51 instruction set.
573It appears that all pseudojumps in SDCC assembly are expanded to \texttt{LJMP} instructions, the worst possible jump expansion policy from an efficiency point of view.
574Note that this policy is the only possible policy \emph{in theory} that can preserve the semantics of an assembly program during the assembly process.
575However, this comes at the expense of assembler completeness: the generated program may be too large to fit into code memory.
576In this respect, there is a trade-off between the completeness of the assembler and the efficiency of the assembled program.
577The definition and proof of a terminating, correct jump expansion policy is described in a companion publication to this one.
578
579Aside from their application in verified compiler projects such as CerCo and CompCert, verified assemblers such as ours could also be applied to the verification of operating system kernels.
580Of particular note is the verified seL4 kernel~\cite{klein:sel4:2009,klein:sel4:2010}.
581This verification explicitly assumes the existence of, amongst other things, a trustworthy assembler and compiler.
582
583Note that both CompCert and the seL4 formalisation assume the existence of `trustworthy' assemblers.
584The observation that an optimising assembler cannot preserve the semantics of every assembly program may have important consequences for these projects.
585If CompCert chooses to assume the existence of an optimising assembler, then care should be made to ensure that any assembly program produced by the CompCert compiler falls into the subset of programs that have a hope of having their semantics preserved by an optimising assembler.
586
587Our formalisation exploits dependent types in different ways and for multiple purposes.
588The first purpose is to reduce potential errors in the formalisation of the microprocessor.
589In particular, dependent types are used to constraint the size of bitvectors and tries that represent memory quantities and memory areas respectively.
590They are also used to simulate polymorphic variants in Matita, in order to provide precise typings to various functions expecting only a subset of all possible addressing modes than the MCS-51 offers.
591Polymorphic variants nicely capture the absolutely unorthogonal instruction set of the MCS-51 where every opcode must accept its own subset of the 11 addressing mode of the processor.
592
593The second purpose is to single out the sources of incompleteness.
594By abstracting our functions over the dependent type of correct policies, we were able to manifest the fact that the compiler never refuses to compile a program where a correct policy exists.
595This also allowed to simplify the initial proof by dropping lemmas establishing that one function fails if and only if some other one does so.
596
597Finally, dependent types, together with Matita's liberal system of coercions, allow to simulate almost entirely in user space the proof methodology ``Russell'' of Sozeau~\cite{sozeau:subset:2006}.
598However, not every proof has been done this way: we only used this style to prove that a function satisfies a specification that only involves that function in a significant way.
599For example, it would be unnatural to see the proof that fetch and assembly commute as the specification of one of the two functions.
600
601\subsection{Related work}
602\label{subsect.related.work}
603
604% piton
605We are not the first to consider the total correctness of an assembler for a non-trivial assembly language.
606Perhaps the most impressive piece of work in this domain is the Piton stack~\cite{moore:piton:1996,moore:grand:2005}.
607This was a stack of verified components, written and verified in ACL2, ranging from a proprietary FM9001 microprocessor verified at the gate level, to assemblers and compilers for two high-level languages---a dialect of Lisp and $\mu$Gypsy~\cite{moore:grand:2005}.
608
609% jinja
610Klein and Nipkow consider a Java-like programming language, Jinja~\cite{klein:machine:2006,klein:machine:2010}.
611They provide a compiler, virtual machine and operational semantics for the programming language and virtual machine, and prove that their compiler is semantics and type preserving.
612
613We believe some other verified assemblers exist in the literature.
614However, what sets our work apart from that above is our attempt to optimise the machine code generated by our assembler.
615This complicates any formalisation effort, as an attempt at the best possible selection of machine instructions must be made, especially important on a device such as the MCS-51 with a miniscule code memory.
616Further, care must be taken to ensure that the time properties of an assembly program are not modified by the assembly process lest we affect the semantics of any program employing the MCS-51's I/O facilities.
617This is only possible by inducing a cost model on the source code from the optimisation strategy and input program.
618This will be a \emph{leit motif} of CerCo.
619
620\subsection{Resources}
621\label{subsect.resources}
622
623All files relating to our formalisation effort can be found online at~\url{http://cerco.cs.unibo.it}.
624The code of the compiler has been completed, and the proof of correctness described here is still in progress.
625In particular, we have assumed several properties of ``library functions'' related in particular to modular arithmetic and datastructure manipulation.
626Moreover, we have axiomatised various ancillary functions needed to complete the main theorems, as well as some `routine' proof obligations of the theorems themselves, preferring instead to focus on the main meat of the theorems.
627We thus believe that the proof strategy is sound and that we will be able to close soon all axioms, up to possible minor bugs that should have local fixes that do not affect the global proof strategy.
628
629The development, including the definition of the executable semantics of the MCS-51, is spread across 29 files, totalling around 18,500 lines of Matita source.
630The bulk of the proof described herein is contained in a series of files, \texttt{AssemblyProof.ma}, \texttt{AssemblyProofSplit.ma} and \texttt{AssemblyProofSplitSplit.ma} consisting at the moment of approximately 4200 lines of Matita source.
631Numerous other lines of proofs are spread all over the development because of dependent types and the Russell proof style, which does not allow one to separate the code from the proofs.
632The low ratio between the number of lines of code and the number of lines of proof is unusual.
633It is justified by the fact that the pseudo-assembly and the assembly language share most constructs and that large parts of the semantics are also shared.
634Thus many lines of code are required to describe the complex semantics of the processor, but, for the shared cases, the proof of preservation of the semantics is essentially trivial.
635
636\bibliography{cpp-2012-asm.bib}
637
638\end{document}\renewcommand{\verb}{\lstinline}
639\def\lstlanguagefiles{lst-grafite.tex}
640\lstset{language=Grafite}
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