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37\title{On the correctness of an assembler for the Intel MCS-51 microprocessor\thanks{The project CerCo acknowledges the financial support of the Future and Emerging Technologies (FET) programme within the Seventh Framework Programme for Research of the European Commission, under FET-Open grant number: 243881}}
38\author{Dominic P. Mulligan \and Claudio Sacerdoti Coen}
39\institute{Dipartimento di Scienze dell'Informazione, Universit\'a di Bologna}
40
41\bibliographystyle{splncs03}
42
43\begin{document}
44
45\maketitle
46
47\begin{abstract}
48We present a proof of correctness, in the Matita proof assistant, for an optimising assembler for the MCS-51 8-bit microcontroller.
49This assembler constitutes a major component of the EU's CerCo (`Certified Complexity') project.
50
51The efficient expansion of pseudoinstructions---particularly jumps---into MCS-51 machine instructions is complex.
52We isolate the decision making over how jumps should be expanded from the expansion process itself as much as possible using `policies'.
53This makes the proof of correctness for the assembler significantly more straightforward.
54
55We observe that it is impossible for an optimising assembler to preserve the semantics of every assembly program.
56Assembly language programs can manipulate concrete addresses in arbitrary ways.
57Our proof strategy contains a notion of `good addresses' and only assembly programs that use good addresses have their semantics preserved under assembly.
58Our strategy offers increased flexibility over the traditional approach of keeping addresses in assembly opaque.
59In particular, we may experiment with allowing the benign manipulation of addresses.
60\end{abstract}
61
62% ---------------------------------------------------------------------------- %
63% SECTION                                                                      %
64% ---------------------------------------------------------------------------- %
65\section{Introduction}
66\label{sect.introduction}
67
68We consider the formalisation of an assembler for the Intel MCS-51 8-bit microprocessor in the Matita proof assistant~\cite{asperti:user:2007}.
69This formalisation forms a major component of the EU-funded CerCo (`Certified Complexity') project~\cite{cerco:2011}, concerning the construction and formalisation of a concrete complexity preserving compiler for a large subset of the C programming language.
70
71The MCS-51 dates from the early 1980s and is commonly called the 8051/8052.
72Despite the microprocessor's age, derivatives are still widely manufactured by a number of semiconductor foundries.
73As a result the processor is widely used, especially in embedded systems development, where well-tested, cheap, predictable microprocessors find their niche.
74
75The MCS-51 has a relative paucity of features compared to its more modern brethren, with the lack of any caching or pipelining features means that timing of execution is predictable, making the MCS-51 very attractive for CerCo's ends.
76Yet, as in most things, what one hand giveth the other taketh away, and the MCS-51's paucity of features---though an advantage in many respects---also quickly becomes a hindrance.
77In particular, the MCS-51 features a relatively minuscule series of memory spaces by modern standards.
78As a result our C compiler, to have any sort of hope of successfully compiling realistic programs for embedded devices, ought to produce `tight' machine code.
79
80For example, the MCS-51 features three unconditional jump instructions: \texttt{LJMP} and \texttt{SJMP}---`long jump' and `short jump' respectively---and an 11-bit oddity of the MCS-51, \texttt{AJMP}.
81Each of these three instructions expects arguments in different sizes and behaves in markedly different ways: \texttt{SJMP} may only perform a `local jump'; \texttt{LJMP} may jump to any address in the MCS-51's memory space and \texttt{AJMP} may jump to any address in the current memory page.
82Consequently, the size of each opcode is different, and to squeeze as much code as possible into the MCS-51's limited code memory, the smallest possible opcode that will suffice should be selected.
83This is a well known problem to assembler writers who target RISC architectures, often referred to as `branch displacement'~\cite{holmes:branch:2006}.
84
85Branch displacement is not a simple problem to solve and requires the implementation of an optimising assembler.
86Labels, conditional jumps to labels, a program preamble containing global data and a \texttt{MOV} instruction for moving this global data into the MCS-51's one 16-bit register all feature in our assembly language.
87We simplify the process by assuming that all assembly programs are pre-linked (i.e. we do not formalise a linker).
88The assembler expands pseudoinstructions into MCS-51 machine code, but this assembly process is not trivial, for numerous reasons.
89For example, our conditional jumps to labels behave differently from their machine code counterparts.
90At the machine code level, all conditional jumps are `short', limiting their range.
91However, at the assembly level, conditional jumps may jump to a label that appears anywhere in the program, significantly liberalising the use of conditional jumps.
92
93Yet, the situation is even more complex than having to expand pseudoinstructions correctly.
94In particular, when formalising the assembler, we must make sure that the assembly process does not change the timing characteristics of an assembly program for two reasons.
95
96First, the semantics of some functions of the MCS-51, notably I/O, depend on the microprocessor's clock.
97Changing how long a particular program takes to execute can affect the semantics of a program.
98This is undesirable.
99
100Second, CerCo imposes a cost model on C programs or, more specifically, on simple blocks of instructions.
101This cost model is induced by the compilation process itself, and its non-compositional nature allows us to assign different costs to identical blocks of instructions depending on how they are compiled.
102In short, we aim to obtain a very precise costing for a program by embracing the compilation process, not ignoring it.
103This, however, complicates the proof of correctness for the compiler proper.
104In each translation pass from intermediate language to intermediate language, we must prove that both the meaning and concrete complexity characteristics of the program are preserved.
105This also applies for the translation from assembly language to machine code.
106
107Naturally, this raises a question: how do we assign an \emph{accurate} cost to a pseudoinstruction?
108As mentioned, conditional jumps at the assembly level can jump to a label appearing anywhere in the program.
109However, at the machine code level, conditional jumps are limited to jumping `locally', using a measly byte offset.
110To translate a jump to a label, a single conditional jump pseudoinstruction may be translated into a block of three real instructions as follows (here, \texttt{JZ} is `jump if accumulator is zero'):
111{\small{
112\begin{displaymath}
113\begin{array}{r@{\quad}l@{\;\;}l@{\qquad}c@{\qquad}l@{\;\;}l}
114       & \mathtt{JZ}  & \mathtt{label}                      &                 & \mathtt{JZ}   & \text{size of \texttt{SJMP} instruction} \\
115       & \ldots       &                            & \text{translates to}   & \mathtt{SJMP} & \text{size of \texttt{LJMP} instruction} \\
116\mathtt{label:} & \mathtt{MOV} & \mathtt{A}\;\;\mathtt{B}   & \Longrightarrow & \mathtt{LJMP} & \text{address of \textit{label}} \\
117       &              &                            &                 & \ldots        & \\
118       &              &                            &                 & \mathtt{MOV}  & \mathtt{A}\;\;\mathtt{B}
119\end{array}
120\end{displaymath}}}
121Here, if \texttt{JZ} fails, we fall through to the \texttt{SJMP} which jumps over the \texttt{LJMP}.
122Naturally, if \texttt{label} is close enough, a conditional jump pseudoinstruction is mapped directly to a conditional jump machine instruction; the above translation only applies if \texttt{label} is not sufficiently local.
123We address the calculation of whether a label is indeed `close enough' for the simpler translation to be used below.
124
125Crucially, the above translation demonstrates the difficulty in predicting how many clock cycles a pseudoinstruction will take to execute.
126A conditional jump may be mapped to a single machine instruction or a block of three.
127Perhaps more insidious is the realisation that the number of cycles needed to execute the instructions in the two branches of a translated conditional jump may be different.
128Depending on the particular MCS-51 derivative at hand, an \texttt{SJMP} could in theory take a different number of clock cycles to execute than an \texttt{LJMP}.
129These issues must also be dealt with in order to prove that the translation pass preserves the concrete complexity of assembly code, and that the semantics of a program using the MCS-51's I/O facilities does not change.
130We address this problem by parameterising the semantics over a cost model.
131We prove the preservation of concrete complexity only for the program-dependent cost model induced by the optimisation.
132
133Yet one more question remains: how do we decide whether to expand a jump into an \texttt{SJMP} or an \texttt{LJMP}?
134To understand, again, why this problem is not trivial, consider the following snippet of assembly code:
135{\small{
136\begin{displaymath}
137\begin{array}{r@{\qquad}r@{\quad}l@{\;\;}l@{\qquad}l}
138\text{1:} & \mathtt{(0x000)}  & \texttt{LJMP} & \texttt{0x100}  & \text{\texttt{;; Jump forward 256.}} \\
139\text{2:} & \mathtt{...}    & \mathtt{...}  &                 &                                               \\
140\text{3:} & \mathtt{(0x0FA)}  & \texttt{LJMP} & \texttt{0x100}  & \text{\texttt{;; Jump forward 256.}} \\
141\text{4:} & \mathtt{...}    & \mathtt{...}  &                 &                                               \\
142\text{5:} & \mathtt{(0x100)}  & \texttt{LJMP} & \texttt{-0x100}  & \text{\texttt{;; Jump backward 256.}} \\
143\end{array}
144\end{displaymath}}}
145We observe that $100_{16} = 256_{10}$, and lies \emph{just} outside the range expressible in an 8-bit byte (0--255).
146
147As our example shows, given an occurrence $l$ of an \texttt{LJMP} instruction, it may be possible to shrink $l$ to an occurrence of an \texttt{SJMP}---consuming fewer bytes of code memory---provided we can shrink any \texttt{LJMP}s that exist between $l$ and its target location.
148In particular, if we wish to shrink the \texttt{LJMP} occurring at line 1, then we must shrink the \texttt{LJMP} occurring at line 3.
149However, to shrink the \texttt{LJMP} occurring at line 3 we must also shrink the \texttt{LJMP} occurring at line 5, and \emph{vice versa}.
150
151Further, consider what happens if, instead of appearing at memory address \texttt{0x100}, the instruction at line 5 appeared \emph{just} beyond the size of code memory, and all other memory addresses were shifted accordingly.
152Now, in order to be able to successfully fit our program into the MCS-51's limited code memory, we are \emph{obliged} to shrink the \texttt{LJMP} occurring at line 5.
153That is, the shrinking process is not just related to the optimisation of generated machine code but also the completeness of the assembler itself.
154
155How we went about resolving this problem affected the shape of our proof of correctness for the whole assembler in a rather profound way.
156We first attempted to synthesise a solution bottom up: starting with no solution, we gradually refine a solution using the same functions that implement the jump expansion process.
157Using this technique, solutions can fail to exist, and the proof of correctness for the assembler quickly descends into a diabolical quagmire.
158
159Abandoning this attempt, we instead split the `policy'---the decision over how any particular jump should be expanded---from the implementation that actually expands assembly programs into machine code.
160Assuming the existence of a correct policy, we proved the implementation of the assembler correct.
161Further, we proved that the assembler fails to assemble an assembly program if and only if a correct policy does not exist.
162This is achieved by means of dependent types: the assembly function is total over a program, a policy and the proof that the policy is correct for that program.
163
164Policies do not exist in only a limited number of circumstances: namely, if a pseudoinstruction attempts to jump to a label that does not exist, or the program is too large to fit in code memory, even after shrinking jumps according to the best policy.
165The first circumstance is an example of a serious compiler error, as an ill-formed assembly program was generated, and does not (and should not) count as a mark against the completeness of the assembler.
166
167The rest of this paper is a detailed description of our proof that is, in part, still a work in progress.
168
169% ---------------------------------------------------------------------------- %
170% SECTION                                                                      %
171% ---------------------------------------------------------------------------- %
172\subsection{Overview of the paper}
173\label{subsect.overview.of.the.paper}
174In Section~\ref{sect.matita} we provide a brief overview of the Matita proof assistant for the unfamiliar reader.
175In Section~\ref{sect.the.proof} we discuss the design and implementation of the proof proper.
176In Section~\ref{sect.conclusions} we conclude.
177
178% ---------------------------------------------------------------------------- %
179% SECTION                                                                      %
180% ---------------------------------------------------------------------------- %
181\section{Matita}
182\label{sect.matita}
183
184Matita is a proof assistant based on a variant of the Calculus of (Co)inductive Constructions~\cite{asperti:user:2007}.
185In particular, it features dependent types that we heavily exploit in the formalisation.
186The syntax of the statements and definitions in the paper should be self-explanatory, at least to those exposed to dependent type theory.
187We only remark the use of of `$\mathtt{?}$' or `$\mathtt{\ldots}$' for omitting single terms or sequences of terms to be inferred automatically by the system, respectively.
188Those that are not inferred are left to the user as proof obligations.
189Pairs are denoted with angular brackets, $\langle-, -\rangle$.
190
191Matita features a liberal system of coercions.
192It is possible to define a uniform coercion $\lambda x.\langle x,?\rangle$ from every type $T$ to the dependent product $\Sigma x:T.P~x$.
193The coercion opens a proof obligation that asks the user to prove that $P$ holds for $x$.
194When a coercion must be applied to a complex term (a $\lambda$-abstraction, a local definition, or a case analysis), the system automatically propagates the coercion to the sub-terms
195 For instance, to apply a coercion to force $\lambda x.M : A \to B$ to have type $\forall x:A.\Sigma y:B.P~x~y$, the system looks for a coercion from $M: B$ to $\Sigma y:B.P~x~y$ in a context augmented with $x:A$.
196This is significant when the coercion opens a proof obligation, as the user will be presented with multiple, but simpler proof obligations in the correct context.
197In this way, Matita supports the ``Russell'' proof methodology developed by Sozeau in~\cite{sozeau:subset:2006}, with an implementation that is lighter and more tightly integrated with the system than that of Coq.
198
199% ---------------------------------------------------------------------------- %
200% SECTION                                                                      %
201% ---------------------------------------------------------------------------- %
202\section{The proof}
203\label{sect.the.proof}
204
205\subsection{The assembler and semantics of machine code}
206\label{subsect.the.assembler.and.semantics.of.machine.code}
207
208Our emulator centres around a \texttt{Status} record, describing the microprocessor's state.
209This record contains fields corresponding to the microprocessor's program counter, registers, and so on.
210At the machine code level, code memory is implemented as a compact trie of bytes, addressed by the program counter.
211We parameterise \texttt{Status} records by this representation as a few technical tasks manipulating statuses are made simpler using this approach, as well as permitting a modicum of abstraction.
212
213We may execute a single step of a machine code program using the \texttt{execute\_1} function, which returns an updated \texttt{Status}:
214\begin{lstlisting}
215definition execute_1: $\forall$cm. Status cm $\rightarrow$ Status cm := $\ldots$
216\end{lstlisting}
217The function \texttt{execute} allows one to execute an arbitrary, but fixed (due to Matita's normalisation requirement) number of steps of a program.
218Execution proceeds by a case analysis on the instruction fetched from code memory using the program counter of the input \texttt{Status} record.
219
220Naturally, assembly programs have analogues.
221The counterpart of the \texttt{Status} record is \texttt{PseudoStatus}.
222Instead of code memory being implemented as tries of bytes, code memory is here implemented as lists of pseudoinstructions, and program counters are merely indices into this list.
223Both \texttt{Status} and \texttt{PseudoStatus} are specialisations of the same \texttt{PreStatus} record, parametric in the representation of code memory.
224This allows us to share some code that is common to both records (for instance, `setter' and `getter' functions).
225
226Our analogue of \texttt{execute\_1} is \texttt{execute\_1\_pseudo\_instruction}:
227\begin{lstlisting}
228definition execute_1_pseudo_instruction:
229 (Word $\rightarrow$ nat $\times$ nat) $\rightarrow$ $\forall$cm. PseudoStatus cm $\rightarrow$ PseudoStatus cm := $\ldots$
230\end{lstlisting}
231Notice, here, that the emulation function for assembly programs takes an additional argument.
232This is a function that maps program counters (at the assembly level) to pairs of natural numbers representing the number of clock ticks that the pseudoinstruction needs to execute, post expansion.
233We call this function a \emph{costing}, and note that the costing is induced by the particular strategy we use to expand pseudoinstructions.
234If we change how we expand conditional jumps to labels, for instance, then the costing needs to change, hence \texttt{execute\_1\_pseudo\_instruction}'s parametricity in the costing.
235
236The costing returns \emph{pairs} of natural numbers because, in the case of expanding conditional jumps to labels, the expansion of the `true branch' and `false branch' may differ in execution time.
237This timing information is used inside \texttt{execute\_1\_pseudo\_instruction} to update the clock of the \texttt{PseudoStatus}.
238During the proof of correctness of the assembler we relate the clocks of \texttt{Status}es and \texttt{PseudoStatus}es for the policy induced by the cost model and optimisations.
239
240The assembler, mapping programs consisting of lists of pseudoinstructions to lists of bytes, operates in a mostly straightforward manner.
241To a degree of approximation the assembler, on an assembly program consisting of $n$ pseudoinstructions $\mathtt{P_i}$ for $1 \leq i \leq n$, works as in the following diagram (we use $-^{*}$ to denote a combined map and flatten operation):
242\begin{displaymath}
243[\mathtt{P_1}, \ldots \mathtt{P_n}] \xrightarrow{\left(\mathtt{P_i} \xrightarrow{\mbox{\fontsize{7}{9}\selectfont$\mathtt{expand\_pseudo\_instruction}$}} \mathtt{[I^1_i, \ldots I^q_i]} \xrightarrow{\mbox{\fontsize{7}{9}\selectfont$\mathtt{~~~~~~~~assembly1^{*}~~~~~~~~}$}} \mathtt{[0110]}\right)^{*}} \mathtt{[010101]}
244\end{displaymath}
245Here $\mathtt{I^j_i}$ for $1 \leq j \leq q$ are the $q$ machine code instructions obtained by expanding, with \texttt{expand\_pseudo\_instruction}, a single pseudoinstruction $P_i$.
246Each machine code instruction $\mathtt{I^i_j}$ is then assembled, using the \texttt{assembly1} function, into a list of bytes.
247This process is iterated for each pseudoinstruction, before the lists are flattened into a single bit list representation of the original assembly program.
248
249% ---------------------------------------------------------------------------- %
250% SECTION                                                                      %
251% ---------------------------------------------------------------------------- %
252\subsection{Correctness of the assembler with respect to fetching}
253\label{subsect.total.correctness.of.the.assembler}
254
255Throughout the proof of correctness for assembly we assume that policies are bifurcated into two functions: \texttt{sigma} mapping \texttt{Word} to \texttt{Word} and \texttt{policy} mapping \texttt{Word} to \texttt{bool}.
256For our purposes, \texttt{sigma} is most interesting, as it maps pseudo program counters to program counters; \texttt{policy} is merely a technical device used in jump expansion.
257
258Using our policies, we now work toward proving the total correctness of the assembler.
259By `total correctness', we mean that the assembly process never fails when provided with a good policy and that the process does not change the semantics of a certain class of well behaved assembly programs.
260By `good policy' we mean that policies provided to us will keep a lockstep correspondence between addresses at the assembly level and addresses at the machine code level:
261\begin{displaymath}
262\texttt{sigma}(\texttt{ppc} + 1) = \texttt{pc} + \texttt{current\_instruction\_size}
263\end{displaymath}
264along with some other technical properties related to program counters falling within the bounds of our programs.
265We assume the correctness of the policies given to us using a function, \texttt{sigma\_policy\_specification} that we take in input, when needed.
266
267We expand pseudoinstructions using the function \texttt{expand\_pseudo\_instruction}.
268This takes an assembly program (consisting of a list of pseudoinstructions), a policy for the program, a map detailing the physical addresses of data labels from the pseudo program's preamble, and the pseudoinstruction to be expanded.
269It returns a list of instructions, corresponding to the expanded pseudoinstruction referenced by the pointer.
270Execution proceeds by case analysis on the pseudoinstruction given as input.
271The policy, \texttt{sigma}, is used to decide how to expand \texttt{Call}s, \texttt{Jmp}s and conditional jumps.
272\begin{lstlisting}
273definition expand_pseudo_instruction:
274 $\forall$lookup_labels: Identifier $\rightarrow$ Word.
275 $\forall$sigma: Word $\rightarrow$ Word.
276 $\forall$policy: Word $\rightarrow$ bool.
277  Word $\rightarrow$ (Identifier $\rightarrow$ Word) $\rightarrow$
278   pseudo_instruction $\rightarrow$ list instruction := ...
279\end{lstlisting}
280
281We can express the following lemma, expressing the correctness of the assembly function (slightly simplified):
282\begin{lstlisting}
283lemma assembly_ok:
284 $\forall$program: pseudo_assembly_program.
285 $\forall$sigma: Word $\rightarrow$ Word.
286 $\forall$policy: Word $\rightarrow$ bool.
287 $\forall$sigma_policy_witness.
288 $\forall$assembled.
289 $\forall$costs': BitVectorTrie costlabel 16.
290 let $\langle$preamble, instr_list$\rangle$ := program in
291 let $\langle$labels, costs$\rangle$ := create_label_cost_map instr_list in
292  $\langle$assembled,costs'$\rangle$ = assembly program sigma policy $\rightarrow$
293   let cmem := load_code_memory assembled in
294   $\forall$ppc.
295    let $\langle$pi, newppc$\rangle$ := fetch_pseudo_instruction instr_list ppc in     
296    let $\langle$len,assembled$\rangle$ := assembly_1_pseudoinstruction $\ldots$ ppc $\ldots$ pi in
297    let pc := sigma ppc in
298    let pc_plus_len := add $\ldots$ pc (bitvector_of_nat $\ldots$ len) in
299     encoding_check cmem pc pc_plus_len assembled $\wedge$
300      sigma newppc = add $\ldots$ pc (bitvector_of_nat $\ldots$ len).
301\end{lstlisting}
302Here, \texttt{encoding\_check} is a recursive function that checks that assembled machine code is correctly stored in code memory.
303Suppose also we assemble our program \texttt{p} in accordance with a policy \texttt{sigma} to obtain \texttt{assembled}, loading the assembled program into code memory \texttt{cmem}.
304Then, for every pseudoinstruction \texttt{pi}, pseudo program counter \texttt{ppc} and new pseudo program counter \texttt{newppc}, such that we obtain \texttt{pi} and \texttt{newppc} from fetching a pseudoinstruction at \texttt{ppc}, we check that assembling this pseudoinstruction produces the correct number of machine code instructions, and that the new pseudo program counter \texttt{ppc} has the value expected of it.
305
306Lemma \texttt{fetch\_assembly} establishes that the \texttt{fetch} and \texttt{assembly1} functions interact correctly.
307The \texttt{fetch} function, as its name implies, fetches the instruction indexed by the program counter in the code memory, while \texttt{assembly1} maps a single instruction to its byte encoding:
308\begin{lstlisting}
309lemma fetch_assembly:
310 $\forall$pc: Word.
311 $\forall$i: instruction.
312 $\forall$code_memory: BitVectorTrie Byte 16.
313 $\forall$assembled: list Byte.
314  assembled = assembly1 i $\rightarrow$
315  let len := length $\ldots$ assembled in
316  let pc_plus_len := add $\ldots$ pc (bitvector_of_nat $\ldots$ len) in
317   encoding_check code_memory pc pc_plus_len assembled $\rightarrow$
318   let $\langle$instr, pc', ticks$\rangle$ := fetch code_memory pc in
319    (eq_instruction instr i $\wedge$
320     eqb ticks (ticks_of_instruction instr) $\wedge$
321     eq_bv $\ldots$ pc' pc_plus_len) = true.
322\end{lstlisting}
323In particular, we read \texttt{fetch\_assembly} as follows.
324Given an instruction, \texttt{i}, we first assemble the instruction to obtain \texttt{assembled}, checking that the assembled instruction was stored in code memory correctly.
325Fetching from code memory, we obtain a tuple consisting of the instruction, new program counter, and the number of ticks this instruction will take to execute.
326We finally check that the fetched instruction is the same instruction that we began with, and the number of ticks this instruction will take to execute is the same as the result returned by a lookup function, \texttt{ticks\_of\_instruction}, devoted to tracking this information.
327Or, in plainer words, assembling and then immediately fetching again gets you back to where you started.
328
329Lemma \texttt{fetch\_assembly\_pseudo} (slightly simplified, here) is obtained by composition of \texttt{expand\_pseudo\_instruction} and \texttt{assembly\_1\_pseudoinstruction}:
330\begin{lstlisting}
331lemma fetch_assembly_pseudo:
332 $\forall$program: pseudo_assembly_program.
333 $\forall$sigma: Word $\rightarrow$ Word.
334 $\forall$policy: Word $\rightarrow$ bool.
335 $\forall$ppc.
336 $\forall$code_memory.
337 let $\langle$preamble, instr_list$\rangle$ := program in
338 let pi := $\pi_1$ (fetch_pseudo_instruction instr_list ppc) in
339 let pc := sigma ppc in
340 let instrs := expand_pseudo_instruction $\ldots$ sigma policy ppc $\ldots$ pi in
341 let $\langle$l, a$\rangle$ := assembly_1_pseudoinstruction $\ldots$ sigma policy ppc $\ldots$ pi in
342 let pc_plus_len := add $\ldots$ pc (bitvector_of_nat $\ldots$ l) in
343  encoding_check code_memory pc pc_plus_len a $\rightarrow$
344   fetch_many code_memory pc_plus_len pc instructions.
345\end{lstlisting}
346Here, \texttt{l} is the number of machine code instructions the pseudoinstruction at hand has been expanded into.
347We assemble a single pseudoinstruction with \texttt{assembly\_1\_pseudoinstruction}, which internally calls \texttt{jump\_expansion} and \texttt{expand\_pseudo\_instruction}.
348The function \texttt{fetch\_many} fetches multiple machine code instructions from code memory and performs some routine checks.
349
350Intuitively, Lemma \texttt{fetch\_assembly\_pseudo} can be read as follows.
351Suppose we expand the pseudoinstruction at \texttt{ppc} with the policy decision \texttt{sigma}, obtaining the list of machine code instructions \texttt{instrs}.
352Suppose we also assemble the pseudoinstruction at \texttt{ppc} to obtain \texttt{a}, a list of bytes.
353Then, we check with \texttt{fetch\_many} that the number of machine instructions that were fetched matches the number of instruction that \texttt{expand\_pseudo\_instruction} expanded.
354
355The final lemma in this series is \texttt{fetch\_assembly\_pseudo2} that combines the Lemma \texttt{fetch\_assembly\_pseudo} with the correctness of the functions that load object code into the processor's memory.
356Again, we slightly simplify:
357\begin{lstlisting}
358lemma fetch_assembly_pseudo2:
359 $\forall$program.
360 $\forall$sigma.
361 $\forall$policy.
362 $\forall$sigma_policy_specification_witness.
363 $\forall$ppc.
364  let $\langle$preamble, instr_list$\rangle$ := program in
365  let $\langle$labels, costs$\rangle$ := create_label_cost_map instr_list in
366  let $\langle$assembled, costs'$\rangle$ := $\pi_1$ $\ldots$ (assembly program sigma policy) in
367  let cmem := load_code_memory assembled in
368  let $\langle$pi, newppc$\rangle$ := fetch_pseudo_instruction instr_list ppc in
369  let instructions := expand_pseudo_instruction $\ldots$ sigma ppc $\ldots$ pi in
370    fetch_many cmem (sigma newppc) (sigma ppc) instructions.
371\end{lstlisting}
372
373Here we use $\pi_1 \ldots$ to eject out the existential witness from the Russell-typed function \texttt{assembly}.
374
375We read \texttt{fetch\_assembly\_pseudo2} as follows.
376Suppose we are able to successfully assemble an assembly program using \texttt{assembly} and produce a code memory, \texttt{cmem}.
377Then, fetching a pseudoinstruction from the pseudo code memory at address \texttt{ppc} corresponds to fetching a sequence of instructions from the real code memory using $\sigma$ to expand pseudoinstructions.
378The fetched sequence corresponds to the expansion, according to \texttt{sigma}, of the pseudoinstruction.
379
380At first, the lemmas appears to immediately imply the correctness of the assembler.
381However, this property is \emph{not} strong enough to establish that the semantics of an assembly program has been preserved by the assembly process since it does not establish the correspondence between the semantics of a pseudo-instruction and that of its expansion.
382In particular, the two semantics differ on instructions that \emph{could} directly manipulate program addresses.
383
384% ---------------------------------------------------------------------------- %
385% SECTION                                                                      %
386% ---------------------------------------------------------------------------- %
387\subsection{Total correctness for `well behaved' assembly programs}
388\label{subsect.total.correctness.for.well.behaved.assembly.programs}
389
390The traditional approach to verifying the correctness of an assembler is to treat memory addresses as opaque structures that cannot be modified.
391This prevents assembly programs from performing any `dangerous', semantics breaking manipulations of memory addresses by making these programs simply unrepresentable in the source language.
392
393Here, we take a different approach to this problem: we trace memory locations (and, potentially, registers) that contain memory addresses.
394We then prove that only those assembly programs that use addresses in `safe' ways have their semantics preserved by the assembly process.
395We believe that this approach is more flexible when compared to the traditional approach, as in principle it allows us to introduce some permitted \emph{benign} manipulations of addresses that the traditional approach, using opaque addresses, cannot handle, therefore expanding the set of input programs that can be assembled correctly.
396
397However, with this approach we must detect (at run time) programs that manipulate addresses in well behaved ways, according to some approximation of well-behavedness.
398Second, we must compute statuses that correspond to pseudo-statuses.
399The contents of the program counter must be translated, as well as the contents of all traced locations, by applying the \texttt{sigma} map.
400Remaining memory cells are copied \emph{verbatim}.
401
402For instance, after a function call, the two bytes that form the return pseudo address are pushed on top of the stack, i.e. in internal RAM.
403This pseudo internal RAM corresponds to an internal RAM where the stack holds the real addresses after optimisation, and all the other values remain untouched.
404
405We use an \texttt{internal\_pseudo\_address\_map} to trace addresses of code memory addresses in internal RAM:
406\begin{lstlisting}
407definition internal_pseudo_address_map :=
408  list ((BitVector 8) $\times$ (bool $\times$ Word)) $\times$ (option (bool $\times$ Word)).
409\end{lstlisting}
410The implementation of \texttt{internal\_pseudo\_address\_map} is complicated by some peculiarities of the MCS-51's instruction set.
411Note here that all addresses are 16 bit words, but are stored (and manipulated) as 8 bit bytes.
412All \texttt{MOV} instructions in the MCS-51 must use the accumulator \texttt{A} as an intermediary, moving a byte at a time.
413The second component of \texttt{internal\_pseudo\_address\_map} therefore states whether the accumulator currently holds a piece of an address, and if so, whether it is the upper or lower byte of the address (using the boolean flag) complete with the corresponding, source address in full.
414The first component, on the other hand, performs a similar task for the rest of external RAM.
415Again, we use a boolean flag to describe whether a byte is the upper or lower component of a 16-bit address.
416
417The \texttt{low\_internal\_ram\_of\_pseudo\_low\_internal\_ram} function converts the lower internal RAM of a \texttt{PseudoStatus} into the lower internal RAM of a \texttt{Status}.
418A similar function exists for higher internal RAM.
419Note that both RAM segments are indexed using addresses 7-bits long.
420The function is currently axiomatised, and an associated set of axioms prescribe the behaviour of the function:
421\begin{lstlisting}
422axiom low_internal_ram_of_pseudo_low_internal_ram:
423 internal_pseudo_address_map$\rightarrow$BitVectorTrie Byte 7$\rightarrow$BitVectorTrie Byte 7.
424\end{lstlisting}
425
426Next, we are able to translate \texttt{PseudoStatus} records into \texttt{Status} records using \texttt{status\_of\_pseudo\_status}.
427Translating a \texttt{PseudoStatus}'s code memory requires we expand pseudoinstructions and then assemble to obtain a trie of bytes.
428This never fails, provided that our policy is correct:
429\begin{lstlisting}
430definition status_of_pseudo_status:
431 internal_pseudo_address_map $\rightarrow$ $\forall$pap. $\forall$ps: PseudoStatus pap.
432 $\forall$sigma: Word $\rightarrow$ Word. $\forall$policy: Word $\rightarrow$ bool.
433  Status (code_memory_of_pseudo_assembly_program pap sigma policy)
434\end{lstlisting}
435
436The \texttt{next\_internal\_pseudo\_address\_map} function is responsible for run time monitoring of the behaviour of assembly programs, in order to detect well behaved ones.
437It returns a map that traces memory addresses in internal RAM after execution of the next pseudoinstruction, failing when the instruction tampers with memory addresses in unanticipated (but potentially correct) ways.
438It thus decides the membership of a strict subset of the set of well behaved programs.
439\begin{lstlisting}
440definition next_internal_pseudo_address_map: internal_pseudo_address_map
441 $\rightarrow$ PseudoStatus $\rightarrow$ option internal_pseudo_address_map
442\end{lstlisting}
443Note, if we wished to allow `benign manipulations' of addresses, it would be this function that needs to be changed.
444
445The function \texttt{ticks\_of} computes how long---in clock cycles---a pseudoinstruction will take to execute when expanded in accordance with a given policy.
446The function returns a pair of natural numbers, needed for recording the execution times of each branch of a conditional jump.
447\begin{lstlisting}
448axiom ticks_of:
449 $\forall$p:pseudo_assembly_program. policy p $\rightarrow$ Word $\rightarrow$ nat $\times$ nat := $\ldots$
450\end{lstlisting}
451
452Finally, we are able to state and prove our main theorem.
453This relates the execution of a single assembly instruction and the execution of (possibly) many machine code instructions, as long as we are able to track memory addresses properly:
454\begin{lstlisting}
455theorem main_thm:
456 $\forall$M, M': internal_pseudo_address_map.
457 $\forall$program: pseudo_assembly_program.
458 let $\langle$preamble, instr_list$\rangle$ := program in
459 $\forall$is_well_labelled: is_well_labelled_p instr_list.
460 $\forall$sigma: Word $\rightarrow$ Word.
461 $\forall$policy: Word $\rightarrow$ bool.
462 $\forall$sigma_policy_specification_witness.
463 $\forall$ps: PseudoStatus program.
464 $\forall$program_counter_in_bounds.
465  next_internal_pseudo_address_map M program ps = Some $\ldots$ M' $\rightarrow$
466  $\exists$n. execute n $\ldots$ (status_of_pseudo_status M $\ldots$ ps sigma policy) =
467   status_of_pseudo_status M' $\ldots$ (execute_1_pseudo_instruction
468     (ticks_of program sigma policy) program ps) sigma policy.
469\end{lstlisting}
470The statement is standard for forward simulation, but restricted to \texttt{PseudoStatuses} \texttt{ps} whose next instruction to be executed is well-behaved with respect to the \texttt{internal\_pseudo\_address\_map} \texttt{M}.
471Further, we explicitly requires proof that our policy is correct and the pseudo program counter lies within the bounds of the program.
472Theorem \texttt{main\_thm} establishes the total correctness of the assembly process and can simply be lifted to the forward simulation of an arbitrary number of well behaved steps on the assembly program.
473
474% ---------------------------------------------------------------------------- %
475% SECTION                                                                      %
476% ---------------------------------------------------------------------------- %
477\section{Conclusions}
478\label{sect.conclusions}
479
480We are proving the total correctness of an assembler for MCS-51 assembly language.
481In particular, our assembly language featured labels, arbitrary conditional and unconditional jumps to labels, global data and instructions for moving this data into the MCS-51's single 16-bit register.
482Expanding these pseudoinstructions into machine code instructions is not trivial, and the proof that the assembly process is `correct', in that the semantics of a subset of assembly programs are not changed is complex.
483
484The formalisation is a key component of the CerCo project, which aims to produce a verified concrete complexity preserving compiler for a large subset of the C programming language.
485The verified assembler, complete with the underlying formalisation of the semantics of MCS-51 machine code (described fully in~\cite{mulligan:executable:2011}), will form the bedrock layer upon which the rest of the CerCo project will build its verified compiler platform.
486
487It is interesting to compare our work to an `industrial grade' assembler for the MCS-51: SDCC~\cite{sdcc:2011}.
488SDCC is the only open source C compiler that targets the MCS-51 instruction set.
489It appears that all pseudojumps in SDCC assembly are expanded to \texttt{LJMP} instructions, the worst possible jump expansion policy from an efficiency point of view.
490Note that this policy is the only possible policy \emph{in theory} that can preserve the semantics of an assembly program during the assembly process.
491However, this comes at the expense of assembler completeness: the generated program may be too large to fit into code memory.
492In this respect, there is a trade-off between the completeness of the assembler and the efficiency of the assembled program.
493The definition and proof of a terminating, correct jump expansion policy is described in a companion publication to this one.
494
495Aside from their application in verified compiler projects such as CerCo and CompCert, verified assemblers such as ours could also be applied to the verification of operating system kernels.
496Of particular note is the verified seL4 kernel~\cite{klein:sel4:2009,klein:sel4:2010}.
497This verification explicitly assumes the existence of, amongst other things, a trustworthy assembler and compiler.
498
499Note that both CompCert and the seL4 formalisation assume the existence of `trustworthy' assemblers.
500The observation that an optimising assembler cannot preserve the semantics of every assembly program may have important consequences for these projects.
501If CompCert chooses to assume the existence of an optimising assembler, then care should be made to ensure that any assembly program produced by the CompCert compiler falls into the subset of programs that have a hope of having their semantics preserved by an optimising assembler.
502
503Our formalisation exploits dependent types in different ways and for multiple purposes.
504The first purpose is to reduce potential errors in the formalisation of the microprocessor.
505In particular, dependent types are used to constraint the size of bitvectors and tries that represent memory quantities and memory areas respectively.
506They are also used to simulate polymorphic variants in Matita, in order to provide precise typings to various functions expecting only a subset of all possible addressing modes than the MCS-51 offers.
507Polymorphic variants nicely capture the absolutely unorthogonal instruction set of the MCS-51 where every opcode must accept its own subset of the 11 addressing mode of the processor.
508
509The second purpose is to single out the sources of incompleteness.
510By abstracting our functions over the dependent type of correct policies, we were able to manifest the fact that the compiler never refuses to compile a program where a correct policy exists.
511This also allowed to simplify the initial proof by dropping lemmas establishing that one function fails if and only if some other one does so.
512
513Finally, dependent types, together with Matita's liberal system of coercions, allow to simulate almost entirely in user space the proof methodology ``Russell'' of Sozeau~\cite{sozeau:subset:2006}.
514However, not every proof has been done this way: we only used this style to prove that a function satisfies a specification that only involves that function in a significant way.
515For example, it would be unnatural to see the proof that fetch and assembly commute as the specification of one of the two functions.
516
517\subsection{Related work}
518\label{subsect.related.work}
519
520% piton
521We are not the first to consider the total correctness of an assembler for a non-trivial assembly language.
522Perhaps the most impressive piece of work in this domain is the Piton stack~\cite{moore:piton:1996,moore:grand:2005}.
523This was a stack of verified components, written and verified in ACL2, ranging from a proprietary FM9001 microprocessor verified at the gate level, to assemblers and compilers for two high-level languages---a dialect of Lisp and $\mu$Gypsy~\cite{moore:grand:2005}.
524
525% jinja
526Klein and Nipkow consider a Java-like programming language, Jinja~\cite{klein:machine:2006,klein:machine:2010}.
527They provide a compiler, virtual machine and operational semantics for the programming language and virtual machine, and prove that their compiler is semantics and type preserving.
528
529We believe some other verified assemblers exist in the literature.
530However, what sets our work apart from that above is our attempt to optimise the machine code generated by our assembler.
531This complicates any formalisation effort, as an attempt at the best possible selection of machine instructions must be made, especially important on a device such as the MCS-51 with a miniscule code memory.
532Further, care must be taken to ensure that the time properties of an assembly program are not modified by the assembly process lest we affect the semantics of any program employing the MCS-51's I/O facilities.
533This is only possible by inducing a cost model on the source code from the optimisation strategy and input program.
534This will be a \emph{leit motif} of CerCo.
535
536\subsection{Resources}
537\label{subsect.resources}
538
539All files relating to our formalisation effort can be found online at~\url{http://cerco.cs.unibo.it}.
540The code of the compiler has been completed, and the proof of correctness described here is still in progress.
541In particular, we have assumed several properties of ``library functions'' related in particular to modular arithmetic and datastructure manipulation.
542Moreover, we have axiomatised various ancillary functions needed to complete the main theorems, as well as some `routine' proof obligations of the theorems themselves, preferring instead to focus on the main meat of the theorems.
543We thus believe that the proof strategy is sound and that we will be able to close soon all axioms, up to possible minor bugs that should have local fixes that do not affect the global proof strategy.
544
545The development, including the definition of the executable semantics of the MCS-51, is spread across 29 files, totalling around 18,500 lines of Matita source.
546The bulk of the proof described herein is contained in a series of files, \texttt{AssemblyProof.ma}, \texttt{AssemblyProofSplit.ma} and \texttt{AssemblyProofSplitSplit.ma} consisting at the moment of approximately 4200 lines of Matita source.
547Numerous other lines of proofs are spread all over the development because of dependent types and the Russell proof style, which does not allow one to separate the code from the proofs.
548The low ratio between the number of lines of code and the number of lines of proof is unusual.
549It is justified by the fact that the pseudo-assembly and the assembly language share most constructs and that large parts of the semantics are also shared.
550Thus many lines of code are required to describe the complex semantics of the processor, but, for the shared cases, the proof of preservation of the semantics is essentially trivial.
551
552\bibliography{cpp-2012-asm.bib}
553
554\end{document}\renewcommand{\verb}{\lstinline}
555\def\lstlanguagefiles{lst-grafite.tex}
556\lstset{language=Grafite}
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