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36\title{On the correctness of an assembler for the Intel MCS-51 microprocessor}
37\author{Jaap Boender \and Dominic P. Mulligan \and Claudio Sacerdoti Coen}
38\institute{Dipartimento di Scienze dell'Informazione, Universit\'a di Bologna}
47We consider the formalisation of an assembler for the Intel MCS-51 8-bit microprocessor in the Matita proof assistant.
48This formalisation forms a major component of the EU-funded CerCo project, concering the construction and formalisation of a concrete complexity preserving compiler for a large subset of the C programming language.
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58We consider the formalisation of an assembler for the Intel MCS-51 8-bit microprocessor in the Matita proof assistant~\cite{asperti:user:2007}.
59This formalisation forms a major component of the EU-funded CerCo project~\cite{cerco:2011}, concering the construction and formalisation of a concrete complexity preserving compiler for a large subset of the C programming language.
61The MCS-51 dates from the early 1980s and commonly called the 8051/8052.
62Despite the microprocessor's age, derivatives are still widely manufactured by a number of semiconductor foundries.
63As a result the processor is widely used, especially in embedded systems development, where well-tested, cheap, predictable microprocessors find their niche.
65The MCS-51 has a relative paucity of features compared to its more modern brethren.
66In particular, the MCS-51 does not possess a cache or any instruction pipelining that would make predicting the concrete cost of executing a single instruction an involved process.
67Instead, each semiconductor foundry that produces an MCS-51 derivative is able to provide accurate timing information in clock cycles for each instruction in their derivative's instruction set.
68It is important to stress that this timing information, unlike in more sophisticated processors, is not an estimate, it is a definition.
69For the MCS-51, if a manufacturer states that a particular opcode takes three clock cycles to execute, then that opcode \emph{always} takes three clock cycles to execute.
71This predicability of timing information is especially attractive to the CerCo consortium.
72We are in the process of constructing a certified, concrete complexity compiler for a realistic processor, and not for building and formalising the worst case execution time (WCET) tools that would be necessary to achieve the same result with, for example, a modern ARM or PowerPC microprocessor.
74However, the MCS-51's paucity of features is a double edged sword.
75In particular, the MCS-51 features relatively miniscule memory spaces (including read-only code memory, stack and internal/external random access memory) by modern standards.
76As a result our compiler, to have any sort of hope of successfully compiling realistic C programs, ought to produce `tight' machine code.
77This is not simple.
79We here focus on a single issue in the MCS-51's instruction set: unconditional jumps.
80The MCS-51 features three conditional jump instructions: \texttt{LJMP} and \texttt{SJMP}---`long jump' and `short jump' respectively---and an 11-bit oddity of the MCS-51, \texttt{AJMP}, that the prototype CerCo compiler~\cite{cerco-report-code:2011} ignores for simplicity's sake.\footnote{Ignoring \texttt{AJMP} and its analogue \texttt{ACALL} is not idiosyncratic.  The Small Device C Compiler (SDCC)~\cite{sdcc:2011}, the leading open source C compiler for the MCS-51, also seemingly does not produce \texttt{AJMP} and \texttt{ACALL} instructions.  Their utility in a modern context remains unclear.}
81Each of these three instructions expects arguments in different sizes and behaves in different ways.
82\texttt{SJMP} may only perform a `local jump' whereas \texttt{LJMP} may jump to any address in the MCS-51's memory space.
83Consequently, the size of each opcode is different, and to squeeze as much code as possible into the MCS-51's limited code memory, the smallest possible opcode should be selected.
85The prototype CerCo C compiler does not attempt to select the smallest jump opcode in this manner, as this was thought to unneccessarily complicate the compilation chain.
86Instead, the compiler targets an assembly language, complete with pseudoinstructions including bespoke \texttt{Jmp} and \texttt{Call} instructions.
87Labels, conditional jumps to labels, a program preamble containing global data and a \texttt{MOV} instruction for moving this global data into the MCS-51's one 16-bit register also feature.
88This latter feature will ease any later consideration of separate compilation in the CerCo compiler.
89An assembler is used to expand pseudoinstructions into MCS-51 machine code.
91However, this assembly process is not trivial, for numerous reasons.
92For example, our conditional jumps to labels behave differently from their machine code counterparts.
93At the machine code level, conditional jumps may only jump to a relative offset, expressed in a byte, of the current program counter, limiting their range.
94However, at the assembly level, conditional jumps may jump to a label that appears anywhere in the program, significantly liberalising the use of conditional jumps and further simplifying the design of the CerCo compiler.
96Further, trying to na\"ively relate assembly programs with their machine code counterparts simply does not work.
97Machine code programs that fetch from code memory and programs that combine the program counter with constant shifts do not make sense at the assembly level.
98More generally, memory addresses can only be compared with other memory addresses.
99However, checking that memory addresses are only compared against each other at the assembly level is in fact undecidable.
100In short, the full preservation of the semantics of the two languages is impossible.
102Yet more complications are added by the peculiarities of the CerCo project itself.
103As mentioned, the CerCo consortium is in the business of constructing a verified compiler for the C programming language.
104However, unlike CompCert~\cite{compcert:2011,leroy:formal:2009,leroy:formally:2009}---which currently represents the state of the art for `industrial grade' verified compilers---CerCo considers not just the \emph{intensional correctness} of the compiler, but also its \emph{extensional correctness}.
105That is, CompCert focusses solely on the preservation of the \emph{meaning} of a program during the compilation process, guaranteeing that the program's meaning does not change as it is gradually transformed into assembly code.
106However in any realistic compiler (even the CompCert compiler!) there is no guarantee that the program's time properties are preserved during the compilation process; a compiler's `optimisations' could, in theory, even conspire to degrade the concrete complexity of certain classes of programs.
107CerCo aims to expand the current state of the art by producing a compiler where this temporal degradation is guaranteed not to happen.
109In order to achieve this CerCo imposes a cost model on programs, or more specifically, on simple blocks of instructions.
110This cost model is induced by the compilation process itself, and its non-compositional nature allows us to assign different costs to identical blocks of instructions depending on how they are compiled.
111In short, we aim to obtain a very precise costing for a program by embracing the compilation process, not ignoring it.
112This, however, complicates the proof of correctness for the compiler proper: for every translation pass from intermediate language to intermediate language, we must prove that not only has the meaning of a program been preserved, but also its complexity characteristics.
113This also applies for the translation from assembly language to machine code.
115How do we assign a cost to a pseudoinstruction?
116As mentioned, conditional jumps at the assembly level can jump to a label appearing anywhere in the program.
117However, at the machine code level, conditional jumps are limited to jumping `locally', using a measly byte offset.
118To translate a jump to a label, a single conditional jump pseudoinstruction may be translated into a block of three real instructions, as follows (here, \texttt{JZ} is `jump if accumulator is zero'):
121       & \mathtt{JZ}  & label                      &                 & \mathtt{JZ}   & \text{size of \texttt{SJMP} instruction} \\
122       & \ldots       &                            & \text{translates to}   & \mathtt{SJMP} & \text{size of \texttt{LJMP} instruction} \\
123label: & \mathtt{MOV} & \mathtt{A}\;\;\mathtt{B}   & \Longrightarrow & \mathtt{LJMP} & \text{address of \textit{label}} \\
124       &              &                            &                 & \ldots        & \\
125       &              &                            &                 & \mathtt{MOV}  & \mathtt{A}\;\;\mathtt{B}
128In the translation, if \texttt{JZ} fails, we fall through to the \texttt{SJMP} which jumps over the \texttt{LJMP}.
129Naturally, if \textit{label} is close enough, a conditional jump pseudoinstruction is mapped directly to a conditional jump machine instruction; the above translation only applies if \textit{label} is not sufficiently local.
130This leaves the problem, addressed below, of calculating whether a label is indeed `close enough' for the simpler translation to be used.
132Crucially, the above translation demonstrates the difficulty in predicting how many clock cycles a pseudoinstruction will take to execute.
133A conditional jump may be mapped to a single machine instruction or a block of three.
134Perhaps more insidious, the number of cycles needed to execute the instructions in the two branches of a translated conditional jump may be different.
135Depending on the particular MCS-51 derivative at hand, an \texttt{SJMP} could in theory take a different number of clock cycles to execute than an \texttt{LJMP}.
136These issues must also be dealt with in order to prove that the translation pass preserves the concrete complexity of the code.
138The question remains: how do we decide whether to expand a jump into an \texttt{SJMP} or an \texttt{LJMP}?
139To understand why this problem is not trivial, consider the following snippet of assembly code:
141\text{dpm: finish me}
144As our example shows, given an occurence $l$ of an \texttt{LJMP} instruction, it may be possible to shrink $l$ to an occurence of an \texttt{SJMP} providing we can shrink any \texttt{LJMP}s that exist between $l$ and its target location.
145However, shrinking these \texttt{LJMP}s may in turn depend on shrinking $l$ to an \texttt{SJMP}, as it is perfectly possible to jump backwards.
146In short, unless we can somehow break this loop of circularity, and similar knotty configurations of jumps, we are stuck with a suboptimal solution to the expanding jumps problem.
148How we went about resolving this problem affected the shape of our proof of correctness for the whole assembler in a rather profound way.
149We first attempted to synthesize a solution bottom up: starting with no solution, we gradually refine a solution using the same functions that implement the jump expansion.
150Using this technique, solutions can fail to exist, and the proof quickly descends into a diabolical quagmire.
152Abandoning this attempt, we instead split the `policy'---the decision over how any particular jump should be expanded---from the implementation that actually expands assembly programs into machine code.
153Assuming the existence of a correct policy, we proved the implementation of the assembler correct.
154Further, we proved that the assembler fails to assemble an assembly program if and only if a correct policy does not exist.
155Policies do not exist in only a limited number of circumstances: namely, if a pseudoinstruction attempts to jump to a label that does not exist, or the program is too large to fit in code memory.
156The first case would constitute a serious compiler error, and hopefully certifying the rest of the compiler would rule this possibility out.
157The second case is unavoidable---certified compiler or not, trying to load a huge program into a small code memory will break \emph{something}.
159The rest of this paper is a detailed description of this proof.
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164\subsection{Overview of the paper}
166In Section~\ref{sect.matita} we provide a brief overview of the Matita proof assistant for the unfamiliar reader.
167In Section~\ref{sect.the.proof} we discuss the design and implementation of the proof proper.
168In Section~\ref{sect.conclusions} we conclude.
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176Matita is a proof assistant based on the (Co)inductive Calculus of Constructions~\cite{asperti:user:2007}.
177For those familiar with Coq, Matita's syntax and mode of operation should be entirely familiar.
178We take time here to explain one of Matita's syntactic idiosyncracies, however.
179The use of `$\mathtt{\ldots}$' or `$\mathtt{?}$' in an argument position denotes a type to be inferred automatically by unification.
180The use of `$\mathtt{?}$' in the body of a definition, lemma or axiom denotes an incomplete term that is to be closed, by hand, using tactics.
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185\section{The proof}
188\subsection{The assembler and semantics of machine code}
191The formalisation in Matita of the semantics of MCS-51 machine code is described in~\cite{mulligan:executable:2011}.
192We merely describe enough here to understand the rest of the proof.
194At heart, the MCS-51 emulator centres around a \texttt{Status} record, describing the current state of the microprocessor.
195This record contains fields corresponding to the microprocessor's program counter, special function registers, and so on.
196At the machine code level, code memory is implemented as a trie of bytes, addressed by the program counter.
197Machine code programs are loaded into \texttt{Status} using the \texttt{load\_code\_memory} function.
199We may execut a single step of a machine code program using the \texttt{execute\_1} function, which returns an updated \texttt{Status}:
201definition execute_1: Status $\rightarrow$ Status := $\ldots$
203The function \texttt{execute} allows one to execute an arbitrary, but fixed (due to Matita's normalisation requirement!) number of steps of a program.
205Naturally, assembly programs have analogues.
206The counterpart of the \texttt{Status} record is \texttt{PseudoStatus}.
207Instead of code memory being implemented as tries of bytes, code memory is here implemented as lists of pseudoinstructions, and program counters are merely indices into this list.
208Our analogue of \texttt{execute\_1} is \texttt{execute\_1\_pseudo\_instruction}:
210definition execute_1_pseudo_instruction: (Word $\rightarrow$ nat $\times$ nat) $\rightarrow$
211                                         PseudoStatus $\rightarrow$ PseudoStatus := $\ldots$
213Notice, here, that the emulation function for pseudoprograms takes an additional argument.
214This is a function that maps program counters (for the pseudoprogram) to pairs of natural numbers representing the number of clock ticks that the pseudoinstruction needs to execute, post expansion.
215We require \emph{pairs} of natural numbers because, in the case of expanding conditional jumps to labels, the expansion of the `true branch' and `false branch' may differ in the number of clock ticks needed for execution.
216This timing information is used inside \texttt{execute\_1\_pseudo\_instruction} to update the clock of the \texttt{PseudoStatus}.
217During the proof of correctness of the assembler we relate the clocks of \texttt{Status}es and \texttt{PseudoStatus}es.
219The assembler, mapping programs consisting of lists of pseudoinstructions to lists of bytes, operates in a mostly straightforward manner.
220To a degree of approximation, the assembler on an assembly program, consisting of $n$ pseudoinstructions $\mathtt{P_i}$ for $1 \leq i \leq n$, works as in the following diagram:
222[\mathtt{P_1}, \ldots \mathtt{P_n}] \xrightarrow{\left(\mathtt{P_i} \xrightarrow{\mbox{\fontsize{7}{9}\selectfont$\mathtt{expand}$}} \mathtt{[I_1^i, \ldots I^q_i]} \xrightarrow{\mbox{\fontsize{7}{9}\selectfont$\mathtt{assembly1}^*$}} \mathtt{[0110]}\right)^{*}} \mathtt{[010101]}
225Here $\mathtt{I^i_j}$ for $1 \leq j \leq q$ are the $q$ machine code instructions obtained by expanding, with \texttt{expand\_pseudo\_instruction}, a single pseudoinstruction.
226Each machine code instruction $\mathtt{I^i_j}$ is then assembled, using the \texttt{assembly1} function, into a list of bytes.
227This process is iterated for each pseudoinstruction, before the lists are flattened into a single bit list representation of the original assembly program.
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236inductive jump_length: Type[0] ≝
237  | short_jump: jump_length
238  | medium_jump: jump_length
239  | long_jump: jump_length.
243definition jump_expansion_policy ≝ BitVectorTrie jump_length 16.
247definition policy_ok := λpolicy.λp. sigma_safe policy p <> None ....
251definition sigma:
252 ∀p:pseudo_assembly_program.
253  ∀policy. policy_ok policy p. Word → Word
257axiom low_internal_ram_of_pseudo_low_internal_ram:
258 ∀M:internal_pseudo_address_map.∀ram:BitVectorTrie Byte 7.BitVectorTrie Byte 7.
261CSC: no option using policy
263definition status_of_pseudo_status:
264 internal_pseudo_address_map → PseudoStatus → option Status
268definition next_internal_pseudo_address_map0:
269 internal_pseudo_address_map → PseudoStatus → option internal_pseudo_address_map
272CSC: no 2nd, 3rd options using policy
274 ∀M,M',ps,s,s''.
275  next_internal_pseudo_address_map M ps = Some ... M' →
276  status_of_pseudo_status M ps = Some ... s →
277  status_of_pseudo_status M' (execute_1_pseudo_instruction (ticks_of (code_memory ... ps)) ps) = Some ... s'' →
278   ∃n. execute n s = s''.
281CSC: no options using policy
283lemma fetch_assembly_pseudo2:
284 ∀program,assembled,costs,labels.
285  Some ... LANGLElabels,costsRANGLE = build_maps program →
286  Some ... LANGLEassembled,costsRANGLE = assembly program →
287   ∀ppc.
288    let code_memory ≝ load_code_memory assembled in
289    let preamble ≝ \fst program in
290    let data_labels ≝ construct_datalabels preamble in
291    let lookup_labels ≝ λx. sigma program (address_of_word_labels_code_mem (\snd program) x) in
292    let lookup_datalabels ≝ λx. lookup ? ? x data_labels (zero ?) in
293    let expansion ≝ jump_expansion ppc program in
294    let LANGLEpi,newppcRANGLE ≝ fetch_pseudo_instruction (\snd program) ppc in
295     ∃instructions.
296      Some ? instructions = expand_pseudo_instruction lookup_labels lookup_datalabels (sigma program ppc) expansion pi ∧
297       fetch_many code_memory (sigma program newppc) (sigma program ppc) instructions.
301 definition expand_pseudo_instruction:
302  ∀lookup_labels.∀lookup_datalabels.∀pc.∀policy_decision. (sigma program ppc) expansion. pseudo_instruciton -> list instruction.
306axiom assembly_ok:
307 ∀program,assembled,costs,labels.
308  Some ... LANGLElabels,costsRANGLE = build_maps program →
309  Some ... LANGLEassembled,costsRANGLE = assembly program →
310  let code_memory ≝ load_code_memory assembled in
311  let preamble ≝ \fst program in
312  let datalabels ≝ construct_datalabels preamble in
313  let lookup_labels ≝ λx. sigma program (address_of_word_labels_code_mem (\snd program) x) in
314  let lookup_datalabels ≝ λx. lookup ?? x datalabels (zero ?) in
315   ∀ppc,len,assembledi.
316    let LANGLEpi,newppcRANGLE ≝ fetch_pseudo_instruction (\snd program) ppc in
317     Some ... LANGLElen,assemblediRANGLE = assembly_1_pseudoinstruction program ppc (sigma program ppc) lookup_labels lookup_datalabels pi →
318      encoding_check code_memory (sigma program ppc) (bitvector_of_nat ... (nat_of_bitvector ... (sigma program ppc) + len)) assembledi ∧
319       sigma program newppc = bitvector_of_nat ... (nat_of_bitvector ... (sigma program ppc) + len).
323lemma fetch_assembly_pseudo:
324 ∀program,ppc,lookup_labels,lookup_datalabels.
325  ∀pi,code_memory,len,assembled,instructions,pc.
326   let expansion ≝ jump_expansion ppc program in
327   Some ? instructions = expand_pseudo_instruction lookup_labels lookup_datalabels (bitvector_of_nat ? pc) expansion pi →
328    Some ... LANGLElen,assembledRANGLE = assembly_1_pseudoinstruction program ppc (bitvector_of_nat ? pc) lookup_labels lookup_datalabels pi →
329     encoding_check code_memory (bitvector_of_nat ... pc) (bitvector_of_nat ... (pc + len)) assembled →
330      fetch_many code_memory (bitvector_of_nat ... (pc + len)) (bitvector_of_nat ... pc) instructions.
334theorem fetch_assembly:
335  ∀pc,i,code_memory,assembled.
336    assembled = assembly1 i →
337      let len ≝ length ... assembled in
338      encoding_check code_memory (bitvector_of_nat ... pc) (bitvector_of_nat ... (pc + len)) assembled →
339      let fetched ≝ fetch code_memory (bitvector_of_nat ... pc) in
340      let LANGLEinstr_pc, ticksRANGLE ≝ fetched in
341      let LANGLEinstr,pc'RANGLE ≝ instr_pc in
342       (eq_instruction instr i ∧ eqb ticks (ticks_of_instruction instr) ∧ eq_bv ... pc' (bitvector_of_nat ... (pc + len))) = true.
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351  \begin{itemize}
352   \item use of dependent types to throw away wrong programs that would made
353    the statement for completeness complex. E.g. misuse of addressing modes,
354    jumps to non existent labels, etc.
355   \item try to go for small reflection; avoid inductive predicates that require
356    tactics (inversion, etc.) that do not work well with dependent types; small
357    reflection usually does
358   \item use coercions to simulate Russell; mix together the proof styles
359    a la Russell (for situations with heavy dependent types) and the standard
360    one
361  \end{itemize}
363\subsection{Use of dependent types and Russell}
366Our formalisation makes sparing use of dependent types.
367In certain datastructures, such as tries and vectors, they are used to guarantee invariants.
368However, we have currently shyed away from making extensive use of dependent types and inductive predicates in the proof of correctness for the assembler itself.
369This is because complex dependent types and inductive predicates tend not to co\"operate particularly well with tactics such as inversion.
371However, there are certain cases where the use of dependent types is unavoidable.
372For instance, when proving that the \texttt{build\_maps} function is correct, a function that collates the cost and data labels of an assembly program into map datastructures.
373In cases such as these we make use of Matita's implementation of Russell~\cite{}.
375\subsection{Related work}
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