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37\title{On the correctness of an assembler for the Intel MCS-51 microprocessor\thanks{The project CerCo acknowledges the financial support of the Future and Emerging Technologies (FET) programme within the Seventh Framework Programme for Research of the European Commission, under FET-Open grant number: 243881}}
38\author{Dominic P. Mulligan \and Claudio Sacerdoti Coen}
39\institute{Dipartimento di Scienze dell'Informazione, Universit\'a di Bologna}
48We consider the formalisation of an assembler for Intel MCS-51 assembly language in the Matita proof assistant.
49This formalisation forms a major component of the EU-funded CerCo project, concering the construction and formalisation of a concrete complexity preserving compiler for a large subset of the C programming language.
51The efficient expansion of pseudoinstructions---particularly jumps---into MCS-51 machine instructions is complex.
52We employ a strategy, involving the use of `policies', that separates the decision making over how jumps should be expanded from the expansion process itself.
53This makes the proof of correctness for the assembler significantly more straightforward.
55We prove, under the assumption of the existence of a correct policy, that the assembly process never fails and preserves the semantics of a subset of assembly programs.
56Correct policies fail to exist only in a limited number of pathological circumstances.
57Our assembler is complete with respect to the choice of policy.
59Surprisingly, we observe that it is impossible for an optimising assembler to preserve the semantics of every assembly program.
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68We consider the formalisation of an assembler for the Intel MCS-51 8-bit microprocessor in the Matita proof assistant~\cite{asperti:user:2007}.
69This formalisation forms a major component of the EU-funded CerCo project~\cite{cerco:2011}, concering the construction and formalisation of a concrete complexity preserving compiler for a large subset of the C programming language.
71The MCS-51 dates from the early 1980s and is commonly called the 8051/8052.
72Despite the microprocessor's age, derivatives are still widely manufactured by a number of semiconductor foundries.
73As a result the processor is widely used, especially in embedded systems development, where well-tested, cheap, predictable microprocessors find their niche.
75The MCS-51 has a relative paucity of features compared to its more modern brethren.
76In particular, the MCS-51 does not possess a cache or any instruction pipelining that would make predicting the concrete cost of executing a single instruction an involved process.
77Instead, each semiconductor foundry that produces an MCS-51 derivative is able to provide accurate timing information in clock cycles for each instruction in their derivative's instruction set.
78It is important to stress that this timing information, unlike in more sophisticated processors, is not an estimate, it is a `definition'.
79For the MCS-51, if a manufacturer states that a particular opcode takes three clock cycles to execute, then that opcode \emph{always} takes three clock cycles to execute.
81This predicability of timing information is especially attractive to the CerCo consortium.
82We are in the process of constructing a certified, concrete complexity compiler for a realistic processor, and not for building and formalising the worst case execution time tools (WCET---see~\cite{bate:wcet:2011}, amongst many others, for an application of WCET technology to microprocessors with more complex designs) that would be necessary to achieve the same result with, for example, a modern ARM or PowerPC microprocessor.
84As in most things, what one hand giveth, the other taketh away: the MCS-51's paucity of features, though an advantage in many respects, also quickly become a hindrance, and successfully compiling high-level code for this architecture is a cumbrous and involved process.
85In particular, the MCS-51 features a relatively miniscule series of memory spaces (including read-only code memory, stack and internal/external random access memory) by modern standards.
86As a result our C compiler, to have any sort of hope of successfully compiling realistic programs for embedded devices, ought to produce `tight' machine code.
87This is not simple and requires the use of optimisations.
89For example, the MCS-51 features three unconditional jump instructions: \texttt{LJMP} and \texttt{SJMP}---`long jump' and `short jump' respectively---and an 11-bit oddity of the MCS-51, \texttt{AJMP}.
90Each of these three instructions expects arguments in different sizes and behaves in markedly different ways: \texttt{SJMP} may only perform a `local jump'; \texttt{LJMP} may jump to any address in the MCS-51's memory space and \texttt{AJMP} may jump to any address in the current memory page.
91Consequently, the size of each opcode is different, and to squeeze as much code as possible into the MCS-51's limited code memory, the smallest possible opcode that will suffice should be selected.
93The prototype CerCo C compiler does not attempt to select the smallest jump opcode in this manner, as this was thought to unneccessarily complicate the compilation chain, making the eventual translation and formalisation of the compiler into Matita much harder.
94Instead, the compiler targets a bespoke assembly language, similar to `real world' assembly languages, complete with pseudoinstructions including \texttt{Jmp} and \texttt{Call} instructions.
95Labels, conditional jumps to labels, a program preamble containing global data and a \texttt{MOV} instruction for moving this global data into the MCS-51's one 16-bit register also feature.
96This latter feature will ease any later consideration of separate compilation in the CerCo compiler.
97An assembler is used to expand pseudoinstructions into MCS-51 machine code.
99However, this assembly process is not trivial, for numerous reasons.
100For example, our conditional jumps to labels behave differently from their machine code counterparts.
101At the machine code level, all conditional jumps are `short', limiting their range.
102However, at the assembly level, conditional jumps may jump to a label that appears anywhere in the program, significantly liberalising the use of conditional jumps and further simplifying the design of the CerCo compiler.
104Further, trying to na\"ively relate assembly programs with their machine code counterparts simply does not work.
105Machine code programs that fetch from constant addresses in code memory or programs that combine the program counter with constant shifts do not make sense at the assembly level, since the position of instructions in code memory will be known only after assembly and optimisation.
106More generally, memory addresses can only be compared with other memory addresses.
107However, checking that memory addresses are only compared against each other at the assembly level is in fact undecidable.
108In short, we come to the shocking\footnote{For us, anyway.} realisation that, with optimisations, the full preservation of the semantics of all assembly programs is impossible.
109We believe that this revelation is significant for large formalisation projects that assume the existence of a correct assembler.
110Projects in this class include both the recent CompCert~\cite{compcert:2011,leroy:formal:2009} and seL4 formalisations~\cite{klein:sel4:2009,klein:sel4:2010}.
112Yet, the situation is even more complex than having to expand pseudoinstructions correctly.
113In particular, when formalising the assembler, we must make sure that the assembly process does not change the timing characteristics of an assembly program for two reasons.
115First, the semantics of some functions of the MCS-51, notably I/O, depend on the microprocessor's clock.
116Changing how long a particular program takes to execute can affect the semantics of a program.
117This is undesirable.
119Second, as mentioned, the CerCo consortium is in the business of constructing a verified compiler for the C programming language.
120However, unlike CompCert~\cite{compcert:2011,leroy:formal:2009}---which currently represents the state of the art for `industrial grade' verified compilers---CerCo considers not just the \emph{extensional correctness} of the compiler, but also its \emph{intensional correctness}.
121That is, CompCert focusses solely on the preservation of the \emph{meaning} of a program during the compilation process, guaranteeing that the program's meaning does not change as it is gradually transformed into assembly code.
122However in any realistic compiler (even the CompCert compiler!) there is no guarantee that the program's time properties are preserved during the compilation process; a compiler's `optimisations' could, in theory, even conspire to degrade the concrete complexity of certain classes of programs.
123CerCo aims to expand the current state of the art by producing a compiler where this temporal degradation is guaranteed not to happen.
124Moreover, CerCo's approach lifts a program's timing information to the source (C language) level.
125This has the advantage of allowing a programmer to reason about a program's intensional properties directly on the source code that they write, not on the code that the compiler produces.
127In order to achieve this, CerCo imposes a cost model on programs or, more specifically, on simple blocks of instructions.
128This cost model is induced by the compilation process itself, and its non-compositional nature allows us to assign different costs to identical blocks of instructions depending on how they are compiled.
129In short, we aim to obtain a very precise costing for a program by embracing the compilation process, not ignoring it.
130This, however, complicates the proof of correctness for the compiler proper.
131In each translation pass from intermediate language to intermediate language, we must prove that both the meaning and concrete complexity characteristics of the program are preserved.
132This also applies for the translation from assembly language to machine code.
134Naturally, this raises a question: how do we assign an \emph{accurate} cost to a pseudoinstruction?
135As mentioned, conditional jumps at the assembly level can jump to a label appearing anywhere in the program.
136However, at the machine code level, conditional jumps are limited to jumping `locally', using a measly byte offset.
137To translate a jump to a label, a single conditional jump pseudoinstruction may be translated into a block of three real instructions as follows (here, \texttt{JZ} is `jump if accumulator is zero'):
141       & \mathtt{JZ}  & \mathtt{label}                      &                 & \mathtt{JZ}   & \text{size of \texttt{SJMP} instruction} \\
142       & \ldots       &                            & \text{translates to}   & \mathtt{SJMP} & \text{size of \texttt{LJMP} instruction} \\
143\mathtt{label:} & \mathtt{MOV} & \mathtt{A}\;\;\mathtt{B}   & \Longrightarrow & \mathtt{LJMP} & \text{address of \textit{label}} \\
144       &              &                            &                 & \ldots        & \\
145       &              &                            &                 & \mathtt{MOV}  & \mathtt{A}\;\;\mathtt{B}
148Here, if \texttt{JZ} fails, we fall through to the \texttt{SJMP} which jumps over the \texttt{LJMP}.
149Naturally, if \texttt{label} is close enough, a conditional jump pseudoinstruction is mapped directly to a conditional jump machine instruction; the above translation only applies if \texttt{label} is not sufficiently local.
150We address the calculation of whether a label is indeed `close enough' for the simpler translation to be used below.
152Crucially, the above translation demonstrates the difficulty in predicting how many clock cycles a pseudoinstruction will take to execute.
153A conditional jump may be mapped to a single machine instruction or a block of three.
154Perhaps more insidious is the realisation that the number of cycles needed to execute the instructions in the two branches of a translated conditional jump may be different.
155Depending on the particular MCS-51 derivative at hand, an \texttt{SJMP} could in theory take a different number of clock cycles to execute than an \texttt{LJMP}.
156These issues must also be dealt with in order to prove that the translation pass preserves the concrete complexity of assembly code, and that the semantics of a program using the MCS-51's I/O facilities does not change.
157We address this problem by parameterizing the semantics over a cost model.
158We prove the preservation of concrete complexity only for the program-dependent cost model induced by the optimisation.
160Yet one more question remains: how do we decide whether to expand a jump into an \texttt{SJMP} or an \texttt{LJMP}?
161To understand, again, why this problem is not trivial, consider the following snippet of assembly code:
165\text{1:} & \mathtt{(0x000)}  & \texttt{LJMP} & \texttt{0x100}  & \text{\texttt{;; Jump forward 256.}} \\
166\text{2:} & \mathtt{...}    & \mathtt{...}  &                 &                                               \\
167\text{3:} & \mathtt{(0x0FA)}  & \texttt{LJMP} & \texttt{0x100}  & \text{\texttt{;; Jump forward 256.}} \\
168\text{4:} & \mathtt{...}    & \mathtt{...}  &                 &                                               \\
169\text{5:} & \mathtt{(0x100)}  & \texttt{LJMP} & \texttt{-0x100}  & \text{\texttt{;; Jump backward 256.}} \\
172We observe that $100_{16} = 256_{10}$, and lies \emph{just} outside the range expressible in an 8-bit byte (0--255).
174As our example shows, given an occurence $l$ of an \texttt{LJMP} instruction, it may be possible to shrink $l$ to an occurence of an \texttt{SJMP}---consuming fewer bytes of code memory---provided we can shrink any \texttt{LJMP}s that exist between $l$ and its target location.
175In particular, if we wish to shrink the \texttt{LJMP} occurring at line 1, then we must shrink the \texttt{LJMP} occurring at line 3.
176However, to shrink the \texttt{LJMP} occurring at line 3 we must also shrink the \texttt{LJMP} occurring at line 5, and \emph{vice versa}.
178Further, consider what happens if, instead of appearing at memory address \texttt{0x100}, the instruction at line 5 instead appeared \emph{just} beyond the size of code memory, and all other memory addresses were shifted accordingly.
179Now, in order to be able to successfully fit our program into the MCS-51's limited code memory, we are \emph{obliged} to shrink the \texttt{LJMP} occurring at line 5.
180That is, the shrinking process is not just related to the optimisation of generated machine code but also the completeness of the assembler itself.
182How we went about resolving this problem affected the shape of our proof of correctness for the whole assembler in a rather profound way.
183We first attempted to synthesize a solution bottom up: starting with no solution, we gradually refine a solution using the same functions that implement the jump expansion process.
184Using this technique, solutions can fail to exist, and the proof of correctness for the assembler quickly descends into a diabolical quagmire.
186Abandoning this attempt, we instead split the `policy'---the decision over how any particular jump should be expanded---from the implementation that actually expands assembly programs into machine code.
187Assuming the existence of a correct policy, we proved the implementation of the assembler correct.
188Further, we proved that the assembler fails to assemble an assembly program if and only if a correct policy does not exist.
189This is achieved by means of dependent types: the assembly function is total over a program, a policy and the proof that the policy is correct for that program.
191Policies do not exist in only a limited number of circumstances: namely, if a pseudoinstruction attempts to jump to a label that does not exist, or the program is too large to fit in code memory, even after shrinking jumps according to the best policy.
192The first circumstance is an example of a serious compiler error, as an ill-formed assembly program was generated, and does not (and should not) count as a mark against the completeness of the assembler.
193We plan to employ dependent types in CerCo in order to restrict the domain of the compiler to those programs that are `semantically correct' and should be compiled.
194In particular, in CerCo we are also interested in the completeness of the compilation process, whereas previous formalisations only focused on correctness.
196The rest of this paper is a detailed description of our proof that is, in part, still a work in progress.
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201\subsection{Overview of the paper}
203In Section~\ref{sect.matita} we provide a brief overview of the Matita proof assistant for the unfamiliar reader.
204In Section~\ref{sect.the.proof} we discuss the design and implementation of the proof proper.
205In Section~\ref{sect.conclusions} we conclude.
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213Matita is a proof assistant based on a variant of the Calculus of (Co)inductive Constructions~\cite{asperti:user:2007}.
214In particular, it features dependent types that we heavily exploit in the formalisation.
215The syntax of the statements and definitions in the paper should be self-explanatory, at least to those exposed to dependent type theory.
216We only remark the use of of `$\mathtt{?}$' or `$\mathtt{\ldots}$' for omitting single terms or sequences of terms to be inferred automatically by the system, respectively.
217Those that are not inferred are left to the user as proof obligations.
218Pairs are denoted with angular brackets, $\langle-, -\rangle$.
220Matita features a liberal system of coercions.
221It is possible to define a uniform coercion $\lambda x.\langle x,?\rangle$ from every type $T$ to the dependent product $\Sigma x:T.P~x$.
222The coercion opens a proof obligation that asks the user to prove that $P$ holds for $x$.
223When a coercion must be applied to a complex term (a $\lambda$-abstraction, a local definition, or a case analysis), the system automatically propagates the coercion to the sub-terms
224 For instance, to apply a coercion to force $\lambda x.M : A \to B$ to have type $\forall x:A.\Sigma y:B.P~x~y$, the system looks for a coercion from $M: B$ to $\Sigma y:B.P~x~y$ in a context augmented with $x:A$.
225This is significant when the coercion opens a proof obligation, as the user will be presented with multiple, but simpler proof obligations in the correct context.
226In this way, Matita supports the ``Russell'' proof methodology developed by Sozeau in~\cite{sozeau:subset:2006}, with an implementation that is lighter and more tightly integrated with the system than that of Coq.
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231\section{The proof}
234\subsection{The assembler and semantics of machine code}
237The formalisation in Matita of the semantics of MCS-51 machine code is described in~\cite{mulligan:executable:2011}.
238We merely describe enough here to understand the rest of the proof.
240The emulator centres around a \texttt{Status} record, describing the microprocessor's state.
241This record contains fields corresponding to the microprocessor's program counter, registers, and so on.
242At the machine code level, code memory is implemented as a compact trie of bytes, addressed by the program counter.
243Machine code programs are loaded into \texttt{Status} using the \texttt{load\_code\_memory} function.
245We may execute a single step of a machine code program using the \texttt{execute\_1} function, which returns an updated \texttt{Status}:
247definition execute_1: Status $\rightarrow$ Status := $\ldots$
249The function \texttt{execute} allows one to execute an arbitrary, but fixed (due to Matita's normalisation requirement) number of steps of a program.
251Naturally, assembly programs have analogues.
252The counterpart of the \texttt{Status} record is \texttt{PseudoStatus}.
253Instead of code memory being implemented as tries of bytes, code memory is here implemented as lists of pseudoinstructions, and program counters are merely indices into this list.
254Both \texttt{Status} and \texttt{PseudoStatus} are specialisations of the same \texttt{PreStatus} record, parametric in the representation of code memory.
255This allows us to share some code that is common to both records (for instance, `setter' and `getter' functions).
257Our analogue of \texttt{execute\_1} is \texttt{execute\_1\_pseudo\_instruction}:
259definition execute_1_pseudo_instruction: (Word $\rightarrow$ nat $\times$ nat) $\rightarrow$
260                                         PseudoStatus $\rightarrow$ PseudoStatus := $\ldots$
262Notice, here, that the emulation function for assembly programs takes an additional argument.
263This is a function that maps program counters (at the assembly level) to pairs of natural numbers representing the number of clock ticks that the pseudoinstruction needs to execute, post expansion.
264We call this function a \emph{costing}, and note that the costing is induced by the particular strategy we use to expand pseudoinstructions.
265If we change how we expand conditional jumps to labels, for instance, then the costing needs to change, hence \texttt{execute\_1\_pseudo\_instruction}'s parametricity in the costing.
267The costing returns \emph{pairs} of natural numbers because, in the case of expanding conditional jumps to labels, the expansion of the `true branch' and `false branch' may differ in execution time.
268This timing information is used inside \texttt{execute\_1\_pseudo\_instruction} to update the clock of the \texttt{PseudoStatus}.
269During the proof of correctness of the assembler we relate the clocks of \texttt{Status}es and \texttt{PseudoStatus}es for the policy induced by the cost model and optimisations.
271The assembler, mapping programs consisting of lists of pseudoinstructions to lists of bytes, operates in a mostly straightforward manner.
272To a degree of approximation, the assembler on an assembly program, consisting of $n$ pseudoinstructions $\mathtt{P_i}$ for $1 \leq i \leq n$, works as in the following diagram (we use $-^{*}$ to denote a combined map and flatten operation):
274[\mathtt{P_1}, \ldots \mathtt{P_n}] \xrightarrow{\left(\mathtt{P_i} \xrightarrow{\mbox{\fontsize{7}{9}\selectfont$\mathtt{expand\_pseudo\_instruction}$}} \mathtt{[I^1_i, \ldots I^q_i]} \xrightarrow{\mbox{\fontsize{7}{9}\selectfont$\mathtt{~~~~~~~~assembly1^{*}~~~~~~~~}$}} \mathtt{[0110]}\right)^{*}} \mathtt{[010101]}
276Here $\mathtt{I^j_i}$ for $1 \leq j \leq q$ are the $q$ machine code instructions obtained by expanding, with \texttt{expand\_pseudo\_instruction}, a single pseudoinstruction $P_i$.
277Each machine code instruction $\mathtt{I^i_j}$ is then assembled, using the \texttt{assembly1} function, into a list of bytes.
278This process is iterated for each pseudoinstruction, before the lists are flattened into a single bit list representation of the original assembly program.
280By inspecting the above diagram, it would appear that the best way to proceed with a proof that the assembly process does not change the semantics of an assembly program is by proving the same independently for
281\texttt{expand\_pseudo\_instruction} and for \texttt{assembly1}.
282%Namely, we first expand any and all pseudoinstructions into lists of machine instructions, and provide a proof that this process does not change our program's semantics.
283%Finally, we assemble all machine code instructions into machine code---lists of bytes---and prove once more that this process does not have an adverse effect on a program's semantics.
284%By composition, we then have that the whole assembly process is semantics preserving.
285This is a tempting approach to the proof, but ultimately the wrong approach.
286In particular, to expand a pseudoinstruction we need to know the address at which the expanded instructions will be located, for instance to know if a short jump is possible.
287That address is a function of the \emph{machine code} generated for the pseudoinstructions already expanded.
288Thus, we must assemble each pseudoinstruction into machine code before moving on, and this must be eventually reflected in the proof too.
289Therefore we will have lemmas proving correctness for \texttt{assembly1}, and for the composition of \texttt{assembly1} and
290\texttt{expand\_pseudo\_instruction}, but not for \texttt{expand\_pseudo\_instruction} alone.
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298Policies exist to dictate how conditional and unconditional jumps at the assembly level should be expanded into machine code instructions.
299Using policies, we are able to completely decouple the decision over how jumps are expanded with the act of expansion, simplifying our proofs.
300As mentioned, the MCS-51 instruction set includes three different jump instructions: \texttt{SJMP}, \texttt{AJMP} and \texttt{LJMP}; call these `short', `medium' and `long' jumps, respectively:
302inductive jump_length: Type[0] :=
303  |short_jump:jump_length |medium_jump:jump_length |long_jump:jump_length.
306A \texttt{jump\_expansion\_policy} is a map from pseudo program counters (implemented as \texttt{Word}s) to \texttt{jump\_length}s.
307Efficient implementations of policies are based on tries.
308Intuitively, a policy maps positions in a program (indexed using program counters implemented as \texttt{Word}s) to a particular variety of jump:
310definition policy_type := Word $\rightarrow$ jump_length.
313Next, we require a series of `sigma' functions.
314These functions map assembly program counters to their machine code counterparts, establishing the correspondence between `positions' in an assembly program and `positions' in a machine code program.
315At the heart of this process is \texttt{sigma0} which traverses an assembly program building maps from pseudo program counters to program counters.
316This function fails if and only if an internal call to \texttt{assembly\_1\_pseudoinstruction\_safe} fails, which happens if a jump pseudoinstruction is expanded incorrectly:
318definition sigma0: pseudo_assembly_program $\rightarrow$ policy_type
319  $\rightarrow$ option (nat $\times$ (nat $\times$ (BitVectorTrie Word 16))) := $\ldots$
321Here, the returned \texttt{BitVectorTrie} is a map between pseudo program counters and program counters, and is constructed by successively expanding pseudoinstructions and incrementing the two program counters the requisite amount to keep them in correct correspondence.
322The two natural numbers returned are the maximum values that the two program counters attained.
324We eventually lift this to functions from pseudo program counters to program counters, implemented as \texttt{Word}s:
326definition sigma_safe:
327  pseudo_assembly_program $\rightarrow$ policy_type $\rightarrow$ option (Word $\rightarrow$ Word) := $\ldots$
330Now, it's possible to define what a `good policy' is for a program \texttt{p}.
331A policy \texttt{pol} is deemed good when it prevents \texttt{sigma\_safe} from failing on \texttt{p}.
332Failure is only possible when the policy dictates that short or medium jumps be expanded to jumps to locations too far away, or when the produced object code does not fit into code memory.
333A \texttt{policy} for a program \texttt{p} is a policy that is good for \texttt{p}:
335definition policy_ok := $\lambda$pol.$\lambda$p. sigma_safe p $\neq$ None $\ldots$
336definition policy :=
337  $\lambda$p. $\Sigma$jump_expansion: policy_type. policy_ok jump_expansion p
340Finally, we obtain \texttt{sigma}, a mapping from pseudo program counters to program counters that takes in input a good policy and thus never fails.
341Note how we avoid failure here, and in most of the remaining functions, by restricting the domain using the dependent type \texttt{policy}:
343definition sigma: $\forall$p. policy p $\rightarrow$ Word $\rightarrow$ Word := $\ldots$
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349\subsection{Correctness of the assembler with respect to fetching}
352Using our policies, we now work toward proving the total correctness of the assembler.
353By `total correctness', we mean that the assembly process never fails when provided with a good policy and that the process does not change the semantics of a certain class of well behaved assembly programs.
354Naturally, this necessitates keeping some sort of correspondence between addresses at the assembly level and addresses at the machine code level.
355For this, we use the \texttt{sigma} machinery defined at the end of Subsection~\ref{subsect.policies}.
357We expand pseudoinstructions using the function \texttt{expand\_pseudo\_instruction}.
358This takes an assembly program (consisting of a list of pseudoinstructions), a good policy for the program and a pointer to the pseudo code memory.
359It returns a list of instructions, corresponding to the expanded pseudoinstruction referenced by the pointer.
360The policy is used to decide how to expand \texttt{Call}s, \texttt{Jmp}s and conditional jumps.
361The function is given a dependent type that incorporates its specification.
362Its pre- and post-conditions are omitted in the paper due to lack of space.
363We show them as an example in the next function, \texttt{build\_maps}.
365definition expand_pseudo_instruction:
366  $\forall$program. $\forall$pol: policy program.
367  $\forall$ppc:Word. $\ldots$ $\Sigma$res. list instruction. $\ldots$ := $\ldots$
370The following function, \texttt{build\_maps}, is used to construct a pair of mappings from program counters to labels and cost labels, respectively.
371Cost labels are a technical device used in the CerCo prototype C compiler for proving that the compiler is cost preserving.
372For our purposes in this paper, they can be safely ignored, though the interested reader may consult~\cite{amadio:certifying:2010} for an overview.
374The label map, on the other hand, records the position of labels that appear in an assembly program, so that the pseudoinstruction expansion process can replace them with real memory addresses:
376definition build_maps:
377 $\forall$p. $\forall$pol: policy p.
378 $\Sigma$res : ((BitVectorTrie Word 16) $\times$ (BitVectorTrie Word 16)).
379   let $\langle$labels, costs$\rangle$ := res in
380     $\forall$id. occurs_exactly_once id ($\pi_2$ p) $\rightarrow$
381    let addr := address_of_word_labels_code_mem ($\pi_2$ p) id in
382      lookup $\ldots$ id labels (zero $\ldots$) = sigma pseudo_program pol addr := $\ldots$
384The type of \texttt{build\_maps} owes to our use of Matita's Russell facility to provide a strong specification for the function in the type (c.f. the use of $\Sigma$-types and coercions, through which Russell is simulated in Matita).
385We express that for all labels that appear exactly once in any assembly program, the newly created map used in the implementation, and the stronger \texttt{sigma} function used in the specification, agree.
387Using \texttt{build\_maps}, we can express the following lemma, expressing the correctness of the assembly function:
389lemma assembly_ok: $\forall$p,pol,assembled.
390  let $\langle$labels, costs$\rangle$ := build_maps p pol in
391  $\langle$assembled,costs$\rangle$ = assembly p pol $\rightarrow$
392  let cmem := load_code_memory assembled in
393  let preamble := $\pi_1$ p in
394  let dlbls := construct_datalabels preamble in
395  let addr := address_of_word_labels_code_mem ($\pi_2$ p) in
396  let lk_lbls := λx. sigma p pol (addr x) in
397  let lk_dlbls := λx. lookup $\ldots$ x datalabels (zero ?) in
398  $\forall$ppc, pi, newppc.
399  $\forall$prf: $\langle$pi, newppc$\rangle$ = fetch_pseudo_instruction ($\pi_2$ p) ppc.
400  $\forall$len, assm.
401  let spol := sigma program pol ppc in
402  let spol_len := spol + len in
403  let echeck := encoding_check cmem spol spol_len assm in
404  let a1pi := assembly_1_pseudoinstruction in
405  $\langle$len, assm$\rangle$ = a1pi p pol ppc lk_lbls lk_dlbls pi (refl $\ldots$) (refl $\ldots$) ? $\rightarrow$
406    echeck $\wedge$ sigma p pol newppc = spol_len.
408Suppose also we assemble our program \texttt{p} in accordance with a policy \texttt{pol} to obtain \texttt{assembled}.
409Here, we perform a `sanity check' to ensure that the two cost label maps generated are identical, before loading the assembled program into code memory \texttt{cmem}.
410Then, for every pseudoinstruction \texttt{pi}, pseudo program counter \texttt{ppc} and new pseudo program counter \texttt{newppc}, such that we obtain \texttt{pi} and \texttt{newppc} from fetching a pseudoinstruction at \texttt{ppc}, we check that assembling this pseudoinstruction produces the correct number of machine code instructions, and that the new pseudo program counter \texttt{ppc} has the value expected of it.
412Theorem \texttt{fetch\_assembly} establishes that the \texttt{fetch} and \texttt{assembly1} functions interact correctly.
413The \texttt{fetch} function, as its name implies, fetches the instruction indexed by the program counter in the code memory, while \texttt{assembly1} maps a single instruction to its byte encoding:
415theorem fetch_assembly: $\forall$pc, i, cmem, assembled.  assembled=assembly1 i $\rightarrow$
416  let len := length $\ldots$ assembled in
417  encoding_check cmem pc (pc + len) assembled $\rightarrow$
418    let fetched := fetch code_memory (bitvector_of_nat $\ldots$ pc) in
419    let $\langle$instr_pc, ticks$\rangle$ := fetched in
420    let $\langle$instr, pc'$\rangle$ := instr_pc in
421      (eq_instruction instr i $\wedge$ eqb ticks (ticks_of_instruction instr) $\wedge$
422       eq_bv $\ldots$ pc' (pc + len)) = true.
424In particular, we read \texttt{fetch\_assembly} as follows.
425Given an instruction, \texttt{i}, we first assemble the instruction to obtain \texttt{assembled}, checking that the assembled instruction was stored in code memory correctly.
426Fetching from code memory, we obtain \texttt{fetched}, a tuple consisting of the instruction, new program counter, and the number of ticks this instruction will take to execute.
427Deconstructing these tuples, we finally check that the fetched instruction is the same instruction that we began with, and the number of ticks this instruction will take to execute is the same as the result returned by a lookup function, \texttt{ticks\_of\_instruction}, devoted to tracking this information.
428Or, in plainer words, assembling and then immediately fetching again gets you back to where you started.
430Lemma \texttt{fetch\_assembly\_pseudo} (slightly simplified, here) is obtained by composition of \texttt{expand\_pseudo\_instruction} and \texttt{assembly\_1\_pseudoinstruction}:
432lemma fetch_assembly_pseudo:
433 ∀program.∀pol:policy program.∀ppc.∀code_memory.
434  let pi := $\pi_1$ (fetch_pseudo_instruction ($\pi_2$ program) ppc) in
435  let instructions := expand_pseudo_instruction program pol ppc ... in
436  let $\langle$len,assembled$\rangle$ := assembly_1_pseudoinstruction program pol ppc ... in
437  encoding_check code_memory pc (pc + len) assembled →
438  fetch_many code_memory (pc + len) pc instructions.
440Here, \texttt{len} is the number of machine code instructions the pseudoinstruction at hand has been expanded into, and \texttt{encoding\_check} is a recursive function that checks that assembled machine code is correctly stored in code memory.
441We assemble a single pseudoinstruction with \texttt{assembly\_1\_pseudoinstruction}, which internally calls \texttt{jump\_expansion} and \texttt{expand\_pseudo\_instruction}.
442The function \texttt{fetch\_many} fetches multiple machine code instructions from code memory and performs some routine checks.
444Intuitively, Lemma \texttt{fetch\_assembly\_pseudo} can be read as follows.
445Suppose we expand the pseudoinstruction at \texttt{ppc} with the policy decision \texttt{pol}, obtaining the list of machine code instructions \texttt{instructions}.
446Suppose we also assemble the pseudoinstruction at \texttt{ppc} to obtain \texttt{assembled}, a list of bytes.
447Then, we check with \texttt{fetch\_many} that the number of machine instructions that were fetched matches the number of instruction that \texttt{expand\_pseudo\_instruction} expanded.
449The final lemma in this series is \texttt{fetch\_assembly\_pseudo2} that combines the Lemma \texttt{fetch\_aasembly\_pseudo} with the correctness of the functions that load object code into the processor's memory.
451lemma fetch_assembly_pseudo2:
452 ∀program,pol,ppc.
453  let $\langle$labels,costs$\rangle$ := build_maps program pol in
454  let assembled := $\pi_1$ (assembly program pol) in
455  let code_memory := load_code_memory assembled in
456  let data_labels := construct_datalabels ($\pi_1$ program) in
457  let lookup_labels :=
458    λx. sigma $\ldots$ pol (address_of_word_labels_code_mem ($\pi_2$ program) x) in
459  let lookup_datalabels := λx. lookup ? ? x data_labels (zero ?) in
460  let $\langle$pi,newppc$\rangle$ := fetch_pseudo_instruction ($\pi_2$ program) ppc in
461  let instrs ≝ expand_pseudo_instruction program pol ppc ... in
462   fetch_many code_memory (sigma $\ldots$ pol newppc) (sigma $\ldots$ pol ppc) instrs.
465We read \texttt{fetch\_assembly\_pseudo2} as follows.
466Suppose we are able to successfully assemble an assembly program using \texttt{assembly} and produce a code memory, \texttt{code\_memory}.
467Then, fetching a pseudoinstruction from the pseudo code memory at address \texttt{ppc} corresponds to fetching a sequence of instructions from the real code memory at address \texttt{sigma program pol ppc}.
468The fetched sequence corresponds to the expansion, according to \texttt{pol}, of the pseudoinstruction.
470At first, the lemmas appears to immediately imply the correctness of the assembler.
471However, this property is \emph{not} strong enough to establish that the semantics of an assembly program has been preserved by the assembly process since it does not establish the correspondence between the semantics of a pseudo-instruction and that of its expansion.
472In particular, the two semantics differ on instructions that \emph{could} directly manipulate program addresses.
474% ---------------------------------------------------------------------------- %
475% SECTION                                                                      %
476% ---------------------------------------------------------------------------- %
477\subsection{Total correctness for `well behaved' assembly programs}
480In any `reasonable' assembly language addresses in code memory are just data that can be manipulated in multiple ways by the program.
481An assembly program can forge, compare and move addresses around, shift existing addresses or apply logical and arithmetical operations to them.
482Further, every optimising assembler is allowed to modify code memory.
483Hence only the semantics of a few of the aforementioned operations are preserved by an optimising assembler/compiler.
484Moreover, this characterisation of well behaved programs is clearly undecidable.
486To obtain a reasonable statement of correctness for our assembler, we need to trace memory locations (and, potentially, registers) that contain memory addresses.
487This is necessary for two purposes.
489First we must detect (at run time) programs that manipulate addresses in well behaved ways, according to some approximation of well-behavedness.
490Second, we must compute statuses that correspond to pseudo-statuses.
491The contents of the program counter must be translated, as well as the contents of all traced locations, by applying the \texttt{sigma} map.
492Remaining memory cells are copied \emph{verbatim}.
494For instance, after a function call, the two bytes that form the return pseudo address are pushed on top of the stack, i.e. in internal RAM.
495This pseudo internal RAM corresponds to an internal RAM where the stack holds the real addresses after optimisation, and all the other values remain untouched.
497We use an \texttt{internal\_pseudo\_address\_map} to trace addresses of code memory addresses in internal RAM.
498The current code is parametric on the implementation of the map itself.
500axiom internal_pseudo_address_map: Type[0].
503The \texttt{low\_internal\_ram\_of\_pseudo\_low\_internal\_ram} function converts the lower internal RAM of a \texttt{PseudoStatus} into the lower internal RAM of a \texttt{Status}.
504A similar function exists for higher internal RAM.
505Note that both RAM segments are indexed using addresses 7-bits long.
506The function is currently axiomatised, and an associated set of axioms prescribe the behaviour of the function:
508axiom low_internal_ram_of_pseudo_low_internal_ram:
509 internal_pseudo_address_map$\rightarrow$BitVectorTrie Byte 7$\rightarrow$BitVectorTrie Byte 7.
512Next, we are able to translate \texttt{PseudoStatus} records into \texttt{Status} records using \texttt{status\_of\_pseudo\_status}.
513Translating a \texttt{PseudoStatus}'s code memory requires we expand pseudoinstructions and then assemble to obtain a trie of bytes.
514This never fails, providing that our policy is correct:
516definition status_of_pseudo_status: internal_pseudo_address_map $\rightarrow$
517  $\forall$ps:PseudoStatus. policy (code_memory $\ldots$ ps) $\rightarrow$ Status
520The \texttt{next\_internal\_pseudo\_address\_map} function is responsible for run time monitoring of the behaviour of assembly programs, in order to detect well behaved ones.
521It returns a map that traces memory addresses in internal RAM after execution of the next pseudoinstruction, failing when the instruction tampers with memory addresses in unanticipated (but potentially correct) ways.
522It thus decides the membership of a strict subset of the set of well behaved programs.
524definition next_internal_pseudo_address_map: internal_pseudo_address_map
525  $\rightarrow$ PseudoStatus $\rightarrow$ option internal_pseudo_address_map
528The function \texttt{ticks\_of} computes how long---in clock cycles---a pseudoinstruction will take to execute when expanded in accordance with a given policy.
529The function returns a pair of natural numbers, needed for recording the execution times of each branch of a conditional jump.
531definition ticks_of:
532  $\forall$p:pseudo_assembly_program. policy p $\rightarrow$ Word $\rightarrow$ nat $\times$ nat := $\ldots$
535Finally, we are able to state and prove our main theorem.
536This relates the execution of a single assembly instruction and the execution of (possibly) many machine code instructions, as long .
537That is, the assembly process preserves the semantics of an assembly program, as it is translated into machine code, as long as we are able to track memory addresses properly:
539theorem main_thm:
540 ∀M,M':internal_pseudo_address_map.∀ps.∀pol: policy ps.
541  next_internal_pseudo_address_map M ps = Some $\ldots$ M' →
542   ∃n.
543      execute n (status_of_pseudo_status M ps pol)
544    = status_of_pseudo_status M'
545       (execute_1_pseudo_instruction (ticks_of (code_memory $\ldots$ ps) pol) ps)
546       [pol].
548The statement is standard for forward simulation, but restricted to \texttt{PseudoStatuses} \texttt{ps} whose next instruction to be executed is well-behaved with respect to the \texttt{internal\_pseudo\_address\_map} \texttt{M}.
549Theorem \texttt{main\_thm} establishes the total correctness of the assembly process and can simply be lifted to the forward simulation of an arbitrary number of well behaved steps on the assembly program.
551% ---------------------------------------------------------------------------- %
552% SECTION                                                                      %
553% ---------------------------------------------------------------------------- %
557We have proved the total correctness of an assembler for MCS-51 assembly language.
558In particular, our assembly language featured labels, arbitrary conditional and unconditional jumps to labels, global data and instructions for moving this data into the MCS-51's single 16-bit register.
559Expanding these pseudoinstructions into machine code instructions is not trivial, and the proof that the assembly process is `correct', in that the semantics of a subset of assembly programs are not changed is complex.
560Further, we have observed the `shocking' fact that any optimising assembler cannot preserve the semantics of all assembly programs.
562The formalisation is a key component of the CerCo project, which aims to produce a verified concrete complexity preserving compiler for a large subset of the C programming language.
563The verified assembler, complete with the underlying formalisation of the semantics of MCS-51 machine code (described fully in~\cite{mulligan:executable:2011}), will form the bedrock layer upon which the rest of the CerCo project will build its verified compiler platform.
564However, further work is needed.
565In particular, as it stands, the code produced by the prototype CerCo C compiler does not fall into the `semantics preserving' subset of assembly programs for our assembler.
566This is because the MCS-51 features a small stack space, and a larger stack is customarily manually emulated in external RAM.
567As a result, the majority of programs feature slices of memory addresses and program counters being moved in-and-out of external RAM via the registers, simulating the stack mechanism.
568At the moment, this movement is not tracked by \texttt{internal\_pseudo\_address\_map}, which only tracks the movement of memory addresses in low internal RAM.
569We leave extending this tracking of memory addresses throughout the whole of the MCS-51's address spaces as future work.
571It is interesting to compare our work to an `industrial grade' assembler for the MCS-51: SDCC~\cite{sdcc:2011}.
572SDCC is the only open source C compiler that targets the MCS-51 instruction set.
573It appears that all pseudojumps in SDCC assembly are expanded to \texttt{LJMP} instructions, the worst possible jump expansion policy from an efficiency point of view.
574Note that this policy is the only possible policy \emph{in theory} that can preserve the semantics of an assembly program during the assembly process.
575However, this comes at the expense of assembler completeness: the generated program may be too large to fit into code memory.
576In this respect, there is a trade-off between the completeness of the assembler and the efficiency of the assembled program.
577The definition and proof of a complete, optimal (in the sense that jump pseudoinstructions are expanded to the smallest possible opcode) and correct jump expansion policy is ongoing work.
579Aside from their application in verified compiler projects such as CerCo and CompCert, verified assemblers such as ours could also be applied to the verification of operating system kernels.
580Of particular note is the verified seL4 kernel~\cite{klein:sel4:2009,klein:sel4:2010}.
581This verification explicitly assumes the existence of, amongst other things, a trustworthy assembler and compiler.
583Note that both CompCert and the seL4 formalisation assume the existence of `trustworthy' assemblers.
584Our observation that an optimising assembler cannot preserve the semantics of every assembly program may have important consequences for these projects.
585If CompCert chooses to assume the existence of an optimising assembler, then care should be made to ensure that any assembly program produced by the CompCert compiler falls into the subset of programs that have a hope of having their semantics preserved by an optimising assembler.
587In certain places in our formalisation (e.g. in proving \texttt{build\_maps} is correct) we made use of Matita's implementation of Russell~\cite{sozeau:subset:2006}.
588In Matita, Russell may be implemented using two coercions and some notational sugaring.
589% more
591\subsection{Related work}
594% piton
595We are not the first to consider the total correctness of an assembler for a non-trivial assembly language.
596Perhaps the most impressive piece of work in this domain is the Piton stack~\cite{moore:piton:1996,moore:grand:2005}.
597This was a stack of verified components, written and verified in ACL2, ranging from a proprietary FM9001 microprocessor verified at the gate level, to assemblers and compilers for two high-level languages---a dialect of Lisp and $\mu$Gypsy~\cite{moore:grand:2005}.
599% jinja
600Klein and Nipkow consider a Java-like programming language, Jinja~\cite{klein:machine:2006,klein:machine:2010}.
601They provide a compiler, virtual machine and operational semantics for the programming language and virtual machine, and prove that their compiler is semantics and type preserving.
603We believe some other verified assemblers exist in the literature.
604However, what sets our work apart from that above is our attempt to optimise the machine code generated by our assembler.
605This complicates any formalisation effort, as the best possible selection of machine instructions must be made, especially important on a device such as the MCS-51 with a miniscule code memory.
606Further, care must be taken to ensure that the time properties of an assembly program are not modified by the assembly process lest we affect the semantics of any program employing the MCS-51's I/O facilities.
607This is only possible by inducing a cost model on the source code from the optimisation strategy and input program.
608This will be a \emph{leit motif} of CerCo.
610Finally, mention of CerCo will invariably invite comparisons with CompCert~\cite{compcert:2011,leroy:formal:2009}, another verified compiler project related to CerCo.
611As previously mentioned, CompCert considers only extensional correctness of the compiler, and not intensional correctness, which CerCo focusses on.
612However, CerCo also extends CompCert in other ways.
613Namely, the CompCert verified compilation chain terminates at the assembly level, and takes for granted the existence of a trustworthy assembler.
614CerCo chooses to go further, by considering a verified compilation chain all the way down to the machine code level.
615The work presented in this publication is one part of CerCo's extension over CompCert.
620All files relating to our formalisation effort can be found online at~\url{}.
621Our development, including the definition of the executable semantics of the MCS-51, is spread across 17 files, totalling around 13,000 lines of Matita source.
622The bulk of the proof described herein is contained in a single file, \texttt{}, consisting of approximately 3000 lines of Matita source.
624We admit to using a number of axioms in our development.
625We do not believe the use of these axioms has been particularly onerous---very few concern anything more interesting than, say, stating that converting from a natural number to a bitvector and back again is the identity---and what axioms remain are rapidly being closed as work continues.
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