source: src/ASM/CPP2011/cpp-2011.tex @ 1021

Last change on this file since 1021 was 1021, checked in by mulligan, 9 years ago

tidied english in sect 3

File size: 53.3 KB
Line 
1\documentclass{llncs}
2
3\usepackage{amsfonts}
4\usepackage{amsmath}
5\usepackage{amssymb} 
6\usepackage[english]{babel}
7\usepackage{color}
8\usepackage{fancybox}
9\usepackage{graphicx}
10\usepackage[colorlinks]{hyperref}
11\usepackage{hyphenat}
12\usepackage[utf8x]{inputenc}
13\usepackage{listings}
14\usepackage{mdwlist}
15\usepackage{microtype}
16\usepackage{stmaryrd}
17\usepackage{url}
18
19\renewcommand{\verb}{\lstinline}
20\def\lstlanguagefiles{lst-grafite.tex}
21\lstset{language=Grafite}
22
23\newlength{\mylength}
24\newenvironment{frametxt}%
25        {\setlength{\fboxsep}{5pt}
26                \setlength{\mylength}{\linewidth}%
27                \addtolength{\mylength}{-2\fboxsep}%
28                \addtolength{\mylength}{-2\fboxrule}%
29                \Sbox
30                \minipage{\mylength}%
31                        \setlength{\abovedisplayskip}{0pt}%
32                        \setlength{\belowdisplayskip}{0pt}%
33                }%
34                {\endminipage\endSbox
35                        \[\fbox{\TheSbox}\]}
36
37\title{On the correctness of an assembler for the Intel MCS-51 microprocessor\thanks{The project CerCo acknowledges the financial support of the Future and Emerging Technologies (FET) programme within the Seventh Framework Programme for Research of the European Commission, under FET-Open grant number: 243881}}
38\author{Dominic P. Mulligan \and Claudio Sacerdoti Coen}
39\institute{Dipartimento di Scienze dell'Informazione, Universit\'a di Bologna}
40
41\bibliographystyle{splncs03}
42
43\begin{document}
44
45\maketitle
46
47\begin{abstract}
48We consider the formalisation of an assembler for Intel MCS-51 assembly language in the Matita proof assistant.
49This formalisation forms a major component of the EU-funded CerCo project, concering the construction and formalisation of a concrete complexity preserving compiler for a large subset of the C programming language.
50
51The efficient expansion of pseudoinstructions---particularly jumps---into MCS-51 machine instructions is complex.
52We employ a strategy, involving the use of `policies', that separates the decision making over how jumps should be expanded from the expansion process itself.
53This makes the proof of correctness for the assembler significantly more straightforward.
54
55We prove, under the assumption of the existence of a correct policy, that the assembly process never fails and preserves the semantics of a subset of assembly programs.
56Correct policies fail to exist only in a limited number of pathological circumstances.
57Our assembler is complete with respect to the choice of policy.
58
59Surprisingly, we observe that it is impossible for an optimising assembler to preserve the semantics of every assembly program.
60\end{abstract}
61
62% ---------------------------------------------------------------------------- %
63% SECTION                                                                      %
64% ---------------------------------------------------------------------------- %
65\section{Introduction}
66\label{sect.introduction}
67
68We consider the formalisation of an assembler for the Intel MCS-51 8-bit microprocessor in the Matita proof assistant~\cite{asperti:user:2007}.
69This formalisation forms a major component of the EU-funded CerCo project~\cite{cerco:2011}, concering the construction and formalisation of a concrete complexity preserving compiler for a large subset of the C programming language.
70
71The MCS-51 dates from the early 1980s and is commonly called the 8051/8052.\footnote{Being strict, the 8051 and 8052 are two different microprocessors, though the features that the 8052 added over the 8051 are minor, and largely irrelevant for our formalisation project.}
72Despite the microprocessor's age, derivatives are still widely manufactured by a number of semiconductor foundries.
73As a result the processor is widely used, especially in embedded systems development, where well-tested, cheap, predictable microprocessors find their niche.
74
75The MCS-51 has a relative paucity of features compared to its more modern brethren.
76In particular, the MCS-51 does not possess a cache or any instruction pipelining that would make predicting the concrete cost of executing a single instruction an involved process.
77Instead, each semiconductor foundry that produces an MCS-51 derivative is able to provide accurate timing information in clock cycles for each instruction in their derivative's instruction set.
78It is important to stress that this timing information, unlike in more sophisticated processors, is not an estimate, it is a `definition'.
79For the MCS-51, if a manufacturer states that a particular opcode takes three clock cycles to execute, then that opcode \emph{always} takes three clock cycles to execute.
80
81This predicability of timing information is especially attractive to the CerCo consortium.
82We are in the process of constructing a certified, concrete complexity compiler for a realistic processor, and not for building and formalising the worst case execution time tools (WCET---see~\cite{yan:wcet:2008} and~\cite{bate:wcet:2011}, amongst many others, for an application of WCET technology to microprocessors with more complex designs) that would be necessary to achieve the same result with, for example, a modern ARM or PowerPC microprocessor.
83
84As in most things, what one hand giveth, the other taketh away: the MCS-51's paucity of features, though an advantage in many respects, also quickly become a hindrance, and successfully compiling high-level code for this architecture is a cumbrous and involved process.
85In particular, the MCS-51 features a relatively miniscule series of memory spaces (including read-only code memory, stack and internal/external random access memory) by modern standards.
86As a result our C compiler, to have any sort of hope of successfully compiling realistic programs for embedded devices, ought to produce `tight' machine code.
87This is not simple and requires the use of optimisations.
88
89For example, the MCS-51 features three unconditional jump instructions: \texttt{LJMP} and \texttt{SJMP}---`long jump' and `short jump' respectively---and an 11-bit oddity of the MCS-51, \texttt{AJMP}.
90Each of these three instructions expects arguments in different sizes and behaves in markedly different ways: \texttt{SJMP} may only perform a `local jump'; \texttt{LJMP} may jump to any address in the MCS-51's memory space and \texttt{AJMP} may jump to any address in the current memory page.
91Consequently, the size of each opcode is different, and to squeeze as much code as possible into the MCS-51's limited code memory, the smallest possible opcode that will suffice should be selected.
92
93The prototype CerCo C compiler does not attempt to select the smallest jump opcode in this manner, as this was thought to unneccessarily complicate the compilation chain, making the eventual translation and formalisation of the compiler into Matita much harder.
94Instead, the compiler targets a bespoke assembly language, similar to `real world' assembly languages, complete with pseudoinstructions including \texttt{Jmp} and \texttt{Call} instructions.
95Labels, conditional jumps to labels, a program preamble containing global data and a \texttt{MOV} instruction for moving this global data into the MCS-51's one 16-bit register also feature.
96This latter feature will ease any later consideration of separate compilation in the CerCo compiler.
97An assembler is used to expand pseudoinstructions into MCS-51 machine code.
98
99However, this assembly process is not trivial, for numerous reasons.
100For example, our conditional jumps to labels behave differently from their machine code counterparts.
101At the machine code level, all conditional jumps are `short', limiting their range.
102However, at the assembly level, conditional jumps may jump to a label that appears anywhere in the program, significantly liberalising the use of conditional jumps and further simplifying the design of the CerCo compiler.
103
104Further, trying to na\"ively relate assembly programs with their machine code counterparts simply does not work.
105Machine code programs that fetch from constant addresses in code memory or programs that combine the program counter with constant shifts do not make sense at the assembly level, since the position of instructions in code memory will be known only after assembly and optimisation.
106More generally, memory addresses can only be compared with other memory addresses.
107However, checking that memory addresses are only compared against each other at the assembly level is in fact undecidable.
108In short, we come to the shocking\footnote{For us, anyway.} realisation that, with optimisations, the full preservation of the semantics of all assembly programs is impossible.
109We believe that this revelation is significant for large formalisation projects that assume the existence of a correct assembler.
110Projects in this class include both the recent CompCert~\cite{compcert:2011,leroy:formal:2009} and seL4 formalisations~\cite{klein:sel4:2009,klein:sel4:2010}.
111
112Yet, the situation is even more complex than having to expand pseudoinstructions correctly.
113In particular, when formalising the assembler, we must make sure that the assembly process does not change the timing characteristics of an assembly program for two reasons.
114
115First, the semantics of some functions of the MCS-51, notably I/O, depend on the microprocessor's clock.
116Changing how long a particular program takes to execute can affect the semantics of a program.
117This is undesirable.
118
119Second, as mentioned, the CerCo consortium is in the business of constructing a verified compiler for the C programming language.
120However, unlike CompCert~\cite{compcert:2011,leroy:formal:2009,leroy:formally:2009}---which currently represents the state of the art for `industrial grade' verified compilers---CerCo considers not just the \emph{extensional correctness} of the compiler, but also its \emph{intensional correctness}.
121That is, CompCert focusses solely on the preservation of the \emph{meaning} of a program during the compilation process, guaranteeing that the program's meaning does not change as it is gradually transformed into assembly code.
122However in any realistic compiler (even the CompCert compiler!) there is no guarantee that the program's time properties are preserved during the compilation process; a compiler's `optimisations' could, in theory, even conspire to degrade the concrete complexity of certain classes of programs.
123CerCo aims to expand the current state of the art by producing a compiler where this temporal degradation is guaranteed not to happen.
124Moreover, CerCo's approach lifts a program's timing information to the source (C language) level.
125This has the advantage of allowing a programmer to reason about a program's intensional properties directly on the source code that they write, not on the code that the compiler produces.
126
127In order to achieve this, CerCo imposes a cost model on programs or, more specifically, on simple blocks of instructions.
128This cost model is induced by the compilation process itself, and its non-compositional nature allows us to assign different costs to identical blocks of instructions depending on how they are compiled.
129In short, we aim to obtain a very precise costing for a program by embracing the compilation process, not ignoring it.
130This, however, complicates the proof of correctness for the compiler proper: for every translation pass from intermediate language to intermediate language, we must prove that not only has the meaning of a program been preserved, but also its concrete complexity characteristics.
131This also applies for the translation from assembly language to machine code.
132
133Naturally, this raises a question: how do we assign an \emph{accurate} cost to a pseudoinstruction?
134As mentioned, conditional jumps at the assembly level can jump to a label appearing anywhere in the program.
135However, at the machine code level, conditional jumps are limited to jumping `locally', using a measly byte offset.
136To translate a jump to a label, a single conditional jump pseudoinstruction may be translated into a block of three real instructions as follows (here, \texttt{JZ} is `jump if accumulator is zero'):
137\begin{displaymath}
138\begin{array}{r@{\quad}l@{\;\;}l@{\qquad}c@{\qquad}l@{\;\;}l}
139       & \mathtt{JZ}  & \mathtt{label}                      &                 & \mathtt{JZ}   & \text{size of \texttt{SJMP} instruction} \\
140       & \ldots       &                            & \text{translates to}   & \mathtt{SJMP} & \text{size of \texttt{LJMP} instruction} \\
141\mathtt{label:} & \mathtt{MOV} & \mathtt{A}\;\;\mathtt{B}   & \Longrightarrow & \mathtt{LJMP} & \text{address of \textit{label}} \\
142       &              &                            &                 & \ldots        & \\
143       &              &                            &                 & \mathtt{MOV}  & \mathtt{A}\;\;\mathtt{B}
144\end{array}
145\end{displaymath}
146In the translation, if \texttt{JZ} fails, we fall through to the \texttt{SJMP} which jumps over the \texttt{LJMP}.
147Naturally, if \texttt{label} is close enough, a conditional jump pseudoinstruction is mapped directly to a conditional jump machine instruction; the above translation only applies if \texttt{label} is not sufficiently local.
148This leaves the problem, addressed below, of calculating whether a label is indeed `close enough' for the simpler translation to be used.
149
150Crucially, the above translation demonstrates the difficulty in predicting how many clock cycles a pseudoinstruction will take to execute.
151A conditional jump may be mapped to a single machine instruction or a block of three.
152Perhaps more insidious is the realisation that the number of cycles needed to execute the instructions in the two branches of a translated conditional jump may be different.
153Depending on the particular MCS-51 derivative at hand, an \texttt{SJMP} could in theory take a different number of clock cycles to execute than an \texttt{LJMP}.
154These issues must also be dealt with in order to prove that the translation pass preserves the concrete complexity of assembly code, and that the semantics of a program using the MCS-51's I/O facilities does not change.
155We address this problem by parameterizing the semantics over a cost model.
156We prove the preservation of concrete complexity only for the program-dependent cost model induced by the optimisation.
157
158Yet one more question remains: how do we decide whether to expand a jump into an \texttt{SJMP} or an \texttt{LJMP}?
159To understand, again, why this problem is not trivial, consider the following snippet of assembly code:
160\begin{displaymath}
161\begin{array}{r@{\qquad}r@{\quad}l@{\;\;}l@{\qquad}l}
162\text{1:} & \mathtt{(0x000)}  & \texttt{LJMP} & \texttt{0x100}  & \text{\texttt{;; Jump forward 256.}} \\
163\text{2:} & \mathtt{...}    & \mathtt{...}  &                 &                                               \\
164\text{3:} & \mathtt{(0x0FA)}  & \texttt{LJMP} & \texttt{0x100}  & \text{\texttt{;; Jump forward 256.}} \\
165\text{4:} & \mathtt{...}    & \mathtt{...}  &                 &                                               \\
166\text{5:} & \mathtt{(0x100)}  & \texttt{LJMP} & \texttt{-0x100}  & \text{\texttt{;; Jump backward 256.}} \\
167\end{array}
168\end{displaymath}
169We observe that $100_{16} = 256_{10}$, and lies \emph{just} outside the range expressible in an 8-bit byte (0--255).
170
171As our example shows, given an occurence $l$ of an \texttt{LJMP} instruction, it may be possible to shrink $l$ to an occurence of an \texttt{SJMP}---consuming fewer bytes of code memory---provided we can shrink any \texttt{LJMP}s that exist between $l$ and its target location.
172In particular, if we wish to shrink the \texttt{LJMP} occurring at line 1, then we must shrink the \texttt{LJMP} occurring at line 3.
173However, to shrink the \texttt{LJMP} occurring at line 3 we must also shrink the \texttt{LJMP} occurring at line 5, and \emph{vice versa}.
174
175Further, consider what happens if, instead of appearing at memory address \texttt{0x100}, the instruction at line 5 instead appeared \emph{just} beyond the size of code memory, and all other memory addresses were shifted accordingly.
176Now, in order to be able to successfully fit our program into the MCS-51's limited code memory, we are \emph{obliged} to shrink the \texttt{LJMP} occurring at line 5.
177That is, the shrinking process is not just related to the optimisation of generated machine code but also the completeness of the assembler itself.
178
179How we went about resolving this problem affected the shape of our proof of correctness for the whole assembler in a rather profound way.
180We first attempted to synthesize a solution bottom up: starting with no solution, we gradually refine a solution using the same functions that implement the jump expansion process.
181Using this technique, solutions can fail to exist, and the proof of correctness for the assembler quickly descends into a diabolical quagmire.
182
183Abandoning this attempt, we instead split the `policy'---the decision over how any particular jump should be expanded---from the implementation that actually expands assembly programs into machine code.
184Assuming the existence of a correct policy, we proved the implementation of the assembler correct.
185Further, we proved that the assembler fails to assemble an assembly program if and only if a correct policy does not exist.
186This is achieved by means of dependent types: the assembly function is total over a program, a policy and the proof that the policy is correct for that program.
187
188Policies do not exist in only a limited number of circumstances: namely, if a pseudoinstruction attempts to jump to a label that does not exist, or the program is too large to fit in code memory, even after shrinking jumps according to the best policy.
189The first circumstance is an example of a serious compiler error, as an ill-formed assembly program was generated, and does not (and should not) count as a mark against the completeness of the assembler.
190We plan to employ dependent types in CerCo in order to restrict the domain of the compiler to those programs that are `semantically correct' and should be compiled.
191In particular, in CerCo we are also interested in the completeness of the compilation process, whereas previous formalisations only focused on correctness.
192
193The rest of this paper is a detailed description of our proof that is partly
194still in progress.
195
196% ---------------------------------------------------------------------------- %
197% SECTION                                                                      %
198% ---------------------------------------------------------------------------- %
199\subsection{Overview of the paper}
200\label{subsect.overview.of.the.paper}
201In Section~\ref{sect.matita} we provide a brief overview of the Matita proof assistant for the unfamiliar reader.
202In Section~\ref{sect.the.proof} we discuss the design and implementation of the proof proper.
203In Section~\ref{sect.conclusions} we conclude.
204
205% ---------------------------------------------------------------------------- %
206% SECTION                                                                      %
207% ---------------------------------------------------------------------------- %
208\section{Matita}
209\label{sect.matita}
210
211Matita is a proof assistant based on a variant of the Calculus of (Co)inductive Constructions~\cite{asperti:user:2007}. In particular, it features dependent
212types that we heavily exploit in the formalization. The syntax of the
213statements and definitions in the paper should be self-explanatory, at least
214to those exposed to dependent type theory. We only remark the use of
215of `$\mathtt{?}$' or `$\mathtt{\ldots}$' for omitting single terms or
216sequences of terms to be inferred automatically by the system, respectively.
217Those that are not inferred are left to the user as proof obligations.
218Pairs are denoted with angular brackets.
219
220Matita features a liberal system of coercions. In particular, it is possible
221to define a uniform coercion $\lambda x.\langle x,?\rangle$ from every type $T$ to the dependent product $\Sigma x:T.P~x$. The coercion opens a proof
222obligation that asks the user to prove that $P$ holds for $x$. When a coercion
223must be applied to a complex term (a lambda-abstraction, a local definition,
224a case analysis), the system automatically propagates the coercion to the
225sub-terms. For instance, to apply a coercion to force $\lambda x.M : A \to B$
226to have type $\forall x:A.\Sigma y:B.P~x~y$, the system looks for a coercion from
227$M: B$ to $\Sigma y:B.P~x~y$ in a context augmented with $x:A$. This is
228significant when the coercion opens a proof obligation, since the user
229will be presented with multiple, but simpler proof obligations in the right
230context. Matita supports in this way the proof methodology developed by
231Sozeau in~\cite{russell}, but with an implementation that is lighter than the
232one of Coq and more integrated in the system.
233
234% ---------------------------------------------------------------------------- %
235% SECTION                                                                      %
236% ---------------------------------------------------------------------------- %
237\section{The proof}
238\label{sect.the.proof}
239
240\subsection{The assembler and semantics of machine code}
241\label{subsect.the.assembler.and.semantics.of.machine.code}
242
243The formalisation in Matita of the semantics of MCS-51 machine code is described in~\cite{mulligan:executable:2011}.
244We merely describe enough here to understand the rest of the proof.
245
246The MCS-51 emulator centres around a \texttt{Status} record, describing the current state of the microprocessor.
247This record contains fields corresponding to the microprocessor's program counter, special function registers, and so on.
248At the machine code level, code memory is implemented as a compact trie of bytes, addressed by the program counter.
249Machine code programs are loaded into \texttt{Status} using the \texttt{load\_code\_memory} function.
250
251We may execute a single step of a machine code program using the \texttt{execute\_1} function, which returns an updated \texttt{Status}:
252\begin{lstlisting}
253definition execute_1: Status $\rightarrow$ Status := $\ldots$
254\end{lstlisting}
255The function \texttt{execute} allows one to execute an arbitrary, but fixed (due to Matita's normalisation requirement) number of steps of a program.
256
257Naturally, assembly programs have analogues.
258The counterpart of the \texttt{Status} record is \texttt{PseudoStatus}.
259Instead of code memory being implemented as tries of bytes, code memory is here implemented as lists of pseudoinstructions, and program counters are merely indices into this list.
260Both \texttt{Status} and \texttt{PseudoStatus} are specialisations of the same \texttt{PreStatus} record, parametric in the representation of code memory.
261This allows us to share some code that is common to both records (for instance, `setter' and `getter' functions).
262
263Our analogue of \texttt{execute\_1} is \texttt{execute\_1\_pseudo\_instruction}:
264\begin{lstlisting}
265definition execute_1_pseudo_instruction: (Word $\rightarrow$ nat $\times$ nat) $\rightarrow$
266                                         PseudoStatus $\rightarrow$ PseudoStatus := $\ldots$
267\end{lstlisting}
268Notice, here, that the emulation function for assembly programs takes an additional argument.
269This is a function that maps program counters (at the assembly level) to pairs of natural numbers representing the number of clock ticks that the pseudoinstruction needs to execute, post expansion.
270We call this function a \emph{costing}, and note that the costing is induced by the particular strategy we use to expand pseudoinstructions.
271If we change how we expand conditional jumps to labels, for instance, then the costing needs to change, hence \texttt{execute\_1\_pseudo\_instruction}'s parametricity in the costing.
272
273The costing returns \emph{pairs} of natural numbers because, in the case of expanding conditional jumps to labels, the expansion of the `true branch' and `false branch' may differ in the number of clock ticks needed for execution.
274This timing information is used inside \texttt{execute\_1\_pseudo\_instruction} to update the clock of the \texttt{PseudoStatus}.
275During the proof of correctness of the assembler we relate the clocks of \texttt{Status}es and \texttt{PseudoStatus}es for the policy induced by the cost model and optimisations.
276
277The assembler, mapping programs consisting of lists of pseudoinstructions to lists of bytes, operates in a mostly straightforward manner.
278To a degree of approximation, the assembler on an assembly program, consisting of $n$ pseudoinstructions $\mathtt{P_i}$ for $1 \leq i \leq n$, works as in the following diagram (we use $-^{*}$ to denote a combined map and flatten operation):
279\begin{displaymath}
280[\mathtt{P_1}, \ldots \mathtt{P_n}] \xrightarrow{\left(\mathtt{P_i} \xrightarrow{\mbox{\fontsize{7}{9}\selectfont$\mathtt{expand\_pseudo\_instruction}$}} \mathtt{[I_1^i, \ldots I^q_i]} \xrightarrow{\mbox{\fontsize{7}{9}\selectfont$\mathtt{~~~~~~~~assembly1^{*}~~~~~~~~}$}} \mathtt{[0110]}\right)^{*}} \mathtt{[010101]}
281\end{displaymath}
282Here $\mathtt{I^i_j}$ for $1 \leq j \leq q$ are the $q$ machine code instructions obtained by expanding, with \texttt{expand\_pseudo\_instruction}, a single pseudoinstruction.
283Each machine code instruction $\mathtt{I^i_j}$ is then assembled, using the \texttt{assembly1} function, into a list of bytes.
284This process is iterated for each pseudoinstruction, before the lists are flattened into a single bit list representation of the original assembly program.
285
286%By inspecting the above diagram, it would appear that the best way to proceed with a proof that the assembly process does not change the semantics of an assembly program is via a decomposition of the problem into two subproblems.
287%Namely, we first expand any and all pseudoinstructions into lists of machine instructions, and provide a proof that this process does not change our program's semantics.
288%Finally, we assemble all machine code instructions into machine code---lists of bytes---and prove once more that this process does not have an adverse effect on a program's semantics.
289%By composition, we then have that the whole assembly process is semantics preserving.
290
291%This is a tempting approach to the proof, but ultimately the wrong approach.
292%In particular, it is important that we track how the program counter indexing into the assembly program, and the machine's program counter evolve, so that we can relate them.
293%Expanding pseudoinstructions requires that the machine's program counter be incremented by $n$ steps, for $1 \leq n$, for every increment of the assembly program's program counter.
294%Keeping track of the correspondence between the two program counters quickly becomes unfeasible using a compositional approach, and hence the proof must be monolithic.
295
296% ---------------------------------------------------------------------------- %
297% SECTION                                                                      %
298% ---------------------------------------------------------------------------- %
299\subsection{Policies}
300\label{subsect.policies}
301
302Policies exist to dictate how conditional and unconditional jumps at the assembly level should be expanded into machine code instructions.
303Using policies, we are able to completely decouple the decision over how jumps are expanded with the act of expansion, simplifying our proofs.
304As mentioned, the MCS-51 instruction set includes three different jump instructions: \texttt{SJMP}, \texttt{AJMP} and \texttt{LJMP}; call these `short', `medium' and `long' jumps, respectively:
305\begin{lstlisting}
306inductive jump_length: Type[0] :=
307  | short_jump: jump_length
308  | medium_jump: jump_length
309  | long_jump: jump_length.
310\end{lstlisting}
311
312A \texttt{jump\_expansion\_policy} is a map from pseudo program counters (implemented as \texttt{Word}s) to \texttt{jump\_length}s.
313Efficient implementations of policies are based on tries.
314Intuitively, a policy maps positions in a program (indexed using program counters implemented as \texttt{Word}s) to a particular variety of jump:
315\begin{lstlisting}
316definition policy_type := Word $\rightarrow$ jump_length.
317\end{lstlisting}
318
319Next, we require a series of `sigma' functions.
320These functions map assembly program counters to their machine code counterparts, establishing the correspondence between `positions' in an assembly program and `positions' in a machine code program.
321At the heart of this process is \texttt{sigma0} which traverses an assembly program building maps from pseudo program counters to program counters.
322This function fails if and only if an internal call to \texttt{assembly\_1\_pseudoinstruction\_safe} fails, which happens if a jump pseudoinstruction is expanded incorrectly:
323\begin{lstlisting}
324definition sigma0: pseudo_assembly_program $\rightarrow$ policy_type
325  $\rightarrow$ option (nat $\times$ (nat $\times$ (BitVectorTrie Word 16))) := $\ldots$
326\end{lstlisting}
327Here, the returned \texttt{BitVectorTrie} is a map between pseudo program counters and program counters, and is constructed by successively expanding pseudoinstructions and incrementing the two program counters the requisite amount to keep them in correct correspondence.
328The two natural numbers returned are the maximum values that the two program counters attained.
329
330We eventually lift this to functions from pseudo program counters to program counters, implemented as \texttt{Word}s:
331\begin{lstlisting}
332definition sigma_safe:
333  pseudo_assembly_program $\rightarrow$ policy_type $\rightarrow$ option (Word $\rightarrow$ Word) := $\ldots$
334\end{lstlisting}
335
336Now, it's possible to define what a `good policy' is for a program \texttt{p}.
337A policy \texttt{pol} is deemed good when it prevents \texttt{sigma\_safe} from failing on \texttt{p}.
338Failure is only possible when the policy dictates that short or medium jumps be expanded to jumps to locations too far away, or when the produced object code does not fit into code memory.
339A \texttt{policy} for a program \texttt{p} is a policy that is good for \texttt{p}:
340\begin{lstlisting}
341definition policy_ok := $\lambda$pol.$\lambda$p. sigma_safe p $\neq$ None $\ldots$
342definition policy :=
343  $\lambda$p. $\Sigma$jump_expansion: policy_type. policy_ok jump_expansion p
344\end{lstlisting}
345
346Finally, we obtain \texttt{sigma}, a mapping from pseudo program counters to program counters that takes in input a good policy and thus never fails.
347Note how we avoid failure here, and in most of the remaining functions, by restricting the domain using the dependent type \texttt{policy}:
348\begin{lstlisting}
349definition sigma: $\forall$p. policy p $\rightarrow$ Word $\rightarrow$ Word := $\ldots$
350\end{lstlisting}
351
352% ---------------------------------------------------------------------------- %
353% SECTION                                                                      %
354% ---------------------------------------------------------------------------- %
355\subsection{Correctness of the assembler with respect to fetching}
356\label{subsect.total.correctness.of.the.assembler}
357
358Using our policies, we now work toward proving the total correctness of the assembler.
359By `total correctness', we mean that the assembly process never fails when provided with a good policy and that the process does not change the semantics of a certain class of well behaved assembly programs.
360Naturally, this necessitates keeping some sort of correspondence between addresses at the assembly level and addresses at the machine code level.
361For this, we use the \texttt{sigma} machinery defined at the end of Subsection~\ref{subsect.policies}.
362
363We expand pseudoinstructions using the function \texttt{expand\_pseudo\_instruction}.
364This takes an assembly program (consisting of a list of pseudoinstructions), a good policy for the program and a pointer to the pseudo code memory.
365It returns a list of instructions, corresponding to the expanded pseudoinstruction referenced by the pointer.
366The policy is used to decide how to expand \texttt{Call}s, \texttt{Jmp}s and conditional jumps.
367The function is given a dependent type that incorporates its specification.
368Its pre- and post-conditions are omitted in the paper due to lack of space.
369We show them as an example in the next function, \texttt{build\_maps}.
370\begin{lstlisting}
371definition expand_pseudo_instruction:
372  $\forall$program. $\forall$pol: policy program.
373  $\forall$ppc:Word. $\ldots$ $\Sigma$res. list instruction. $\ldots$ := $\ldots$
374\end{lstlisting}
375
376The following function, \texttt{build\_maps}, is used to construct a pair of mappings from program counters to labels and cost labels, respectively.
377Cost labels are a technical device used in the CerCo prototype C compiler for proving that the compiler is cost preserving.
378For our purposes in this paper, they can be safely ignored, though the interested reader may consult~\cite{amadio:certifying:2010} for an overview.
379
380The label map, on the other hand, records the position of labels that appear in an assembly program, so that the pseudoinstruction expansion process can replace them with real memory addresses:
381\begin{lstlisting}
382definition build_maps:
383 $\forall$p. $\forall$pol: policy p.
384 $\Sigma$res : ((BitVectorTrie Word 16) $\times$ (BitVectorTrie Word 16)).
385   let $\langle$labels, costs$\rangle$ := res in
386     $\forall$id. occurs_exactly_once id ($\pi_2$ p) $\rightarrow$
387    let addr := address_of_word_labels_code_mem ($\pi_2$ p) id in
388      lookup $\ldots$ id labels (zero $\ldots$) = sigma pseudo_program pol addr := $\ldots$
389\end{lstlisting}
390The rather complex type of \texttt{build\_maps} owes to our use of Matita's Russell facility to provide a strong specification for the function in the type (c.f. the use of sigma types, through which Russell is implemented in Matita).
391In particular, we express that for all labels that appear exactly once in any assembly program, the newly created map used in the implementation and the
392stronger \texttt{sigma} function used in the specification agree.
393
394Using \texttt{build\_maps}, we can express the following lemma, expressing the correctness of the assembly function:
395\begin{lstlisting}
396lemma assembly_ok: $\forall$p,pol,assembled.
397  let $\langle$labels, costs$\rangle$ := build_maps p pol in
398  $\langle$assembled,costs$\rangle$ = assembly p pol $\rightarrow$
399  let cmem := load_code_memory assembled in
400  let preamble := $\pi_1$ p in
401  let dlbls := construct_datalabels preamble in
402  let addr := address_of_word_labels_code_mem ($\pi_2$ p) in
403  let lk_lbls := λx. sigma p pol (addr x) in
404  let lk_dlbls := λx. lookup $\ldots$ x datalabels (zero ?) in
405  $\forall$ppc, pi, newppc.
406  $\forall$prf: $\langle$pi, newppc$\rangle$ = fetch_pseudo_instruction ($\pi_2$ p) ppc.
407  $\forall$len, assm.
408  let spol := sigma program pol ppc in
409  let spol_len := spol + len in
410  let echeck := encoding_check cmem spol spol_len assm in
411  let a1pi := assembly_1_pseudoinstruction in
412  $\langle$len, assm$\rangle$ = a1pi p pol ppc lk_lbls lk_dlbls pi (refl $\ldots$) (refl $\ldots$) ? $\rightarrow$
413    echeck $\wedge$ sigma p pol newppc = spol_len.
414\end{lstlisting}
415Suppose also we assemble our program \texttt{p} in accordance with a policy \texttt{pol} to obtain \texttt{assembled}.
416Here, we perform a `sanity check' to ensure that the two cost label maps generated are identical, before loading the assembled program into code memory \texttt{cmem}.
417Then, for every pseudoinstruction \texttt{pi}, pseudo program counter \texttt{ppc} and new pseudo program counter \texttt{newppc}, such that we obtain \texttt{pi} and \texttt{newppc} from fetching a pseudoinstruction at \texttt{ppc}, we check that assembling this pseudoinstruction produces the correct number of machine code instructions, and that the new pseudo program counter \texttt{ppc} has the value expected of it.
418
419Theorem \texttt{fetch\_assembly} establishes that the \texttt{fetch} and \texttt{assembly1} functions interact correctly.
420The \texttt{fetch} function, as its name implies, fetches the instruction indexed by the program counter in the code memory, while \texttt{assembly1} maps a single instruction to its byte encoding:
421\begin{lstlisting}
422theorem fetch_assembly: $\forall$pc, i, cmem, assembled.
423  assembled = assembly1 i $\rightarrow$
424  let len := length $\ldots$ assembled in
425    encoding_check cmem pc (pc + len) assembled $\rightarrow$
426    let fetched := fetch code_memory (bitvector_of_nat $\ldots$ pc) in
427    let $\langle$instr_pc, ticks$\rangle$ := fetched in
428    let $\langle$instr, pc'$\rangle$ := instr_pc in
429      (eq_instruction instr i $\wedge$
430       eqb ticks (ticks_of_instruction instr) $\wedge$
431       eq_bv $\ldots$ pc' (pc + len)) = true.
432\end{lstlisting}
433In particular, we read \texttt{fetch\_assembly} as follows.
434Given an instruction, \texttt{i}, we first assemble the instruction to obtain \texttt{assembled}, checking that the assembled instruction was stored in code memory correctly.
435Fetching from code memory, we obtain \texttt{fetched}, a tuple consisting of the instruction, new program counter, and the number of ticks this instruction will take to execute.
436Deconstructing these tuples, we finally check that the fetched instruction is the same instruction that we began with, and the number of ticks this instruction will take to execute is the same as the result returned by a lookup function, \texttt{ticks\_of\_instruction}, devoted to tracking this information.
437Or, in plainer words, assembling and then immediately fetching again gets you back to where you started.
438
439Lemma \texttt{fetch\_assembly\_pseudo} (whose type is shown here slightly simplified) is obtained by composition of \texttt{expand\_pseudo\_instruction} and \texttt{assembly\_1\_pseudoinstruction}:
440\begin{lstlisting}
441lemma fetch_assembly_pseudo:
442 ∀program.∀pol:policy program.∀ppc.∀code_memory.
443  let pi := fst (fetch_pseudo_instruction (snd program) ppc) in
444  let instructions := expand_pseudo_instruction program pol ppc ... in
445  let $\langle$len,assembled$\rangle$ := assembly_1_pseudoinstruction program pol ppc ... in
446  encoding_check code_memory pc (pc + len) assembled →
447  fetch_many code_memory (pc + len) pc instructions.
448\end{lstlisting}
449Here, \texttt{len} is the number of machine code instructions the pseudoinstruction at hand has been expanded into, and \texttt{encoding\_check} is a recursive function that checks that assembled machine code is correctly stored in code memory.
450We assemble a single pseudoinstruction with \texttt{assembly\_1\_pseudoinstruction}, which internally calls \texttt{jump\_expansion} and \texttt{expand\_pseudo\_instruction}.
451The function \texttt{fetch\_many} fetches multiple machine code instructions from code memory and performs some routine checks.
452
453Intuitively, Lemma \texttt{fetch\_assembly\_pseudo} can be read as follows.
454Suppose our policy \texttt{jump\_expansion} dictates that the pseudoinstruction indexed by the pseudo program counter \texttt{ppc} in assembly program \texttt{program} gives us the policy decision \texttt{pol}.
455Further, suppose we expand the pseudoinstruction at \texttt{ppc} with the policy decision \texttt{pol}, obtaining the list of machine code instructions \texttt{instructions}.
456Suppose we also assemble the pseudoinstruction at \texttt{ppc} to obtain \texttt{assembled}, a list of bytes.
457Then, we check with \texttt{fetch\_many} that the number of machine instructions that were fetched matches the number of instruction that \texttt{expand\_pseudo\_instruction} expanded.
458
459The final lemma in this series is \texttt{fetch\_assembly\_pseudo2} that combines the Lemma \texttt{fetch\_aasembly\_pseudo} with the correctness of the functions that load object code into the processor's memory.
460At first, the lemmas appears to nearly establish the correctness of the assembler:
461\begin{lstlisting}
462lemma fetch_assembly_pseudo2:
463 ∀program,pol,ppc.
464  let $\langle$labels,costs$\rangle$ := build_maps program pol in
465  let assembled := \fst (assembly program pol) in
466  let code_memory := load_code_memory assembled in
467  let data_labels := construct_datalabels (\fst program) in
468  let lookup_labels :=
469    λx. sigma $\ldots$ pol (address_of_word_labels_code_mem (\snd program) x) in
470  let lookup_datalabels := λx. lookup ? ? x data_labels (zero ?) in
471  let $\langle$pi,newppc$\rangle$ := fetch_pseudo_instruction (\snd program) ppc in
472  let instructions ≝ expand_pseudo_instruction program pol ppc ... in
473   fetch_many code_memory (sigma program pol newppc)
474     (sigma program pol ppc) instructions.
475\end{lstlisting}
476
477Intuitively, we may read \texttt{fetch\_assembly\_pseudo2} as follows.
478Suppose we are able to successfully assemble an assembly program using \texttt{assembly} and produce a code memory, \texttt{code\_memory}.
479Then, fetching a pseudoinstruction from the pseudo code memory at address \texttt{ppc} corresponds to fetching a sequence of instructions from the real code memory at address \texttt{sigma program pol ppc}.
480The fetched sequence is established as the expansion of the pseudoinstruction, according to the good policy \texttt{pol}.
481
482However, this property is \emph{not} strong enough to establish that the semantics of an assembly program has been preserved by the assembly process since it does not establish the correspondence between the semantics of a pseudo-instruction and that of its expansion.
483In particular, the two semantics differ on instructions that \emph{could} directly manipulate program addresses.
484
485% ---------------------------------------------------------------------------- %
486% SECTION                                                                      %
487% ---------------------------------------------------------------------------- %
488\subsection{Total correctness for `well behaved' assembly programs}
489\label{subsect.total.correctness.for.well.behaved.assembly.programs}
490
491In any `reasonable' assembly language addresses in code memory are just data that can be manipulated in multiple ways by the program.
492An assembly program can forge, compare and move addresses around, shift existing addresses or apply logical and arithmetical operations to them.
493Further, every optimising assembler is allowed to modify code memory.
494Hence only the semantics of a few of the aforementioned operations are preserved by an optimising assembler/compiler.
495Moreover, this characterisation of well behaved programs is clearly undecidable.
496
497To obtain a reasonable statement of correctness for our assembler, we need to trace memory locations (and, potentially, registers) that contain memory addresses.
498This is necessary for two purposes.
499
500First we must detect (at run time) programs that manipulate addresses in well behaved ways, according to some approximation of well-behavedness.
501Second, we must compute statuses that correspond to pseudo-statuses.
502The contents of the program counter must be translated, as well as the contents of all traced locations, by applying the \texttt{sigma} map.
503Remaining memory cells are copied \emph{verbatim}.
504
505For instance, after a function call, the two bytes that form the return pseudo address are pushed on top of the stack, i.e. in internal RAM.
506This pseudo internal RAM corresponds to an internal RAM where the stack holds the real addresses after optimisation, and all the other values remain untouched.
507
508We use an \texttt{internal\_pseudo\_address\_map} to trace addresses of code memory addresses in internal RAM.
509The current code is parametric on the implementation of the map itself.
510\begin{lstlisting}
511axiom internal_pseudo_address_map: Type[0].
512\end{lstlisting}
513
514The \texttt{low\_internal\_ram\_of\_pseudo\_low\_internal\_ram} function converts the lower internal RAM of a \texttt{PseudoStatus} into the lower internal RAM of a \texttt{Status}.
515A similar function exists for higher internal RAM.
516Note that both RAM segments are indexed using addresses 7-bits long.
517The function is currently axiomatised, and an associated set of axioms prescribe the behaviour of the function:
518\begin{lstlisting}
519axiom low_internal_ram_of_pseudo_low_internal_ram:
520  internal_pseudo_address_map $\rightarrow$ BitVectorTrie Byte 7 $\rightarrow$ BitVectorTrie Byte 7.
521\end{lstlisting}
522
523Next, we are able to translate \texttt{PseudoStatus} records into \texttt{Status} records using \texttt{status\_of\_pseudo\_status}.
524Translating a \texttt{PseudoStatus}'s code memory requires we expand pseudoinstructions and then assemble to obtain a trie of bytes.
525This never fails, providing that our policy is correct:
526\begin{lstlisting}
527definition status_of_pseudo_status: internal_pseudo_address_map $\rightarrow$
528  $\forall$ps:PseudoStatus. policy (code_memory $\ldots$ ps) $\rightarrow$ Status
529\end{lstlisting}
530
531The \texttt{next\_internal\_pseudo\_address\_map} function is responsible for run time monitoring of the behaviour of assembly programs, in order to detect well behaved ones.
532It returns the new map that traces memory addresses in internal RAM after execution of the next pseudoinstruction.
533It fails when the instruction tampers with memory addresses in unanticipated (but potentially correct) ways.
534It thus decides the membership of a correct but not complete subset of well behaved programs.
535\begin{lstlisting}
536definition next_internal_pseudo_address_map: internal_pseudo_address_map
537  $\rightarrow$ PseudoStatus $\rightarrow$ option internal_pseudo_address_map
538\end{lstlisting}
539
540The function \texttt{ticks\_of} computes how long---in clock cycles---a pseudoinstruction will take to execute when expanded in accordance with a given policy.
541The function returns a pair of natural numbers, needed for recording the execution times of each branch of a conditional jump.
542\begin{lstlisting}
543definition ticks_of:
544  $\forall$p:pseudo_assembly_program. policy p $\rightarrow$ Word $\rightarrow$ nat $\times$ nat := $\ldots$
545\end{lstlisting}
546
547Finally, we are able to state and prove our main theorem.
548This relates the execution of a single assembly instruction and the execution of (possibly) many machine code instructions, as long .
549That is, the assembly process preserves the semantics of an assembly program, as it is translated into machine code, as long as we are able to track memory addresses properly:
550\begin{lstlisting}
551theorem main_thm:
552 ∀M,M':internal_pseudo_address_map.∀ps.∀pol: policy ps.
553  next_internal_pseudo_address_map M ps = Some $\ldots$ M' →
554   ∃n.
555      execute n (status_of_pseudo_status M ps pol)
556    = status_of_pseudo_status M'
557       (execute_1_pseudo_instruction (ticks_of (code_memory $\ldots$ ps) pol) ps)
558       [pol].
559\end{lstlisting}
560The statement is standard for forward simulation, but restricted to \texttt{PseudoStatuses} \texttt{ps} whose next instruction to be executed is well-behaved with respect to the \texttt{internal\_pseudo\_address\_map} \texttt{M}.
561Theorem \texttt{main\_thm} establishes the total correctness of the assembly process and can simply be lifted to the forward simulation of an arbitrary number of well behaved steps on the assembly program.
562
563% ---------------------------------------------------------------------------- %
564% SECTION                                                                      %
565% ---------------------------------------------------------------------------- %
566\section{Conclusions}
567\label{sect.conclusions}
568
569We have proved the total correctness of an assembler for MCS-51 assembly language.
570In particular, our assembly language featured labels, arbitrary conditional and unconditional jumps to labels, global data and instructions for moving this data into the MCS-51's single 16-bit register.
571Expanding these pseudoinstructions into machine code instructions is not trivial, and the proof that the assembly process is `correct', in that the semantics of a subset of assembly programs are not changed is complex.
572Further, we have observed the `shocking' fact that any optimising assembler cannot preserve the semantics of all assembly programs.
573
574The formalisation is a key component of the CerCo project, which aims to produce a verified concrete complexity preserving compiler for a large subset of the C programming language.
575The verified assembler, complete with the underlying formalisation of the semantics of MCS-51 machine code (described fully in~\cite{mulligan:executable:2011}), will form the bedrock layer upon which the rest of the CerCo project will build its verified compiler platform.
576However, further work is needed.
577In particular, as it stands, the code produced by the prototype CerCo C compiler does not fall into the `semantics preserving' subset of assembly programs for our assembler.
578This is because the MCS-51 features a small stack space, and a larger stack is customarily manually emulated in external RAM.
579As a result, the majority of programs feature slices of memory addresses and program counters being moved in-and-out of external RAM via the registers, simulating the stack mechanism.
580At the moment, this movement is not tracked by \texttt{internal\_pseudo\_address\_map}, which only tracks the movement of memory addresses in low internal RAM.
581We leave extending this tracking of memory addresses throughout the whole of the MCS-51's address spaces as future work.
582
583It is interesting to compare our work to an `industrial grade' assembler for the MCS-51: SDCC~\cite{sdcc:2011}.
584SDCC is the only open source C compiler that targets the MCS-51 instruction set.
585It appears that all pseudojumps in SDCC assembly are expanded to \texttt{LJMP} instructions, the worst possible jump expansion policy from an efficiency point of view.
586Note that this policy is the only possible policy \emph{in theory} that can preserve the semantics of an assembly program during the assembly process.
587However, this comes at the expense of assembler completeness: the generated program may be too large to fit into code memory.
588In this respect, there is a trade-off between the completeness of the assembler and the efficiency of the assembled program.
589The definition and proof of an complete, optimal (in the sense that jump pseudoinstructions are expanded to the smallest possible opcode) and correct jump expansion policy is ongoing work.
590
591Aside from their application in verified compiler projects such as CerCo and CompCert, verified assemblers such as ours could also be applied to the verification of operating system kernels.
592Of particular note is the verified seL4 kernel~\cite{klein:sel4:2009,klein:sel4:2010}.
593This verification explicitly assumes the existence of, amongst other things, a trustworthy assembler and compiler.
594
595We note here that both CompCert and the seL4 formalisation assume the existence of `trustworthy' assemblers.
596Our observation that an optimising assembler cannot preserve the semantics of every assembly program may have important consequences for these projects.
597In particular, if CompCert chooses to assume the existence of an optimising assembler, then care should be made to ensure that any assembly program produced by the CompCert C compiler falls into the class of assembly programs that have a hope of having their semantics preserved by an optimising assembler.
598
599In certain places in our formalisation (e.g. in proving \texttt{build\_maps} is correct) we made use of Matita's implementation of Russell~\cite{sozeau:subset:2006}.
600In Matita, Russell may be implemented using two coercions and some notational sugaring.
601% more
602
603\subsection{Related work}
604\label{subsect.related.work}
605
606% piton
607We are not the first to consider the total correctness of an assembler for a non-trivial assembly language.
608Perhaps the most impressive piece of work in this domain is the Piton stack~\cite{moore:piton:1996,moore:grand:2005}.
609This was a stack of verified components, written and verified in ACL2, ranging from a proprietary FM9001 microprocessor verified at the gate level, to assemblers and compilers for two high-level languages---a dialect of Lisp and $\mu$Gypsy~\cite{moore:grand:2005}.
610
611% jinja
612Klein and Nipkow consider a Java-like programming language, Jinja~\cite{klein:machine:2006,klein:machine:2010}.
613They provide a compiler, virtual machine and operational semantics for the programming language and virtual machine, and prove that their compiler is semantics and type preserving.
614
615We believe some other verified assemblers exist in the literature.
616However, what sets our work apart from that above is our attempt to optimise the machine code generated by our assembler.
617This complicates any formalisation effort, as the best possible selection of machine instructions must be made, especially important on a device such as the MCS-51 with a miniscule code memory.
618Further, care must be taken to ensure that the time properties of an assembly program are not modified by the assembly process lest we affect the semantics of any program employing the MCS-51's I/O facilities.
619This is only possible by inducing a cost model on the source code from the optimisation strategy and input program.
620This will be a \emph{leit motif} of CerCo.
621
622Finally, mention of CerCo will invariably invite comparisons with CompCert~\cite{compcert:2011,leroy:formal:2009}, another verified compiler project closely related to CerCo.
623As previously mentioned, CompCert considers only extensional correctness of the compiler, and not intensional correctness, which CerCo focusses on.
624However, CerCo also extends CompCert in other ways.
625Namely, the CompCert verified compilation chain terminates at the PowerPC or ARM assembly level, and takes for granted the existence of a trustworthy assembler.
626CerCo chooses to go further, by considering a verified compilation chain all the way down to the machine code level.
627In essence, the work presented in this publication is one part of CerCo's extension over CompCert.
628
629\subsection{Resources}
630\label{subsect.resources}
631
632All files relating to our formalisation effort can be found online at~\url{http://cerco.cs.unibo.it}.
633Our development, including the definition of the executable semantics of the MCS-51, is spread across 17 files, totalling around 13,000 lines of Matita source.
634The bulk of the proof described herein is contained in a single file, \texttt{AssemblyProof.ma}, consisting of approximately 3000 lines of Matita source.
635
636We admit to using a number of axioms in our development.
637We do not believe the use of these axioms has been particularly onerous---very few concern anything more interesting than, say, stating that converting from a natural number to a bitvector and back again is the identity---and what axioms remain are rapidly being closed as work continues.
638
639\bibliography{cpp-2011.bib}
640
641\end{document}\renewcommand{\verb}{\lstinline}
642\def\lstlanguagefiles{lst-grafite.tex}
643\lstset{language=Grafite}
Note: See TracBrowser for help on using the repository browser.