source: extracted/rTL.mli @ 2746

Last change on this file since 2746 was 2743, checked in by sacerdot, 7 years ago

Latest version of the compiler, extracted with the latest version of Matita.
Some files still need some manual patching to avoid an extraction bug
(see PROBLEMS file).

File size: 3.1 KB
Line 
1open Preamble
2
3open String
4
5open Sets
6
7open Listb
8
9open LabelledObjects
10
11open Graphs
12
13open I8051
14
15open Order
16
17open Registers
18
19open BitVectorTrie
20
21open CostLabel
22
23open Hide
24
25open Proper
26
27open PositiveMap
28
29open Deqsets
30
31open ErrorMessages
32
33open PreIdentifiers
34
35open Errors
36
37open Extralib
38
39open Setoids
40
41open Monad
42
43open Option
44
45open Lists
46
47open Identifiers
48
49open Integers
50
51open AST
52
53open Division
54
55open Exp
56
57open Arithmetic
58
59open Extranat
60
61open Vector
62
63open Div_and_mod
64
65open Jmeq
66
67open Russell
68
69open List
70
71open Util
72
73open FoldStuff
74
75open BitVector
76
77open Types
78
79open Bool
80
81open Relations
82
83open Nat
84
85open Hints_declaration
86
87open Core_notation
88
89open Pts
90
91open Logic
92
93open Positive
94
95open Z
96
97open BitVectorZ
98
99open Pointers
100
101open ByteValues
102
103open BackEndOps
104
105open Joint
106
107type rtl_seq =
108| Rtl_stack_address of Registers.register * Registers.register
109
110val rtl_seq_rect_Type4 :
111  (Registers.register -> Registers.register -> 'a1) -> rtl_seq -> 'a1
112
113val rtl_seq_rect_Type5 :
114  (Registers.register -> Registers.register -> 'a1) -> rtl_seq -> 'a1
115
116val rtl_seq_rect_Type3 :
117  (Registers.register -> Registers.register -> 'a1) -> rtl_seq -> 'a1
118
119val rtl_seq_rect_Type2 :
120  (Registers.register -> Registers.register -> 'a1) -> rtl_seq -> 'a1
121
122val rtl_seq_rect_Type1 :
123  (Registers.register -> Registers.register -> 'a1) -> rtl_seq -> 'a1
124
125val rtl_seq_rect_Type0 :
126  (Registers.register -> Registers.register -> 'a1) -> rtl_seq -> 'a1
127
128val rtl_seq_inv_rect_Type4 :
129  rtl_seq -> (Registers.register -> Registers.register -> __ -> 'a1) -> 'a1
130
131val rtl_seq_inv_rect_Type3 :
132  rtl_seq -> (Registers.register -> Registers.register -> __ -> 'a1) -> 'a1
133
134val rtl_seq_inv_rect_Type2 :
135  rtl_seq -> (Registers.register -> Registers.register -> __ -> 'a1) -> 'a1
136
137val rtl_seq_inv_rect_Type1 :
138  rtl_seq -> (Registers.register -> Registers.register -> __ -> 'a1) -> 'a1
139
140val rtl_seq_inv_rect_Type0 :
141  rtl_seq -> (Registers.register -> Registers.register -> __ -> 'a1) -> 'a1
142
143val rtl_seq_discr : rtl_seq -> rtl_seq -> __
144
145val rtl_seq_jmdiscr : rtl_seq -> rtl_seq -> __
146
147val rTL_uns : Joint.unserialized_params
148
149val rTL : Joint.graph_params
150
151type rtl_program = Joint.joint_program
152
153val dpi1__o__reg_to_rtl_snd_argument__o__inject :
154  (Registers.register, 'a1) Types.dPair -> Joint.psd_argument Types.sig0
155
156val eject__o__reg_to_rtl_snd_argument__o__inject :
157  Registers.register Types.sig0 -> Joint.psd_argument Types.sig0
158
159val reg_to_rtl_snd_argument__o__inject :
160  Registers.register -> Joint.psd_argument Types.sig0
161
162val dpi1__o__reg_to_rtl_snd_argument :
163  (Registers.register, 'a1) Types.dPair -> Joint.psd_argument
164
165val eject__o__reg_to_rtl_snd_argument :
166  Registers.register Types.sig0 -> Joint.psd_argument
167
168val dpi1__o__byte_to_rtl_snd_argument__o__inject :
169  (BitVector.byte, 'a1) Types.dPair -> Joint.psd_argument Types.sig0
170
171val eject__o__byte_to_rtl_snd_argument__o__inject :
172  BitVector.byte Types.sig0 -> Joint.psd_argument Types.sig0
173
174val byte_to_rtl_snd_argument__o__inject :
175  BitVector.byte -> Joint.psd_argument Types.sig0
176
177val dpi1__o__byte_to_rtl_snd_argument :
178  (BitVector.byte, 'a1) Types.dPair -> Joint.psd_argument
179
180val eject__o__byte_to_rtl_snd_argument :
181  BitVector.byte Types.sig0 -> Joint.psd_argument
182
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