source: Papers/cpp-asm-2012/cpp-2012-asm.tex @ 3222

Last change on this file since 3222 was 3222, checked in by tranquil, 6 years ago

added pages to included papers. final version.

File size: 55.6 KB
25        {\setlength{\fboxsep}{5pt}
26                \setlength{\mylength}{\linewidth}%
27                \addtolength{\mylength}{-2\fboxsep}%
28                \addtolength{\mylength}{-2\fboxrule}%
29                \Sbox
30                \minipage{\mylength}%
31                        \setlength{\abovedisplayskip}{0pt}%
32                        \setlength{\belowdisplayskip}{0pt}%
33                }%
34                {\endminipage\endSbox
35                        \[\fbox{\TheSbox}\]}
37\title{On the correctness of an optimising assembler for the Intel MCS-51 microprocessor\thanks{The project CerCo acknowledges the financial support of the Future and Emerging Technologies (FET) programme within the Seventh Framework Programme for Research of the European Commission, under FET-Open grant number: 243881.}}
38\author{Dominic P. Mulligan \and Claudio Sacerdoti Coen}
39\institute{Dipartimento di Scienze dell'Informazione,\\ Universit\'a degli Studi di Bologna}
49We present a proof of correctness in Matita for an optimising assembler for the MCS-51 microcontroller.
50The efficient expansion of pseudoinstructions, namely jumps, into machine instructions is complex.
51We isolate the decision making over how jumps should be expanded from the expansion process itself as much as possible using `policies', making the proof of correctness for the assembler more straightforward.
53%We observe that it is impossible for an optimising assembler to preserve the semantics of every assembly program.
54%Assembly language programs can manipulate concrete addresses in arbitrary ways.
55Our proof strategy contains a tracking facility for `good addresses' and only programs that use good addresses have their semantics preserved under assembly, as we observe that it is impossible for an assembler to preserve the semantics of every assembly program.
56Our strategy offers increased flexibility over the traditional approach to proving the correctness of assemblers, wherein addresses in assembly are kept opaque and immutable.
57In particular, we may experiment with allowing the benign manipulation of addresses.
58\keywords{Verified software, CerCo (Certified Complexity), MCS-51 microcontroller, Matita proof assistant}
61% ---------------------------------------------------------------------------- %
62% SECTION                                                                      %
63% ---------------------------------------------------------------------------- %
67We consider the formalisation of an assembler for the Intel MCS-51 8-bit microprocessor in the Matita proof assistant~\cite{asperti:user:2007}.
68This formalisation forms a major component of the EU-funded CerCo (`Certified Complexity') project~\cite{cerco:2011}, concerning the construction and formalisation of a concrete complexity preserving compiler for a large subset of the C programming language.
70The MCS-51 dates from the early 1980s and is commonly called the 8051/8052.
71Derivatives are still widely manufactured by a number of semiconductor foundries, with the processor being used especially in embedded systems.
73The MCS-51 has a relative paucity of features compared to its more modern brethren, with the lack of any caching or pipelining features meaning that timing of execution is predictable, making the MCS-51 very attractive for CerCo's ends.
74However, the MCS-51's paucity of features---though an advantage in many respects---also quickly becomes a hindrance, as the MCS-51 features a relatively minuscule series of memory spaces by modern standards.
75As a result our C compiler, to be able to successfully compile realistic programs for embedded devices, ought to produce `tight' machine code.
77To do this, we must solve the `branch displacement' problem---deciding how best to expand pseudojumps to labels in assembly language to machine code jumps.
78The branch displacement problem arises when pseudojumps can be expanded
79in different ways to real machine instructions, but the different expansions
80are not equivalent (e.g. differ in size or speed) and not always
81correct (e.g. correctness is only up to global constraints over the compiled
82code). For instance, some jump instructions (short jumps) are very small
83and fast, but they can only reach destinations within a
84certain distance from the current instruction. When the destinations are
85too far away, larger and slower long jumps must be used. The use of a long jump may
86augment the distance between another pseudojump and its target, forcing
87another long jump use, in a cascade. The job of the optimising
88compiler (assembler) is to individually expand every pseudo-instruction in such a way
89that all global constraints are satisfied and that the compiled program
90is minimal in size and faster in concrete time complexity.
91This problem is known to be computationally hard for most CISC architectures (see~\cite{hyde:branch:2006}).
93To simplify the CerCo C compiler we have chosen to implement an optimising assembler whose input language the compiler will target.
94Labels, conditional jumps to labels, a program preamble containing global data and a \texttt{MOV} instruction for moving this global data into the MCS-51's one 16-bit register all feature in our assembly language.
95We further simplify by ignoring linking, assuming that all our assembly programs are pre-linked.
97Another complication we have addressed is that of the cost model.
98CerCo imposes a cost model on C programs or, more specifically, on simple blocks of instructions.
99This cost model is induced by the compilation process itself, and its non-compositional nature allows us to assign different costs to identical C statements depending on how they are compiled.
100In short, we aim to obtain a very precise costing for a program by embracing the compilation process, not ignoring it.
101At the assembler level, this is reflected by our need to induce a cost
102model on the assembly code as a function of the assembly program and the
103strategy used to solve the branch displacement problem. In particular, our
104optimising assembler should also return a map that assigns a cost (in clock
105cycles) to every instruction in the source program. We expect the induced cost
106to be preserved by the assembler: we will prove that the compiled code
107tightly simulates the source code by taking exactly the predicted amount of
110Note that the temporal tightness of the simulation is a fundamental prerequisite
111of the correctness of the simulation because some functions of the MCS-51---timers and I/O---depend on the microprocessor's clock.
112If the pseudo- and concrete clock differ the result of an I/O operation may not be preserved.
114Branch displacement algorithms must have a deep knowledge of the way
115the rest of the assembler works in order to build globally correct solutions.
116Proving their correctness is quite a complex task (see, for instance,
117the companion paper~\cite{boender:correctness:2012}).
118Nevertheless, the correctness of the whole assembler only depends on the
119correctness of the branch displacement algorithm.
120Therefore, in the rest of the paper, we presuppose the
121existence of a correct policy, to be computed by a branch displacement
122algorithm if it exists. A policy is the decision over how
123any particular jump should be expanded; it is correct when the global
124constraints are satisfied.
125The assembler fails to assemble an assembly program if and only if a correct policy does not exist.
126This is stated in an elegant way in the dependent type of the assembler: the assembly function is total over a program, a policy and the proof that the policy is correct for that program.
128A final complication in the proof is due to the kind of semantics associated to pseudo-assembly programs.
129Should assembly programs be allowed to freely manipulate addresses?
130The traditional answer is `no': values stored in memory or registers are either
131concrete data or symbolic addresses. The latter can only be manipulated
132in very restricted ways and programs that do not do so are not assigned a semantics and cannot be reasoned about.
133All programs that have a semantics have it preserved by the assembler.
134We take an alternative approach, allowing programs to freely
135manipulate addresses non-symbolically but only granting a preservation of semantics
136to those programs that act in `well-behaved' ways.
137In principle, this should allow some reasoning on the actual semantics of malign programs.
138In practice, we note how our approach facilitates more code reuse between the semantics of assembly code and object code.
140The formalisation of the assembler and its correctness proof are given in Sect.~\ref{sect.the.proof}.
141Sect.~\ref{sect.conclusions} presents the conclusions and relations with previous work.
143% ---------------------------------------------------------------------------- %
144% SECTION                                                                      %
145% ---------------------------------------------------------------------------- %
149Matita is a proof assistant based on a variant of the Calculus of (Co)inductive Constructions~\cite{asperti:user:2007}.
150It features dependent types that we exploit in the formalisation.
151The (simplified) syntax of the statements and definitions in the paper should be self-explanatory.
152Pairs are denoted with angular brackets, $\langle-, -\rangle$.
154Matita features a liberal system of coercions.
155It is possible to define a uniform coercion $\lambda x.\langle x,?\rangle$ from every type $T$ to the dependent product $\Sigma x:T.P~x$.
156The coercion opens a proof obligation that asks the user to prove that $P$ holds for $x$.
157When a coercion must be applied to a complex term (a $\lambda$-abstraction, a local definition, or a case analysis), the system automatically propagates the coercion to the sub-terms
158 For instance, to apply a coercion to force $\lambda x.M : A \to B$ to have type $\forall x:A.\Sigma y:B.P~x~y$, the system looks for a coercion from $M: B$ to $\Sigma y:B.P~x~y$ in a context augmented with $x:A$.
159This is significant when the coercion opens a proof obligation, as the user will be presented with multiple, but simpler proof obligations in the correct context.
160In this way, Matita supports the `Russell' proof methodology developed by Sozeau in~\cite{sozeau:subset:2006}, with an implementation that is lighter and more tightly integrated with the system than that of Coq.
162% ---------------------------------------------------------------------------- %
163% SECTION                                                                      %
164% ---------------------------------------------------------------------------- %
165\section{Certification of an optimising assembler}
168Our aim here is to explain the main ideas and steps of the certified proof of correctness for an optimising assembler for the MCS-51.
170In Subsect.~\ref{subsect.machine.code.semantics} we sketch an operational semantics (a realistic and efficient emulator) for the MCS-51.
171We also introduce a syntax for decoded instructions that will be reused for the assembly language.
173In Subsect.~\ref{subsect.assembly.code.semantics} we describe the assembly language and its operational semantics.
174The latter is parametric in the cost model that will be induced by the assembler, reusing the semantics of the machine code on all `real' instructions.
176Branch displacement policies are introduced in Subsect.~\ref{subsect.the.assembler} where we also describe the assembler as a function over policies as previously described.
178To prove our assembler correct we show that the object code given in output, together with a cost model for the source program, simulates the source program executed using that cost model.
179The proof can be divided into two main lemmas.
180The first is correctness with respect to fetching, described in Subsect.~\ref{}.
181Roughly it states that a step of fetching at the assembly level, returning the decoded instruction $I$, is simulated by $n$ steps of fetching at the object level that returns instructions $J_1,\ldots,J_n$, where $J_1,\ldots,J_n$ is, amongst the possible expansions of $I$, the one picked by the policy.
182The second lemma states that $J_1,\ldots,J_n$ simulates $I$ but only if $I$ is well-behaved, i.e. manipulates addresses in `good' ways.
183To keep track of well-behaved address manipulations we record where addresses are currently stored (in memory or an accumulator).
184We introduce a dynamic checking function that inspects this map to determine if the operation is well-behaved, with an affirmative answer being the pre-condition of the lemma.
185The second lemma is detailed in Subsect.~\ref{} where we also establish correctness of our assembler as a composition of the two lemmas: programs that are well-behaved when executed under the cost model induced by the compiler are correctly simulated by the compiled code.
187% ---------------------------------------------------------------------------- %
188% SECTION                                                                      %
189% ---------------------------------------------------------------------------- %
191\subsection{Machine code and its semantics}
194We implemented a realistic and efficient emulator for the MCS-51 microprocessor.
195An MCS-51 program is just a sequence of bytes stored in the read-only code
196memory of the processor, represented as a compact trie of bytes addressed
197by the program counter.
198The \texttt{Status} of the emulator is
199a record that contains the microprocessor's program counter, registers, stack
200pointer, clock, special function registers, data memory, and so on.
201The value of the code memory is a parameter of the record since it is not
202changed during execution.
204The \texttt{Status} records is itself an instance of a more general
205datatype \texttt{PreStatus} that abstracts over the implementation of code
206memory in order to reuse the same datatype for the semantics of the assembly
207language in the next section.
209The execution of a single instruction is performed by the \texttt{execute\_1}
210function, parametric over the content \texttt{cm} of the code memory:
212definition execute_1: $\forall$cm. Status cm $\rightarrow$ Status cm
215The function \texttt{execute\_1} closely matches the fetch-decode-execute
216cycle of the MCS-51 hardware, as described by a Siemen's manufacturer's data sheet~\cite{siemens:2011}.
217Fetching and decoding are performed simultaneously:
218we first fetch, using the program counter, from code memory the first byte of the instruction to be executed, decoding the resulting opcode, fetching more bytes as is necessary to decode the arguments.
219Decoded instructions are represented by the \texttt{instruction} data type
220which extends a data type of \texttt{preinstruction}s that will be reused
221for the assembly language.
223inductive preinstruction (A: Type[0]): Type[0] :=
224 | ADD: $\llbracket$acc_a$\rrbracket$ → $\llbracket$registr; direct; indirect; data$\rrbracket$ $\rightarrow$ preinstruction A
225 | DEC: $\llbracket$acc_a; registr; direct; indirect$\rrbracket$ $\rightarrow$ preinstruction A
226 | JB: $\llbracket$bit_addr$\rrbracket$ $\rightarrow$ A $\rightarrow$ preinstruction A
227 | ...
229inductive instruction: Type[0] :=
230 | LCALL: $\llbracket$addr16$\rrbracket$ $\rightarrow$ instruction
231 | AJMP: $\llbracket$addr11$\rrbracket$ $\rightarrow$ instruction
232 | RealInstruction: preinstruction $\llbracket$relative$\rrbracket$ $\rightarrow$ instruction.
233 | ...
235The MCS-51 has many operand modes, but an unorthogonal instruction set: every
236opcode is only enable for a finite subset of the possible operand modes.
237Here we exploit dependent types and an implicit coercion to synthesise
238the type of arguments of opcodes from a vector of names of operand modes.
239For example, \texttt{ACC} has two operands, the first one constrained to be
240the \texttt{A} accumulator, and the second one to be a disjoint union of
241register, direct, indirect and data operand modes.
243The parameterised type $A$ of \texttt{preinstruction} represents the addressing mode allowed for conditional jumps; in the \texttt{RealInstruction} constructor
244we constraint it to be a relative offset.
245A different instantiation (labels) will be used in the next section for assembly programs.
247Once decoded, execution proceeds by a case analysis on the decoded instruction, following the operation of the hardware.
248For example, the \texttt{DEC} preinstruction (`decrement') is executed as follows:
250 | DEC addr $\Rightarrow$
251  let s := add_ticks1 s in
252  let $\langle$result, flags$\rangle$ := sub_8_with_carry (get_arg_8 s true addr)
253   (bitvector_of_nat 8 1) false in
254     set_arg_8 s addr result
257Here, \texttt{add\_ticks1} models the incrementing of the internal clock of the microprocessor; it is a parameter of the semantics of \texttt{preinstruction}s
258that is fixed in the semantics of \texttt{instruction}s according to the
259manufacturer datasheet.
261% ---------------------------------------------------------------------------- %
262% SECTION                                                                      %
263% ---------------------------------------------------------------------------- %
265\subsection{Assembly code and its semantics}
268An assembly program is a list of potentially labelled pseudoinstructions, bundled with a preamble consisting of a list of symbolic names for locations in data memory (i.e. global variables).
269All preinstructions are pseudoinstructions, but conditional jumps are now
270only allowed to use \texttt{Identifiers} (labels) as their target.
272inductive pseudo_instruction: Type[0] :=
273  | Instruction: preinstruction Identifier $\rightarrow$ pseudo_instruction
274    ...
275  | Jmp: Identifier $\rightarrow$ pseudo_instruction
276  | Call: Identifier $\rightarrow$ pseudo_instruction
277  | Mov: $\llbracket$dptr$\rrbracket$ $\rightarrow$ Identifier $\rightarrow$ pseudo_instruction.
279The pseudoinstructions \texttt{Jmp}, \texttt{Call} and \texttt{Mov} are generalisations of machine code unconditional jumps, calls and move instructions respectively, all of whom act on labels, as opposed to concrete memory addresses.
280The object code calls and jumps that act on concrete memory addresses are ruled
281out of assembly programs not being included in the preinstructions (see previous
284Execution of pseudoinstructions is an endofunction on \texttt{PseudoStatus}.
285A \texttt{PseudoStatus} is an instance of \texttt{PreStatus} that differs
286from a \texttt{Status} only in the datatype used for code memory: a list
287of optionally labelled pseudoinstructions versus a trie of bytes.
288The \texttt{PreStatus} type is crucial for sharing the majority of the
289semantics of the two languages.
291Emulation for pseudoinstructions is handled by \texttt{execute\_1\_pseudo\_instruction}:
293definition execute_1_pseudo_instruction:
294 $\forall$cm. $\forall$costing:($\forall$ppc: Word. ppc < $\mid$snd cm$\mid$ $\rightarrow$ nat $\times$ nat).
295  $\forall$s:PseudoStatus cm. program_counter s < $\mid$snd cm$\mid$ $\rightarrow$ PseudoStatus cm
297The type of \texttt{execute\_1\_pseudo\_instruction} is more involved than
298that of \texttt{execute\_1}. The first difference is that execution is only
299defined when the program counter points to a valid instruction, i.e.
300it is smaller than the length $\mid$\texttt{snd cm}$\mid$ of the program.
301The second difference is the abstraction over the cost model, abbreviated
302here as \emph{costing}.
303The costing is a function that maps valid program counters to pairs of natural numbers representing the number of clock ticks used by the pseudoinstructions stored at those program counters. For conditional jumps the two numbers differ
304to represent different costs for the `true branch' and the `false branch'.
305In the next section we will see how the optimising
306assembler induces the only costing (induced by the branch displacement policy deciding how to expand pseudojumps) that is preserved by compilation.
308Execution proceeds by first fetching from pseudo-code memory using the program counter---treated as an index into the pseudoinstruction list.
309This index is always guaranteed to be within the bounds of the pseudoinstruction list due to the dependent type placed on the function.
310No decoding is required.
311We then proceed by case analysis over the pseudoinstruction, reusing the code for object code for all instructions present in the MCS-51's instruction set.
312For all newly introduced pseudoinstructions, we simply translate labels to concrete addresses before behaving as a `real' instruction.
314We do not perform any kind of symbolic execution, wherein data is the disjoint union of bytes and addresses, with addresses kept opaque and immutable.
315Labels are immediately translated before execution to concrete addresses, and registers and memory locations only ever contain bytes, never labels.
316As a consequence, we allow the programmer to mangle, change and generally adjust addresses as they want, under the proviso that the translation process may not be able to preserve the semantics of programs that do this.
317This will be further discussed in Subsect.~\ref{}.
318The only limitation introduced by this approach is that the size of
319assembly programs is bounded by $2^{16}$.
321% ---------------------------------------------------------------------------- %
322% SECTION                                                                      %
323% ---------------------------------------------------------------------------- %
325\subsection{The assembler}
327The assembler takes in input an assembly program made of pseudoinstructions
328and a branch displacement policy for it.
329It returns both the object code (a list of bytes to be
330loaded in code memory for execution) and the costing for the source.
332Conceptually the assembler works in two passes.
333The first pass expands every pseudoinstruction into a list of machine code instructions using the function \texttt{expand\_pseudo\_instruction}. The policy
334determines which expansion among the alternatives will be chosen for
335pseudo-jumps and pseudo-calls. Once the expansion is performed, the cost
336of the pseudoinstruction is defined as the cost of the expansion.
337The second pass encodes as a list of bytes the expanded instruction list by mapping the function \texttt{assembly1} across the list, and then flattening.
340\mbox{\fontsize{7}{9}\selectfont$[\mathtt{P_1}, \ldots \mathtt{P_n}]$} \underset{\mbox{\fontsize{7}{9}\selectfont$\mathtt{assembly}$}}{\xrightarrow{\left(P_i \underset{\mbox{\fontsize{7}{9}\selectfont$\mathtt{assembly\_1\_pseudo\_instruction}$}}{\xrightarrow{\mathtt{P_i} \xrightarrow{\mbox{\fontsize{7}{9}\selectfont$\mathtt{expand\_pseudo\_instruction}$}} \mathtt{[I^1_i, \ldots I^q_i]} \xrightarrow{\mbox{\fontsize{7}{9}\selectfont$\mathtt{~~~~~~~~assembly1^{*}~~~~~~~~}$}} \mathtt{[0110]}}} \mathtt{[0110]}\right)^{*}}} \mbox{\fontsize{7}{9}\selectfont$\mathtt{[\ldots0110\ldots]}$}
342In order to understand the type for the policy, we briefly hint at the
343branch displacement problem for the MCS-51. A detailed description is found
345The MCS-51 features three unconditional jump instructions: \texttt{LJMP} and \texttt{SJMP}---`long jump' and `short jump' respectively---and an 11-bit oddity of the MCS-51, \texttt{AJMP}.
346Each of these three instructions expects arguments in different sizes and behaves in markedly different ways: \texttt{SJMP} may only perform a `local jump' to an address closer then $2^{7}$ bytes; \texttt{LJMP} may jump to any address in the MCS-51's memory space and \texttt{AJMP} may jump to any address in the current memory page. Memory pages partition the code memory into $2^8$ disjoint areas.
347The size of each opcode is different, with long jumps being larger than the
348other two. Because of the presence of \texttt{AJMP}, an optimal global solution
349may be locally unoptimal, employing a long jump where a shorter one could be
350used to force later jumps to stay inside single memory pages.
352Similarly, a conditional pseudojump must be translated potentially into a configuration of machine code instructions, depending on the distance to the jump's target.
353For example, to translate a jump to a label, a single conditional jump pseudoinstruction may be translated into a block of three real instructions as follows (here, \texttt{JZ} is `jump if accumulator is zero'):
357       & \mathtt{JZ}  & \mathtt{label}                      &                 & \mathtt{JZ}   & \text{size of \texttt{SJMP} instruction} \\
358       & \ldots       &                            & \text{translates to}   & \mathtt{SJMP} & \text{size of \texttt{LJMP} instruction} \\
359\mathtt{label:} & \mathtt{MOV} & \mathtt{A}\;\;\mathtt{B}   & \Longrightarrow & \mathtt{LJMP} & \text{address of \textit{label}} \\
360       &              &                            &                 & \ldots        & \\
361       &              &                            &                 & \mathtt{MOV}  & \mathtt{A}\;\;\mathtt{B}
364Naturally, if \texttt{label} is `close enough', a conditional jump pseudoinstruction is mapped directly to a conditional jump machine instruction; the above translation only applies if \texttt{label} is not sufficiently local.
366The cost returned by the assembler for a pseudoinstruction is set to be the
367cost of its expansion in clock cycles. For conditional jumps that are expanded
368as just shown, the costs of taking the true and false branches are different and
369both need to be returned.
371%In order to implement branch displacement it is impossible to really make the \texttt{expand\_pseudo\_instruction} function completely independent of the encoding function.
372%This is due to branch displacement requiring the distance in bytes of the target of the jump.
373%Moreover the standard solutions for solving the branch displacement problem find their solutions iteratively, by either starting from a solution where all jumps are long, and shrinking them when possible, or starting from a state where all jumps are short and increasing their length as needed.
374%Proving the correctness of such algorithms is already quite involved and the correctness of the assembler as a whole does not depend on the `quality' of the solution found to a branch displacement problem.
375%For this reason, we try to isolate the computation of a branch displacement problem from the proof of correctness for the assembler by parameterising our \texttt{expand\_pseudo\_instruction} by a `policy'.
377The \texttt{expand\_pseudo\_instruction} function is driven by a policy
378in the choice of expansion of pseudoinstructions. The simplest idea
379is then to define policies as functions that maps jumps to their size.
380This simple idea, however, is impractical because short jumps require the
381offset of the target. For instance, suppose that at address \texttt{ppc} in
382the assembly program we found \texttt{Jmp l} such that $l$ is associated to the
383pseudo-address \texttt{a} and the policy wants the \texttt{Jmp} to become a
384\texttt{SJMP $\delta$}. To compute $\delta$, we need to know what the addresses
385\texttt{ppc+1} and \texttt{a} will become in the assembled program to compute
386their difference.
387The address \texttt{a} will be associated to is a function of the expansion
388of all the pseudoinstructions between \texttt{ppc} and \texttt{a}, which is
389still to be performed when expanding the instruction at \texttt{ppc}.
391To solve the issue, we define the policy \texttt{policy} as a map
392from a valid pseudo-address to the corresponding address in the assembled
394Therefore, $\delta$ in the example above can be computed simply as
395\texttt{policy(a) - policy(ppc + 1)}. Moreover, the \texttt{expand\_pseudo\_instruction} emits a \texttt{SJMP} only after verifying for each \texttt{Jmp} that
396$\delta < 128$. When this is not the case, the function emits an
397\texttt{AJMP} if possible, or an \texttt{LJMP} otherwise, therefore always
398picking the locally best solution.
399In order to accommodate those optimal solutions that require local sub-optimal
400choices, the policy may also return a Boolean used to force
401the translation of a \texttt{Jmp} into a \texttt{LJMP} even if
402$\delta < 128$. An essentially identical mechanism exists for call
403instructions and conditional jumps.
405In order for the translation of a jump to be correct, the address associated to
406\texttt{a} by the policy and by the assembler must coincide. The latter is
407the sum of the size of all the expansions of the pseudo-instructions that
408precede the one at address \texttt{a}: the assembler just concatenates all
409expansions sequentially. To grant this property, we impose a
410correctness criterion over policies. A policy is correct when
411\texttt{policy(0) = 0} and for all valid pseudoaddresses \texttt{ppc}
412$${\texttt{policy(ppc+1) = policy(ppc) + instruction\_size(ppc)} \leq 2^{16}}$$
413Here \texttt{instruction\_size(ppc)} is the size in bytes of the expansion
414of the pseudoinstruction found at \texttt{pcc}, i.e. the length of
418% ---------------------------------------------------------------------------- %
419% SECTION                                                                      %
420% ---------------------------------------------------------------------------- %
421\subsection{Correctness of the assembler with respect to fetching}
423We now begin the proof of correctness of the assembler.
424Correctness consists of two properties: firstly that the assembly process never fails when fed a correct policy and secondly the object code returned simulates the source code when the latter is executed according to the cost model also returned by the assembler.
425This second property can be further decomposed into two main properties: correctness with respect to fetching and decoding and correctness with respect to execution.
427Informally, correctness with respect to fetching is the following statement: when we fetch an assembly pseudoinstruction \texttt{I} at address \texttt{ppc}, then we can fetch the expanded pseudoinstruction(s) \texttt{[J1, \ldots, Jn] = fetch\_pseudo\_instruction \ldots\ I\ ppc} from \texttt{policy ppc} in the code memory obtained by loading the assembled object code.
428This section reviews the main steps to prove correctness with respect to fetching.
429Subsect.~\ref{} deals with correctness with respect to execution: the instructions \texttt{[J1, \ldots, Jn]} simulate the pseudoinstruction~\texttt{I}.
431The (slightly simplified) Russell type for the \texttt{assembly} function is:
433definition assembly:
434 $\forall$program: pseudo_assembly_program.  $\forall$policy.
435  $\Sigma$assembled: list Byte $\times$ (BitVectorTrie nat 16).
436   $\mid$program$\mid$ $\leq$ $2^{16}$ $\rightarrow$ policy is correct for program $\rightarrow$
437     policy ($\mid$program$\mid$) = $\mid$fst assembled$\mid$ $\leq$ $2^{16}$ $\wedge$
438     $\forall$ppc: pseudo_program_counter. ppc < $2^{16}$ $\rightarrow$
439       let pseudo_instr := fetch from program at ppc in
440       let assembled_i := assemble pseudo_instr in
441         $\mid$assembled_i$\mid$ $\leq$ $2^{16}$ $\wedge$
442           $\forall$n: nat. n < $\mid$assembled_i$\mid$ $\rightarrow$ $\exists$k: nat.
443             nth assembled_i n = nth assembled (policy ppc + k).
445In plain words, the type of \texttt{assembly} states the following.
446Given a correct policy for the program to be assembled, the assembler never fails and returns some object code and a costing function.
447Under the condition that the policy is `correct' for the program and the program is fully addressable by a 16-bit word, the object code is also fully addressable by a 16-bit word.
448Moreover, the result of assembling the pseudoinstruction obtained fetching from the assembly address \texttt{ppc} is a list of bytes found in the generated object code starting from the object code address \texttt{policy(ppc)}.
450Essentially the type above states that the \texttt{assembly} function correctly expands pseudoinstructions, and that the expanded instruction reside consecutively in memory.
451The fundamental hypothesis is correctness of the policy which allows us to prove the inductive step of the proof, which proceeds by induction over the assembly program.
452It is then straightforward to lift the property from lists of bytes (object code) to tries of bytes (i.e. code memories after loading).
453The \texttt{assembly\_ok} lemma does the lifting.
455We have established that every pseudoinstruction is compiled to a sequence of bytes that is found in memory at the expect place.
456This does not trivially imply that those bytes will be decoded in a correct way to recover the pseudoinstruction expansion.
457Indeed, we first need to prove a lemma that establishes that the \texttt{fetch} function is the left inverse of the \texttt{assembly1} function:
459lemma fetch_assembly:
460 $\forall$pc: Word.
461 $\forall$i: instruction.
462 $\forall$code_memory: BitVectorTrie Byte 16.
463 $\forall$assembled: list Byte.
464  assembled = assemble i $\rightarrow$
465  let len := $\mid$assembled$\mid$ in
466  let pc_plus_len := pc + len in
467   encoding_check pc pc_plus_len assembled $\rightarrow$
468   let $\langle$instr, pc', ticks$\rangle$ := fetch pc in
469    instr = i $\wedge$ ticks = (ticks_of_instruction instr) $\wedge$ pc' = pc_plus_len.
471We read \texttt{fetch\_assembly} as follows.
472Any time the encoding \texttt{assembled} of an instruction \texttt{i} is found in code memory starting at position \texttt{pc} (the hypothesis \texttt{encoding\_check} \ldots), when we fetch at address \texttt{pc} retrieving the instruction \texttt{i}, the new program counter is \texttt{pc} plus the length of the encoding, and the cost of the fetched instruction is the one predicted for \texttt{i}.
473Or, in plainer words, assembling, storing and then immediately fetching gets you back to where you started.
475Remembering that \texttt{assembly\_1\_pseudo\_instruction} is the composition of \texttt{assembly1} with \texttt{expand\_pseudo\_instruction}, we can lift the previous result from instructions (already expanded) to pseudoinstructions (to be expanded):
477lemma fetch_assembly_pseudo:
478 $\forall$program: pseudo_assembly_program.
479 $\forall$policy,ppc,code_memory.
480 let $\langle$preamble, instr_list$\rangle$ := program in
481 let pi := $\pi_1$ (fetch_pseudo_instruction instr_list ppc) in
482 let pc := policy ppc in
483 let instructions := expand_pseudo_instruction policy ppc pi in
484 let $\langle$l, a$\rangle$ := assembly_1_pseudoinstruction policy ppc pi in
485 let pc_plus_len := pc + l in
486  encoding_check code_memory pc pc_plus_len a $\rightarrow$
487   fetch_many code_memory pc_plus_len pc instructions.
489Here, \texttt{l} is the number of machine code instructions the pseudoinstruction at hand has been expanded into.
490We assemble a single pseudoinstruction with \texttt{assembly\_1\_pseudoinstruction}, which internally calls \texttt{expand\_pseudo\_instruction}.
491The function \texttt{fetch\_many} fetches multiple machine code instructions from code memory and performs some routine checks.
493Intuitively, Lemma \texttt{fetch\_assembly\_pseudo} says that expanding a pseudoinstruction into $n$ instructions, encoding the instructions and immediately fetching $n$ instructions back yield exactly the expansion.
495Combining \texttt{assembly\_ok} with the previous lemma and a proof of correctness of loading object code in memory, we finally get correctness of the assembler with respect to fetching:
497lemma fetch_assembly_pseudo2:
498 $\forall$program.  $\mid$snd program$\mid$ $\leq$ $2^{16}$ $\rightarrow$
499 $\forall$policy.  policy is correct for program $\rightarrow$
500 $\forall$ppc. ppc < $\mid$snd program$\mid$ $\rightarrow$
501  let $\langle$assembled, costs'$\rangle$ := $\pi_1$ (assembly program policy) in
502  let cmem := load_code_memory assembled in
503  let $\langle$pi, newppc$\rangle$ := fetch_pseudo_instruction program ppc in
504  let instructions := expand_pseudo_instruction policy ppc pi in
505    fetch_many cmem (policy newppc) (policy ppc) instructions.
507Here we use $\pi_1$ to project the existential witness from the Russell-typed function \texttt{assembly}.
508We read \texttt{fetch\_assembly\_pseudo2} as follows.
509Suppose we are given an assembly program which can be addressed by a 16-bit word and a policy that is correct for this program.
510Suppose we are able to successfully assemble an assembly program using \texttt{assembly} and produce a code memory, \texttt{cmem}.
511Then, fetching a pseudoinstruction from the pseudo-code memory stored in the interval $[ppc,newppc]$ corresponds to fetching a sequence of instructions from the real code memory, stored in the interval $[policy(ppc),policy(ppc+1)]$.
512The correspondence is precise: the fetched instructions are exactly those obtained expanding the pseudoinstruction according to policy.
514In order to complete the proof of correctness of the assembler, we need to prove that each pseudoinstruction is simulated by the execution of its expansion (correctness with respect to execution).
515In general this is not the case when instructions freely manipulate program addresses.
516Characterising well-behaved programs and proving correctness with respect to expansion is discussed next.
518% ---------------------------------------------------------------------------- %
519% SECTION                                                                      %
520% ---------------------------------------------------------------------------- %
521\subsection{Correctness for `well-behaved' assembly programs}
523Most assemblers can map a single pseudoinstruction to zero or more machine instructions, whose size (in bytes) is not independent of the expansion.
524The assembly process therefore always produces a map (which for us is just the policy) that associates to each assembly address \texttt{a} a code memory address~\texttt{policy(a)} where the instructions that correspond to the pseudoinstruction at \texttt{a} are located.
525Ordinarily, the map is not just a linear function, but depends on the local choices and global optimisations performed.
527During execution of assembly code, addresses can be stored in memory locations or in the registers.
528Moreover, arithmetical operations can be applied to addresses, for example to compare them or to shift a function pointer in order to implement C \texttt{switch} statements.
529In order to show that the object code simulates the assembly code we must compute the processor status that corresponds to the assembly status.
530In particular, those \texttt{a} in memory that are used as data should be preserved as \texttt{a}, but those used as addresses should be changed into \texttt{policy(a)}.
531Moreover, every arithmetic operation should commute with \texttt{policy} in order for the semantics to be preserved.
533Following the previous observation, we can ask if it is possible at all for an assembler to preserve the semantics of an assembly program.
534The traditional approach to the verification of assemblers answers the question in the affirmative by restricting the semantics of assembly programs.
535In particular, the type of memory cells and registers is set to the disjoint union of data and symbolic addresses, and the semantics is always forced to consider all possible combinations of arguments (data vs.\ data, data vs. addresses, and so on), rejecting operations whose semantics cannot be preserved.
537\mathtt{Mem} : \mathtt{Addr} \rightarrow \mathtt{Bytes} + \mathtt{Addr} \qquad \llbracket - \rrbracket : \mathtt{Instr} \rightarrow \mathtt{Mem} \rightarrow \mathtt{option\ Mem}
540\llbracket \mathtt{MUL\ @A1\ @A2} \rrbracket^\mathtt{M} = \begin{cases}
541                                                              \mathtt{Byte\ b1},\ \mathtt{Byte\ b2} & \rightarrow \mathtt{Some}(\mathtt{M}\ \text{with accumulator :=}\ \mathtt{b1} + \mathtt{b2}) \\
542                                                              -,\ \mathtt{Addr\ a} & \rightarrow \mathtt{None} \\
543                                                              \mathtt{Addr\ a},\ - & \rightarrow \mathtt{None}
544                                                            \end{cases}
546This approach has two main limitations.
547The first one is that it does not assign any semantics to interesting programs that could intentionally mangle addresses for malign (e.g. viruses) or benign (e.g. operating systems) purposes.
548The second is that it does not allow one to adequately share the semantics of assembly pseudoinstructions and object code instructions: only the \texttt{Byte-Byte} branch above can share the semantics with the object code \texttt{MUL}.
550In this paper we have already taken a different approach from Sect.~\ref{subsect.assembly.code.semantics}, where we have assigned a semantics to every assembly program by not distinguishing at all between data and symbolic addresses.
551Memory cells and registers always hold bytes, and symbolic labels are mapped to absolute addresses before execution.
552Consequently we do not expect that all assembly programs will have their semantics respected by object code.
553We call those programs that do \emph{well-behaved}.
554Further, we can now reason over the semantics of programs that are not well-behaved, and that we can handle well-behavedness as an open predicate, recognising more and more good behaviours as required.
555Naturally, compilers that target our assembler will need to produce well-behaved programs, which is usually the case by construction.
557The definition of well-behavedness we employ uses a map to keep track of the memory locations and registers that hold addresses during execution of an assembly program.
558The map acts as a sort of dynamic typing system sitting atop memory.
559This approach seems similar to one taken by Tuch \emph{et al}~\cite{tuch:types:2007} for reasoning about low-level C code.
561The semantics of an assembly program is then augmented with a function that at each execution step updates the map, signalling an error when the program performs an ill-behaved operation.
562The actual computation is not performed by this mechanism, being already part of the assembly semantics.
564\mathtt{AddrMap} : \mathtt{Addr} \rightarrow \{Data,Addr\} \qquad \llbracket - \rrbracket : \mathtt{Instr} \rightarrow \mathtt{AddrMap} \rightarrow \mathtt{option\ AddrMap}
567\llbracket \mathtt{MUL\ @A1\ @A2} \rrbracket^\mathtt{M} = \begin{cases}
568                                                              \mathtt{Data},\ \mathtt{Data} & \rightarrow Some(M \text{with accumulator :=} \mathtt{Data})\\
569                                                              -,\ \mathtt{Addr\ a} & \rightarrow \mathtt{None} \\
570                                                              \mathtt{Addr\ a},\ - & \rightarrow \mathtt{None}
571                                                            \end{cases}
573To prove semantic preservation we must associate an object code status to each assembly pseudostatus.
574This operation is driven by the current \texttt{AddrMap}: if at address \texttt{a} the assembly level memory holds \texttt{d}, then if \texttt{AddrMap(a) = Data} the object code memory will hold \texttt{d} (data is preserved), otherwise it will hold \texttt{policy(d)}.
575If all the operations accepted by the address update map are well-behaved, this is sufficient to show preservation of the semantics for those computation steps that are well-behaved, i.e. such that the map update does not fail.
577We now apply the previous idea to the MCS-51, an 8-bit processor whose code memory is word addressed.
578All MCS-51 operations can therefore only manipulate and store one half of the address at a time (lower or higher bits).
579For instance, a memory cell could contain just the lower 8 bits of an address \texttt{a}.
580The corresponding cell at object code level must therefore hold the lower 8 bits of \texttt{policy(a)}, which can be computed only if we can also retrieve the higher 8 bits of \texttt{a}.
581We achieve this by storing the missing half of an address in the \texttt{AddrMap} --- called \texttt{internal\_pseudo\_address\_map} in the formalisation.
583definition address_entry := upper_lower $\times$ Byte.
585definition internal_pseudo_address_map :=
586  (BitVectorTrie address_entry 7) $\times$ (BitVectorTrie address_entry 7)
587    $\times$ (option address_entry).
589Here, \texttt{upper\_lower} is an inductive type with two constructors: \texttt{Upper} and \texttt{Lower}.
590The map consists of three components to track addresses in lower and upper internal ram and also in the accumulator \texttt{A}.
591If an assembly address \texttt{a} holds \texttt{h} and if the current \texttt{internal\_pseudo\_address\_map} maps \texttt{a} to \texttt{$\langle$ Upper, l$\rangle$}, then \texttt{h} is the upper part of the \texttt{h$\cdot$l} address and \texttt{a} will hold the upper part of \texttt{policy(h$\cdot$l)} in the object code status.
593The relationship between assembly pseudostatus and object code status is computed by the following function which deterministically maps each pseudostatus into a corresponding status.
594It takes in input the policy and both the current pseudostatus and the current tracking map in order to identify those memory cells and registers that hold fragments of addresses to be mapped using \texttt{policy} as previously explained.
595It also calls the assembler to replace the code memory of the assembly status (i.e. the assembly program) with the object code produced by the assembler.
597definition status_of_pseudo_status:
598 internal_pseudo_address_map $\rightarrow$ $\forall$pap. $\forall$ps: PseudoStatus pap.
599 $\forall$policy. Status (code_memory_of_pseudo_assembly_program pap policy)
601The function that implements the tracking map update, previously denoted by $\llbracket - \rrbracket$, is called \texttt{next\_internal\_pseudo\_address\_map} in the formalisation.
602For the time being, we accept as good behaviours address copying amongst memory cells and the accumulator (\texttt{MOV} pseudoinstruction) and the use of the \texttt{CJNE} conditional jump that compares two addresses and jumps to a given label if the two labels are equal.
603Moreover, \texttt{RET} to return from a function call is well-behaved iff the lower and upper parts of the return address, fetched from the stack, are both marked as complementary parts of the same address (i.e. \texttt{h} is tracked as \texttt{$\langle$Upper,l$\rangle$} and \texttt{l} is tracked as \texttt{$\langle$Lower,h$\rangle$}.
604These three operations are sufficient to implement the backend of the CerCo compiler.
605Other good behaviours could be recognised in the future, for instance in order to implement the C branch statement efficiently.
607definition next_internal_pseudo_address_map: internal_pseudo_address_map $\rightarrow$
608 $\forall$cm. (Identifier $\rightarrow$ PseudoStatus cm $\rightarrow$ Word) $\rightarrow$ $\forall$s: PseudoStatus cm.
609   program_counter s < $2^{16}$ $\rightarrow$ option internal_pseudo_address_map
611We now state the (simplified) statement of correctness of our compiler, whose proofs combines correctness with respect to fetching and correctness with respect to execution.
612It states that the well-behaved execution of a single assembly pseudoinstruction according to the cost model induced by compilation is correctly simulated by the execution of (possibly) many machine code instructions.
614theorem main_thm:
615 $\forall$M, M': internal_pseudo_address_map.
616 $\forall$program: pseudo_assembly_program.
617 $\forall$program_in_bounds: $\mid$program$\mid$ $\leq$ $2^{16}$.
618 $\forall$policy. policy is correct for program.
619 $\forall$ps: PseudoStatus program. ps < $\mid$program$\mid$.
620  next_internal_pseudo_address_map M program ... = Some M' $\rightarrow$
621   $\exists$n. execute n (status_of_pseudo_status M ps policy) =
622    status_of_pseudo_status M'
623     (execute_1_pseudo_instruction program (ticks_of program policy) ps)
624     policy.
626The statement is standard for forward simulation, but restricted to \texttt{PseudoStatuses} \texttt{ps} whose tracking map is \texttt{M} and who are well-behaved according to \texttt{internal\_pseudo\_address\_map} \texttt{M}.
627The \texttt{ticks\_of program policy} function returns the costing computed by assembling the \texttt{program} using the given \texttt{policy}.
628An obvious corollary of \texttt{main\_thm} is the correct simulation of $n$ well-behaved steps by some number of steps $m$, where each step must be well-behaved with respect to the tracking map returned by the previous step.
630% ---------------------------------------------------------------------------- %
631% SECTION                                                                      %
632% ---------------------------------------------------------------------------- %
636We are proving the correctness of an assembler for MCS-51 assembly language.
637Our assembly language features labels, arbitrary conditional and unconditional jumps to labels, global data and instructions for moving this data into the MCS-51's single 16-bit register.
638Expanding these pseudoinstructions into machine code instructions is not trivial, and the proof that the assembly process is `correct', in that the semantics of a subset of assembly programs are not changed is complex.
640The formalisation is a component of CerCo which aims to produce a verified concrete complexity preserving compiler for a large subset of the C language.
641The verified assembler, complete with the underlying formalisation of the semantics of MCS-51 machine code, will form the bedrock layer upon which the rest of CerCo will build its verified compiler platform.
643We may compare our work to an `industrial grade' assembler for the MCS-51: SDCC~\cite{sdcc:2011}, the only open source C compiler that targets the MCS-51 instruction set.
644It appears that all pseudojumps in SDCC assembly are expanded to \texttt{LJMP} instructions, the worst possible jump expansion policy from an efficiency point of view.
645Note that this policy is the only possible policy \emph{in theory} that makes every assembly program well-behaved, preserving its the semantics during the assembly process. This comes at the expense of assembler completeness as the generated program may be too large for code memory, there being a trade-off between the completeness of the assembler and the efficiency of the assembled program.
646The definition and proof of a terminating, correct jump expansion policy is described elsewhere~\cite{boender:correctness:2012}.
648Verified assemblers could also be applied to the verification of operating system kernels and other formalised compilers.
649For instance the verified seL4 kernel~\cite{klein:sel4:2009}, CompCert~\cite{leroy:formally:2009} and CompCertTSO~\cite{sevcik:relaxed-memory:2011} all explicitly assume the existence of trustworthy assemblers.
650The fact that an optimising assembler cannot preserve the semantics of all assembly programs may have consequences for these projects.
652Our formalisation exploits dependent types in different ways and for multiple purposes.
653The first purpose is to reduce potential errors in the formalisation of the microprocessor.
654Dependent types are used to constrain the size of bitvectors and tries that represent memory quantities and memory areas respectively.
655They are also used to simulate polymorphic variants in Matita, in order to provide precise typings to various functions expecting only a subset of all possible addressing modes that the MCS-51 offers.
656Polymorphic variants nicely capture the absolutely unorthogonal instruction set of the MCS-51 where every opcode must accept its own subset of the 11 addressing mode of the processor.
658The second purpose is to single out sources of incompleteness.
659By abstracting our functions over the dependent type of correct policies, we were able to manifest the fact that the compiler never refuses to compile a program where a correct policy exists.
660This also allowed to simplify the initial proof by dropping lemmas establishing that one function fails if and only if some previous function does so.
662Finally, dependent types, together with Matita's liberal system of coercions, allow us to simulate almost entirely in user space the proof methodology `Russell' of Sozeau~\cite{sozeau:subset:2006}.
663Not every proof has been carried out in this way: we only used this style to prove that a function satisfies a specification that only involves that function in a significant way.
664It would not be natural to see the proof that fetch and assembly commute as the specification of one of the two functions.
665\paragraph{Related work}
666%\subsection{Related work}
668% piton
669We are not the first to consider the correctness of an assembler for a non-trivial assembly language.
670The most impressive piece of work in this domain is Piton~\cite{moore:piton:1996}, a stack of verified components, written and verified in ACL2, ranging from a proprietary FM9001 microprocessor verified at the gate level, to assemblers and compilers for two high-level languages---Lisp and $\mu$Gypsy~\cite{moore:grand:2005}.
671% jinja
672Klein and Nipkow also provide a compiler, virtual machine and operational semantics for the Jinja~\cite{klein:machine:2006} language and prove that their compiler is semantics and type preserving.
674Though other verified assemblers exist what sets our work apart from that above is our attempt to optimise the generated machine code.
675This complicates a formalisation as an attempt at the best possible selection of machine instructions must be made---especially important on devices with limited code memory.
676Care must be taken to ensure that the time properties of an assembly program are not modified by assembly lest we affect the semantics of any program employing the MCS-51's I/O facilities.
677This is only possible by inducing a cost model on the source code from the optimisation strategy and input program.
681Our source files are available at~\url{}.
682We assumed several properties of `library functions', e.g. modular arithmetic and datastructure manipulation.
683We axiomatised various small functions needed to complete the main theorems, as well as some `routine' proof obligations of the theorems themselves, in focusing on the main meat of the theorems.
684We believe that the proof strategy is sound and that all axioms can be closed, up to minor bugs that should have local fixes that do not affect the global proof strategy.
686The complete development is spread across 29 files with around 20,000 lines of Matita source.
687Relevant files are: \texttt{}, \texttt{} and \texttt{}, consisting of approximately 4500 lines of Matita source.
688Numerous other lines of proofs are spread all over the development because of dependent types and the Russell proof style, which does not allow one to separate the code from the proofs.
689The low ratio between source lines and the number of lines of proof is unusual, but justified by the fact that the pseudo-assembly and the assembly language share most constructs and large swathes of the semantics are shared.
Note: See TracBrowser for help on using the repository browser.