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37\title{On the correctness of an optimising assembler for the Intel MCS-51 microprocessor\thanks{The project CerCo acknowledges the financial support of the Future and Emerging Technologies (FET) programme within the Seventh Framework Programme for Research of the European Commission, under FET-Open grant number: 243881.}}
38\author{Dominic P. Mulligan \and Claudio Sacerdoti Coen}
39\institute{Dipartimento di Scienze dell'Informazione,\\ Universit\'a degli Studi di Bologna}
40
41\bibliographystyle{splncs03}
42
43\begin{document}
44
45\maketitle
46
47\begin{abstract}
48We present a proof of correctness in Matita for an optimising assembler for the MCS-51 microcontroller.
49The efficient expansion of pseudoinstructions, namely jumps, into machine instructions is complex.
50We isolate the decision making over how jumps should be expanded from the expansion process itself as much as possible using `policies', making the proof of correctness for the assembler more straightforward.
51
52%We observe that it is impossible for an optimising assembler to preserve the semantics of every assembly program.
53%Assembly language programs can manipulate concrete addresses in arbitrary ways.
54Our proof strategy contains a tracking facility for `good addresses' and only programs that use good addresses have their semantics preserved under assembly, as we observe that it is impossible for an assembler to preserve the semantics of every assembly program.
55Our strategy offers increased flexibility over the traditional approach to proving the correctness of assemblers, wherein addresses in assembly are kept opaque and immutable.
56In particular, we may experiment with allowing the benign manipulation of addresses.
57\keywords{Verified software, CerCo (Certified Complexity), MCS-51 microcontroller, Matita proof assistant}
58\end{abstract}
59
60% ---------------------------------------------------------------------------- %
61% SECTION                                                                      %
62% ---------------------------------------------------------------------------- %
63\section{Introduction}
64\label{sect.introduction}
65
66We consider the formalisation of an assembler for the Intel MCS-51 8-bit microprocessor in the Matita proof assistant~\cite{asperti:user:2007}.
67This formalisation forms a major component of the EU-funded CerCo (`Certified Complexity') project~\cite{cerco:2011}, concerning the construction and formalisation of a concrete complexity preserving compiler for a large subset of the C programming language.
68
69The MCS-51 dates from the early 1980s and is commonly called the 8051/8052.
70Derivatives are still widely manufactured by a number of semiconductor foundries, with the processor being used especially in embedded systems.
71
72The MCS-51 has a relative paucity of features compared to its more modern brethren, with the lack of any caching or pipelining features meaning that timing of execution is predictable, making the MCS-51 very attractive for CerCo's ends.
73However, the MCS-51's paucity of features---though an advantage in many respects---also quickly becomes a hindrance, as the MCS-51 features a relatively minuscule series of memory spaces by modern standards.
74As a result our C compiler, to be able to successfully compile realistic programs for embedded devices, ought to produce `tight' machine code.
75
76To do this, we must solve the `branch displacement' problem---deciding how best to expand pseudojumps to labels in assembly language to machine code jumps.
77The branch displacement problem arises when pseudojumps can be expanded
78in different ways to real machine instructions, but the different expansions
79are not equivalent (e.g. differ in size or speed) and not always
80correct (e.g. correctness is only up to global constraints over the compiled
81code). For instance, some jump instructions (short jumps) are very small
82and fast, but they can only reach destinations within a
83certain distance from the current instruction. When the destinations are
84too far away, larger and slower long jumps must be used. The use of a long jump may
85augment the distance between another pseudojump and its target, forcing
86another long jump use, in a cascade. The job of the optimising
87compiler (assembler) is to individually expand every pseudo-instruction in such a way
88that all global constraints are satisfied and that the compiled program
89is minimal in size and faster in concrete time complexity.
90This problem is known to be computationally hard for most CISC architectures (see~\cite{hyde:branch:2006}).
91
92To simplify the CerCo C compiler we have chosen to implement an optimising assembler whose input language the compiler will target.
93Labels, conditional jumps to labels, a program preamble containing global data and a \texttt{MOV} instruction for moving this global data into the MCS-51's one 16-bit register all feature in our assembly language.
94We further simplify by ignoring linking, assuming that all our assembly programs are pre-linked.
95
96Another complication we have addressed is that of the cost model.
97CerCo imposes a cost model on C programs or, more specifically, on simple blocks of instructions.
98This cost model is induced by the compilation process itself, and its non-compositional nature allows us to assign different costs to identical C statements depending on how they are compiled.
99In short, we aim to obtain a very precise costing for a program by embracing the compilation process, not ignoring it.
100At the assembler level, this is reflected by our need to induce a cost
101model on the assembly code as a function of the assembly program and the
102strategy used to solve the branch displacement problem. In particular, our
103optimising assembler should also return a map that assigns a cost (in clock
104cycles) to every instruction in the source program. We expect the induced cost
105to be preserved by the assembler: we will prove that the compiled code
106tightly simulates the source code by taking exactly the predicted amount of
107time.
108
109Note that the temporal tightness of the simulation is a fundamental prerequisite
110of the correctness of the simulation because some functions of the MCS-51---timers and I/O---depend on the microprocessor's clock.
111If the pseudo- and concrete clock differ the result of an I/O operation may not be preserved.
112
113Branch displacement algorithms must have a deep knowledge of the way
114the rest of the assembler works in order to build globally correct solutions.
115Proving their correctness is quite a complex task (see, for instance,
116the compaion paper~\cite{boender:correctness:2012}).
117Nevertheless, the correctness of the whole assembler only depends on the
118correctness of the branch displacement algorithm.
119Therefore, in the rest of the paper, we presuppose the
120existence of a correct policy, to be computed by a branch displacement
121algorithm if it exists. A policy is the decision over how
122any particular jump should be expanded; it is correct when the global
123constraints are satisfied.
124The assembler fails to assemble an assembly program if and only if a correct policy does not exist.
125This is stated in an elegant way in the dependent type of the assembler: the assembly function is total over a program, a policy and the proof that the policy is correct for that program.
126
127A final complication in the proof is due to the kind of semantics associated to pseudo-assembly programs.
128Should assembly programs be allowed to freely manipulate addresses?
129The traditional answer is `no': values stored in memory or registers are either
130concrete data or symbolic addresses. The latter can only be manipulated
131in very restricted ways and programs that do not do so are not assigned a semantics and cannot be reasoned about.
132All programs that have a semantics have it preserved by the assembler.
133We take an alternative approach, allowing programs to freely
134manipulate addresses non-symbolically but only granting a preservation of semantics
135to those programs that act in `well-behaved' ways.
136In principle, this should allow some reasoning on the actual semantics of malign programs.
137In practice, we note how our approach facilitates more code reuse between the semantics of assembly code and object code.
138
139The formalization of the assembler and its correctness proof are given in Section~\ref{sect.the.proof}. Section~\ref{sect.matita} provides a brief introduction
140to the syntax of Matita. Section~\ref{sect.conclusions} presents the conclusions and relations with previous work.
141
142% ---------------------------------------------------------------------------- %
143% SECTION                                                                      %
144% ---------------------------------------------------------------------------- %
145\section{Matita}
146\label{sect.matita}
147Matita is a proof assistant based on a variant of the Calculus of (Co)inductive Constructions~\cite{asperti:user:2007}.
148It features dependent types that we exploit in the formalisation.
149The (simplified) syntax of the statements and definitions in the paper should be self-explanatory.
150Pairs are denoted with angular brackets, $\langle-, -\rangle$.
151
152Matita features a liberal system of coercions.
153It is possible to define a uniform coercion $\lambda x.\langle x,?\rangle$ from every type $T$ to the dependent product $\Sigma x:T.P~x$.
154The coercion opens a proof obligation that asks the user to prove that $P$ holds for $x$.
155When a coercion must be applied to a complex term (a $\lambda$-abstraction, a local definition, or a case analysis), the system automatically propagates the coercion to the sub-terms
156 For instance, to apply a coercion to force $\lambda x.M : A \to B$ to have type $\forall x:A.\Sigma y:B.P~x~y$, the system looks for a coercion from $M: B$ to $\Sigma y:B.P~x~y$ in a context augmented with $x:A$.
157This is significant when the coercion opens a proof obligation, as the user will be presented with multiple, but simpler proof obligations in the correct context.
158In this way, Matita supports the `Russell' proof methodology developed by Sozeau in~\cite{sozeau:subset:2006}, with an implementation that is lighter and more tightly integrated with the system than that of Coq.
159
160% ---------------------------------------------------------------------------- %
161% SECTION                                                                      %
162% ---------------------------------------------------------------------------- %
163\section{Certification of an optimizing assembler}
164\label{sect.the.proof}
165
166Our aim here is to explain the main ideas and steps of the certified proof of correctness for an optimising assembler for the MCS-51.
167
168In Subsect.~\ref{subsect.machine.code.semantics} we sketch an operational semantics (a realistic and efficient emulator) for the MCS-51.
169We also introduce a syntax for decoded instructions that will be reused for the assembly language.
170
171In Subsect.~\ref{subsect.assembly.code.semantics} we describe the assembly language and its operational semantics.
172The latter is parametric in the cost model that will be induced by the assembler, reusing the semantics of the machine code on all `real' instructions.
173
174Branch displacement policies are introduced in Subsect.~\ref{subsect.the.assembler} where we also describe the assembler as a function over policies as previously described.
175
176To prove our assembler correct we show that the object code given in output, together with a cost model for the source program, simulates the source program executed using that cost model.
177The proof can be divided into two main lemmas.
178The first is correctness with respect to fetching, described in Subsect.~\ref{subsect.total.correctness.of.the.assembler}.
179Roughly it states that a step of fetching at the assembly level, returning the decoded instruction $I$, is simulated by $n$ steps of fetching at the object level that returns instructions $J_1,\ldots,J_n$, where $J_1,\ldots,J_n$ is, amongst the possible expansions of $I$, the one picked by the policy.
180The second lemma states that $J_1,\ldots,J_n$ simulates $I$ but only if $I$ is well-behaved, i.e. manipulates addresses in `good' ways.
181To keep track of well-behaved address manipulations we record where addresses are currently stored (in memory or an accumulator).
182We introduce a dynamic checking function that inspects this map to determine if the operation is well-behaved, with an affirmative answer being the pre-condition of the lemma.
183The second lemma is detailed in Subsect.~\ref{subsect.total.correctness.for.well.behaved.assembly.programs} where we also establish correctness of our assembler as a composition of the two lemmas: programs that are well-behaved when executed under the cost model induced by the compiler are correctly simulated by the compiled code.
184
185% ---------------------------------------------------------------------------- %
186% SECTION                                                                      %
187% ---------------------------------------------------------------------------- %
188
189\subsection{Machine code and its semantics}
190\label{subsect.machine.code.semantics}
191
192We implemented a realistic and efficient emulator for the MCS-51 microprocessor.
193An MCS-51 program is just a sequence of bytes stored in the read-only code
194memory of the processor, represented as a compact trie of bytes addressed
195by the program counter.
196The \texttt{Status} of the emulator is
197a record that contains the microprocessor's program counter, registers, stack
198pointer, clock, special function registers, data memory, and so on.
199The value of the code memory is a parameter of the record since it is not
200changed during execution.
201
202The \texttt{Status} records is itself an instance of a more general
203datatype \texttt{PreStatus} that abstracts over the implementation of code
204memory in order to reuse the same datatype for the semantics of the assembly
205language in the next section.
206
207The execution of a single instruction is performed by the \texttt{execute\_1}
208function, parametric over the content \texttt{cm} of the code memory:
209\begin{lstlisting}
210definition execute_1: $\forall$cm. Status cm $\rightarrow$ Status cm
211\end{lstlisting}
212
213The function \texttt{execute\_1} closely matches the fetch-decode-execute
214cycle of the MCS-51 hardware, as described by a Siemen's manufacturer's data sheet~\cite{siemens:2011}.
215Fetching and decoding are performed simultaneously:
216we first fetch, using the program counter, from code memory the first byte of the instruction to be executed, decoding the resulting opcode, fetching more bytes as is necessary to decode the arguments.
217Decoded instructions are represented by the \texttt{instruction} data type
218which extends a data type of \texttt{preinstruction}s that will be reused
219for the assembly language.
220\begin{lstlisting}
221inductive preinstruction (A: Type[0]): Type[0] :=
222 | ADD: $\llbracket$acc_a$\rrbracket$ → $\llbracket$registr; direct; indirect; data$\rrbracket$ $\rightarrow$ preinstruction A
223 | DEC: $\llbracket$acc_a; registr; direct; indirect$\rrbracket$ $\rightarrow$ preinstruction A
224 | JB: $\llbracket$bit_addr$\rrbracket$ $\rightarrow$ A $\rightarrow$ preinstruction A
225 | ...
226
227inductive instruction: Type[0] :=
228 | LCALL: $\llbracket$addr16$\rrbracket$ $\rightarrow$ instruction
229 | AJMP: $\llbracket$addr11$\rrbracket$ $\rightarrow$ instruction
230 | RealInstruction: preinstruction $\llbracket$relative$\rrbracket$ $\rightarrow$ instruction.
231 | ...
232\end{lstlisting}
233The MCS-51 has many operand modes, but an unorthogonal instruction set: every
234opcode is only enable for a finite subset of the possible operand modes.
235Here we exploit dependent types and an implicit coercion to synthesize
236the type of arguments of opcodes from a vector of names of operand modes.
237For example, \texttt{ACC} has two operands, the first one constrained to be
238the \texttt{A} accumulator, and the second one to be a disjoint union of
239register, direct, indirect and data operand modes.
240
241The parameterised type $A$ of \texttt{preinstruction} represents the addressing mode allowed for conditional jumps; in the \texttt{RealInstruction} constructor
242we constraint it to be a relative offset.
243A different instantiation (labels) will be used in the next section for assembly programs.
244
245Once decoded, execution proceeds by a case analysis on the decoded instruction, following the operation of the hardware.
246For example, the \texttt{DEC} preinstruction (`decrement') is executed as follows:
247\begin{lstlisting}
248 | DEC addr $\Rightarrow$
249  let s := add_ticks1 s in
250  let $\langle$result, flags$\rangle$ := sub_8_with_carry (get_arg_8 s true addr)
251   (bitvector_of_nat 8 1) false in
252     set_arg_8 s addr result
253\end{lstlisting}
254
255Here, \texttt{add\_ticks1} models the incrementing of the internal clock of the microprocessor; it is a parameter of the semantics of \texttt{preinstruction}s
256that is fixed in the semantics of \texttt{instruction}s according to the
257manufacturer datasheet.
258
259% ---------------------------------------------------------------------------- %
260% SECTION                                                                      %
261% ---------------------------------------------------------------------------- %
262
263\subsection{Assembly code and its semantics}
264\label{subsect.assembly.code.semantics}
265
266An assembly program is a list of potentially labelled pseudoinstructions, bundled with a preamble consisting of a list of symbolic names for locations in data memory (i.e. global variables).
267All preinstructions are pseudoinstructions, but conditional jumps are now
268only allowed to use \texttt{Identifiers} (labels) as their target.
269\begin{lstlisting}
270inductive pseudo_instruction: Type[0] :=
271  | Instruction: preinstruction Identifier $\rightarrow$ pseudo_instruction
272    ...
273  | Jmp: Identifier $\rightarrow$ pseudo_instruction
274  | Call: Identifier $\rightarrow$ pseudo_instruction
275  | Mov: $\llbracket$dptr$\rrbracket$ $\rightarrow$ Identifier $\rightarrow$ pseudo_instruction.
276\end{lstlisting}
277The pseudoinstructions \texttt{Jmp}, \texttt{Call} and \texttt{Mov} are generalisations of machine code unconditional jumps, calls and move instructions respectively, all of whom act on labels, as opposed to concrete memory addresses.
278The object code calls and jumps that act on concrete memory addresses are ruled
279out of assembly programs not being included in the preinstructions (see previous
280Section).
281
282Execution of pseudoinstructions is an endofunction on \texttt{PseudoStatus}.
283A \texttt{PseudoStatus} is an instance of \texttt{PreStatus} that differs
284from a \texttt{Status} only in the datatype used for code memory: a list
285of optionally labelled pseudoinstructions versus a trie of bytes.
286The \texttt{PreStatus} type is crucial for sharing the majority of the
287semantics of the two languages.
288
289Emulation for pseudoinstructions is handled by \texttt{execute\_1\_pseudo\_instruction}:
290\begin{lstlisting}
291definition execute_1_pseudo_instruction:
292 $\forall$cm. $\forall$costing:($\forall$ppc: Word. ppc < $\mid$snd cm$\mid$ $\rightarrow$ nat $\times$ nat).
293  $\forall$s:PseudoStatus cm. program_counter s < $\mid$snd cm$\mid$ $\rightarrow$ PseudoStatus cm
294\end{lstlisting}
295The type of \texttt{execute\_1\_pseudo\_instruction} is more involved than
296that of \texttt{execute\_1}. The first difference is that execution is only
297defined when the program counter points to a valid instruction, i.e.
298it is smaller than the length $\mid$\texttt{snd cm}$\mid$ of the program.
299The second difference is the abstraction over the cost model, abbreviated
300here as \emph{costing}.
301The costing is a function that maps valid program counters to pairs of natural numbers representing the number of clock ticks used by the pseudoinstructions stored at those program counters. For conditional jumps the two numbers differ
302to represent different costs for the `true branch' and the `false branch'.
303In the next section we will see how the optimising
304assembler induces the only costing (induced by the branch displacement policy deciding how to expand pseudojumps) that is preserved by compilation.
305
306Execution proceeds by first fetching from pseudo-code memory using the program counter---treated as an index into the pseudoinstruction list.
307This index is always guaranteed to be within the bounds of the pseudoinstruction list due to the dependent type placed on the function.
308No decoding is required.
309We then proceed by case analysis over the pseudoinstruction, reusing the code for object code for all instructions present in the MCS-51's instruction set.
310For all newly introduced pseudoinstructions, we simply translate labels to concrete addresses before behaving as a `real' instruction.
311
312We do not perform any kind of symbolic execution, wherein data is the disjoint union of bytes and addresses, with addresses kept opaque and immutable.
313Labels are immediately translated before execution to concrete addresses, and registers and memory locations only ever contain bytes, never labels.
314As a consequence, we allow the programmer to mangle, change and generally adjust addresses as they want, under the proviso that the translation process may not be able to preserve the semantics of programs that do this.
315This will be further discussed in Subsect.~\ref{subsect.total.correctness.for.well.behaved.assembly.programs}.
316The only limitation introduced by this approach is that the size of
317assembly programs is bounded by $2^{16}$.
318
319% ---------------------------------------------------------------------------- %
320% SECTION                                                                      %
321% ---------------------------------------------------------------------------- %
322
323\subsection{The assembler}
324\label{subsect.the.assembler}
325The assembler takes in input an assembly program made of pseudoinstructions
326and a branch displacement policy for it.
327It returns both the object code (a list of bytes to be
328loaded in code memory for execution) and the costing for the source.
329
330Conceptually the assembler works in two passes.
331The first pass expands every pseudoinstruction into a list of machine code instructions using the function \texttt{expand\_pseudo\_instruction}. The policy
332determines which expansion among the alternatives will be chosen for
333pseudo-jumps and pseudo-calls. Once the expansion is performed, the cost
334of the pseudoinstruction is defined as the cost of the expansion.
335The second pass encodes as a list of bytes the expanded instruction list by mapping the function \texttt{assembly1} across the list, and then flattening.
336\begin{displaymath}
337\hspace{-0.5cm}
338\mbox{\fontsize{7}{9}\selectfont$[\mathtt{P_1}, \ldots \mathtt{P_n}]$} \underset{\mbox{\fontsize{7}{9}\selectfont$\mathtt{assembly}$}}{\xrightarrow{\left(P_i \underset{\mbox{\fontsize{7}{9}\selectfont$\mathtt{assembly\_1\_pseudo\_instruction}$}}{\xrightarrow{\mathtt{P_i} \xrightarrow{\mbox{\fontsize{7}{9}\selectfont$\mathtt{expand\_pseudo\_instruction}$}} \mathtt{[I^1_i, \ldots I^q_i]} \xrightarrow{\mbox{\fontsize{7}{9}\selectfont$\mathtt{~~~~~~~~assembly1^{*}~~~~~~~~}$}} \mathtt{[0110]}}} \mathtt{[0110]}\right)^{*}}} \mbox{\fontsize{7}{9}\selectfont$\mathtt{[\ldots0110\ldots]}$}
339\end{displaymath}
340In order to understand the type for the policy, we briefly hint at the
341branch displacement problem for the MCS-51. A detailed description is found
342in~\cite{boender:correctness:2012}.
343The MCS-51 features three unconditional jump instructions: \texttt{LJMP} and \texttt{SJMP}---`long jump' and `short jump' respectively---and an 11-bit oddity of the MCS-51, \texttt{AJMP}.
344Each of these three instructions expects arguments in different sizes and behaves in markedly different ways: \texttt{SJMP} may only perform a `local jump' to an address closer then $2^{7}$ bytes; \texttt{LJMP} may jump to any address in the MCS-51's memory space and \texttt{AJMP} may jump to any address in the current memory page. Memory pages partition the code memory into $2^8$ disjoint areas.
345The size of each opcode is different, with long jumps being larger than the
346other two. Because of the presence of \texttt{AJMP}, an optimal global solution
347may be locally unoptimal, employing a long jump where a shorter one could be
348used to force later jumps to stay inside single memory pages.
349
350Similarly, a conditional pseudojump must be translated potentially into a configuration of machine code instructions, depending on the distance to the jump's target.
351For example, to translate a jump to a label, a single conditional jump pseudoinstruction may be translated into a block of three real instructions as follows (here, \texttt{JZ} is `jump if accumulator is zero'):
352{\small{
353\begin{displaymath}
354\begin{array}{r@{\quad}l@{\;\;}l@{\qquad}c@{\qquad}l@{\;\;}l}
355       & \mathtt{JZ}  & \mathtt{label}                      &                 & \mathtt{JZ}   & \text{size of \texttt{SJMP} instruction} \\
356       & \ldots       &                            & \text{translates to}   & \mathtt{SJMP} & \text{size of \texttt{LJMP} instruction} \\
357\mathtt{label:} & \mathtt{MOV} & \mathtt{A}\;\;\mathtt{B}   & \Longrightarrow & \mathtt{LJMP} & \text{address of \textit{label}} \\
358       &              &                            &                 & \ldots        & \\
359       &              &                            &                 & \mathtt{MOV}  & \mathtt{A}\;\;\mathtt{B}
360\end{array}
361\end{displaymath}}}
362Naturally, if \texttt{label} is `close enough', a conditional jump pseudoinstruction is mapped directly to a conditional jump machine instruction; the above translation only applies if \texttt{label} is not sufficiently local.
363
364The cost returned by the assembler for a pseudoinstruction is set to be the
365cost of its expansion in clock cycles. For conditional jumps that are expanded
366as just shown, the costs of takin the true and false branches are different and
367both need to be returned.
368
369%In order to implement branch displacement it is impossible to really make the \texttt{expand\_pseudo\_instruction} function completely independent of the encoding function.
370%This is due to branch displacement requiring the distance in bytes of the target of the jump.
371%Moreover the standard solutions for solving the branch displacement problem find their solutions iteratively, by either starting from a solution where all jumps are long, and shrinking them when possible, or starting from a state where all jumps are short and increasing their length as needed.
372%Proving the correctness of such algorithms is already quite involved and the correctness of the assembler as a whole does not depend on the `quality' of the solution found to a branch displacement problem.
373%For this reason, we try to isolate the computation of a branch displacement problem from the proof of correctness for the assembler by parameterising our \texttt{expand\_pseudo\_instruction} by a `policy'.
374
375The \texttt{expand\_pseudo\_instruction} function is driven by a policy
376in the choice of expansion of pseudoinstructions. The simplest idea
377is then to define policies as functions that maps jumps to their size.
378This simple idea, however, is impractical because short jumps require the
379offset of the target. For instance, suppose that at address \texttt{ppc} in
380the assembly program we found \texttt{Jmp l} such that $l$ is associated to the
381pseudo-address \texttt{a} and the policy wants the \texttt{Jmp} to become a
382\texttt{SJMP $\delta$}. To compute $\delta$, we need to know what the addresses
383\texttt{ppc+1} and \texttt{a} will become in the assembled program to compute
384their difference.
385The address \texttt{a} will be associated to is a function of the expansion
386of all the pseudoinstructions between \texttt{ppc} and \texttt{a}, which is
387still to be performed when expanding the instruction at \texttt{ppc}.
388
389To solve the issue, we define the policy \texttt{policy} as a map
390from a valid pseudo-address to the corresponding address in the assembled
391program.
392Therefore, $\delta$ in the example above can be computed simply as
393\texttt{policy(a) - policy(ppc + 1)}. Moreover, the \texttt{expand\_pseudo\_instruction} emits a \texttt{SJMP} only after verifying for each \texttt{Jmp} that
394$\delta < 128$. When this is not the case, the function emits an
395\texttt{AJMP} if possible, or an \texttt{LJMP} otherwise, therefore always
396picking the locally best solution.
397In order to accomodate those optimal solutions that require local sub-optimal
398choices, the policy may also return a boolean used to force
399the translation of a \texttt{Jmp} into a \texttt{LJMP} even if
400$\delta < 128$. An essentially identical mechanism exists for call
401instructions and conditional jumps.
402
403In order for the translation of a jump to be correct, the address associated to
404\texttt{a} by the policy and by the assembler must coincide. The latter is
405the sum of the size of all the expansions of the pseudo-instructions that
406preceed the one at address \texttt{a}: the assembler just concatenates all
407expansions sequentially. To grant this property, we impose a
408correctness criterion over policies. A policy is correct when
409\texttt{policy(0) = 0} and for all valid pseudoaddresses \texttt{ppc}
410$${\texttt{policy(ppc+1) = policy(ppc) + instruction\_size(ppc)} \leq 2^{16}}$$
411Here \texttt{instruction\_size(ppc)} is the size in bytes of the expansion
412of the pseudoinstruction found at \texttt{pcc}, i.e. the length of
413$\texttt{assembly\_1\_pseudo\_instruction(ppc)}$.
414
415
416% ---------------------------------------------------------------------------- %
417% SECTION                                                                      %
418% ---------------------------------------------------------------------------- %
419\subsection{Correctness of the assembler with respect to fetching}
420\label{subsect.total.correctness.of.the.assembler}
421We now begin the proof of correctness of the assembler.
422Correctness consists of two properties: firstly that the assembly process never fails when fed a correct policy and secondly the object code returned simulates the source code when the latter is executed according to the cost model also returned by the assembler.
423
424The second property above can be further decomposed into two main properties: correctness with respect to fetching and decoding and correctness with respect to execution.
425
426Informally, correctness with respect to fetching is the following statement: when we fetch an assembly pseudoinstruction \texttt{I} at address \texttt{ppc}, then we can fetch the expanded pseudoinstruction(s) \texttt{[J1, \ldots, Jn] = fetch\_pseudo\_instruction \ldots\ I\ ppc} from \texttt{policy ppc} in the code memory obtained by loading the assembled object code.
427This section reviews the main steps to prove correctness with respect to fetching.
428Subsect.~\ref{subsect.total.correctness.for.well.behaved.assembly.programs} deals with correctness with respect to execution: the instructions \texttt{[J1, \ldots, Jn]} simulate the pseudoinstruction~\texttt{I}.
429
430The (slightly simplified) Russell type for the \texttt{assembly} function is:
431\begin{lstlisting}
432definition assembly:
433 $\forall$program: pseudo_assembly_program.  $\forall$policy.
434  $\Sigma$assembled: list Byte $\times$ (BitVectorTrie nat 16).
435   $\mid$program$\mid$ $\leq$ $2^{16}$ $\rightarrow$ policy is correct for program $\rightarrow$
436     policy ($\mid$program$\mid$) = $\mid$fst assembled$\mid$ $\leq$ $2^{16}$ $\wedge$
437     $\forall$ppc: pseudo_program_counter. ppc < $2^{16}$ $\rightarrow$
438       let pseudo_instr := fetch from program at ppc in
439       let assembled_i := assemble pseudo_instr in
440         $\mid$assembled_i$\mid$ $\leq$ $2^{16}$ $\wedge$
441           $\forall$n: nat. n < $\mid$assembled_i$\mid$ $\rightarrow$ $\exists$k: nat.
442             nth assembled_i n = nth assembled (policy ppc + k).
443\end{lstlisting}
444In plain words, the type of \texttt{assembly} states the following.
445Given a correct policy for the program to be assembled, the assembler never fails and returns some object code and a costing function.
446Under the condition that the policy is `correct' for the program and the program is fully addressable by a 16-bit word, the object code is also fully addressable by a 16-bit word.
447Moreover, the result of assemblying the pseudoinstruction obtained fetching from the assembly address \texttt{ppc} is a list of bytes found in the generated object code starting from the object code address \texttt{policy(ppc)}.
448
449Essentially the type above states that the \texttt{assembly} function correctly expands pseudoinstructions, and that the expanded instruction reside consecutively in memory.
450The fundamental hypothesis is correctness of the policy which allows us to prove the inductive step of the proof, which proceeds by induction over the assembly program.
451It is then straightforward to lift the property from lists of bytes (object code) to tries of bytes (i.e. code memories after loading).
452The \texttt{assembly\_ok} lemma does the lifting.
453
454We have established that every pseudoinstruction is compiled to a sequence of bytes that is found in memory at the expect place.
455This does not trivially imply that those bytes will be decoded in a correct way to recover the pseudoinstruction expansion.
456Indeed, we first need to prove a lemma that establishes that the \texttt{fetch} function is the left inverse of the \texttt{assembly1} function:
457\begin{lstlisting}
458lemma fetch_assembly:
459 $\forall$pc: Word.
460 $\forall$i: instruction.
461 $\forall$code_memory: BitVectorTrie Byte 16.
462 $\forall$assembled: list Byte.
463  assembled = assemble i $\rightarrow$
464  let len := $\mid$assembled$\mid$ in
465  let pc_plus_len := pc + len in
466   encoding_check pc pc_plus_len assembled $\rightarrow$
467   let $\langle$instr, pc', ticks$\rangle$ := fetch pc in
468    instr = i $\wedge$ ticks = (ticks_of_instruction instr) $\wedge$ pc' = pc_plus_len.
469\end{lstlisting}
470We read \texttt{fetch\_assembly} as follows.
471Any time the encoding \texttt{assembled} of an instruction \texttt{i} is found in code memory starting at position \texttt{pc} (the hypothesis \texttt{encoding\_check} \ldots), when we fetch at address \texttt{pc} we retrieve the instruction \texttt{i}, the updated program counter is \texttt{pc} plus the length of the encoding, and the cost of the fetched instruction is the one predicted for \texttt{i}.
472Or, in plainer words, assembling, storing and then immediately fetching gets you back to where you started.
473
474Remembering that \texttt{assembly\_1\_pseudo\_instruction} is the composition of \texttt{assembly1} with \texttt{expand\_pseudo\_instruction}, we can lift the previous result from instructions (already expanded) to pseudoinstructions (to be expanded):
475\begin{lstlisting}
476lemma fetch_assembly_pseudo:
477 $\forall$program: pseudo_assembly_program.
478 $\forall$policy,ppc,code_memory.
479 let $\langle$preamble, instr_list$\rangle$ := program in
480 let pi := $\pi_1$ (fetch_pseudo_instruction instr_list ppc) in
481 let pc := policy ppc in
482 let instrs := expand_pseudo_instruction policy ppc pi in
483 let $\langle$l, a$\rangle$ := assembly_1_pseudoinstruction policy ppc pi in
484 let pc_plus_len := pc + l in
485  encoding_check code_memory pc pc_plus_len a $\rightarrow$
486   fetch_many code_memory pc_plus_len pc instructions.
487\end{lstlisting}
488Here, \texttt{l} is the number of machine code instructions the pseudoinstruction at hand has been expanded into.
489We assemble a single pseudoinstruction with \texttt{assembly\_1\_pseudoinstruction}, which internally calls \texttt{expand\_pseudo\_instruction}.
490The function \texttt{fetch\_many} fetches multiple machine code instructions from code memory and performs some routine checks.
491
492Intuitively, Lemma \texttt{fetch\_assembly\_pseudo} says that expanding a pseudoinstruction into $n$ instructions, encoding the instructions and immediately fetching $n$ instructions back yield exactly the expansion.
493
494Combining \texttt{assembly\_ok} with the previous lemma and a proof of correctness of loading object code in memory, we finally get correctness of the assembler with respect to fetching:
495\begin{lstlisting}
496lemma fetch_assembly_pseudo2:
497 $\forall$program.  $\mid$snd program$\mid$ $\leq$ $2^{16}$ $\rightarrow$
498 $\forall$policy.  policy is correct for program $\rightarrow$
499 $\forall$ppc. ppc < $\mid$snd program$\mid$ $\rightarrow$
500  let $\langle$assembled, costs'$\rangle$ := $\pi_1$ (assembly program policy) in
501  let cmem := load_code_memory assembled in
502  let $\langle$pi, newppc$\rangle$ := fetch_pseudo_instruction program ppc in
503  let instructions := expand_pseudo_instruction policy ppc pi in
504    fetch_many cmem (policy newppc) (policy ppc) instructions.
505\end{lstlisting}
506Here we use $\pi_1$ to project the existential witness from the Russell-typed function \texttt{assembly}.
507We read \texttt{fetch\_assembly\_pseudo2} as follows.
508Suppose we are given an assembly program which can be addressed by a 16-bit word and a policy that is correct for this program.
509Suppose we are able to successfully assemble an assembly program using \texttt{assembly} and produce a code memory, \texttt{cmem}.
510Then, fetching a pseudoinstruction from the pseudo-code memory stored in the interval $[ppc,newppc]$ corresponds to fetching a sequence of instructions from the real code memory, stored in the interval $[policy(ppc),policy(ppc+1)]$.
511The correspondence is precise: the fetched instructions are exactly those obtained expanding the pseudoinstruction according to policy.
512
513In order to complete the proof of correctness of the assembler, we need to prove that each pseudoinstruction is simulated by the execution of its expansion (correctness with respect to execution).
514In general this is not the case when instructions freely manipulate program addresses.
515Characterising well-behaved programs and proving correctness with respect to expansion is discussed next.
516
517% ---------------------------------------------------------------------------- %
518% SECTION                                                                      %
519% ---------------------------------------------------------------------------- %
520\subsection{Correctness for `well-behaved' assembly programs}
521\label{subsect.total.correctness.for.well.behaved.assembly.programs}
522
523The traditional approach to verifying the correctness of an assembler is to
524restrict the semantics of assembly code to treat memory addresses as opaque
525(symbolic) structures that cannot be modified.
526Memory is represented as a map from opaque addresses to the disjoint union of data and opaque addresses---addresses are kept opaque to prevent their possible `semantics breaking' manipulation by assembly programs:
527\begin{displaymath}
528\mathtt{Mem} : \mathtt{Addr} \rightarrow \mathtt{Bytes} + \mathtt{Addr} \qquad \llbracket - \rrbracket : \mathtt{Instr} \rightarrow \mathtt{Mem} \rightarrow \mathtt{option\ Mem}
529\end{displaymath}
530Similarly, registers may contain either data or opaque addresses.
531
532The semantics of a pseudoinstruction, $\llbracket - \rrbracket$, is given as a possibly failing function from pseudoinstructions and memory spaces (pseudostatuses to be more precise) to new memory spaces. The semantic function proceeds by case analysis over the operands of a given instruction, failing if either operand is an opaque address and the operation is meaningless on it.
533\begin{gather*}
534\llbracket \mathtt{MUL\ @A1\ @A2} \rrbracket^\mathtt{M} = \begin{cases}
535                                                              \mathtt{Byte\ b1},\ \mathtt{Byte\ b2} & \rightarrow \mathtt{Some}(\mathtt{M}\ \text{with}\ \mathtt{b1} + \mathtt{b2}) \\
536                                                              -,\ \mathtt{Addr\ a} & \rightarrow \mathtt{None} \\
537                                                              \mathtt{Addr\ a},\ - & \rightarrow \mathtt{None}
538                                                            \end{cases}
539\end{gather*}
540In this paper we take a different approach, tracing memory locations (and accumulators) that contain memory addresses.
541We prove that only those assembly programs that use addresses in `safe' ways have their semantics preserved by the assembly process---a sort of dynamic type system sitting atop memory.
542In principle this approach allows us to introduce some permitted \emph{benign} manipulations of addresses that the traditional approach cannot handle, therefore expanding the set of input programs that can be assembled correctly.
543This approach seems similar to one taken by Tuch \emph{et al}~\cite{tuch:types:2007} for reasoning about low-level C code.
544
545Our analogue of the semantic function above is merely a wrapper around the function that implements the semantics of machine code, paired with a function that keeps track of addresses.
546The semantics of pseudo- and machine code are then essentially shared.
547The only thing that changes at the assembly level is the presence of the new tracking function.
548
549However, with this approach we must detect (at run time) programs that manipulate addresses in well-behaved ways, according to some approximation of well-behavedness.
550We use an \texttt{internal\_pseudo\_address\_map} to trace addresses of code memory addresses in internal RAM:
551\begin{lstlisting}
552definition address_entry := upper_lower $\times$ Byte.
553
554definition internal_pseudo_address_map :=
555  (BitVectorTrie address_entry 7) $\times$ (BitVectorTrie address_entry 7)
556    $\times$ (option address_entry).
557\end{lstlisting}
558Here, \texttt{upper\_lower} is a type isomorphic to the booleans.
559The implementation of \texttt{internal\_pseudo\_address\_map} is complicated by some peculiarities of the MCS-51's instruction set.
560Note here that all addresses are 16 bit words, but are stored (and manipulated) as 8 bit bytes.
561All \texttt{MOV} instructions in the MCS-51 must use the accumulator \texttt{A} as an intermediary, moving a byte at a time.
562The third component of \texttt{internal\_pseudo\_address\_map} therefore states whether the accumulator currently holds a piece of an address, and if so, whether it is the upper or lower byte of the address (using the \texttt{upper\_lower} flag) complete with the corresponding source address in full.
563The first and second components, on the other hand, performs a similar task for the higher and lower external RAM.
564Again, we use our \texttt{upper\_lower} flag to describe whether a byte is the upper or lower component of a 16-bit address.
565
566The \texttt{low\_internal\_ram\_of\_pseudo\_low\_internal\_ram} function converts the lower internal RAM of a \texttt{PseudoStatus} into the lower internal RAM of a \texttt{Status}.
567A similar function exists for high internal RAM.
568Note that both RAM segments are indexed using addresses 7-bits long:
569\begin{lstlisting}
570definition low_internal_ram_of_pseudo_low_internal_ram:
571 internal_pseudo_address_map $\rightarrow$ policy $\rightarrow$ BitVectorTrie Byte 7
572  $\rightarrow$ BitVectorTrie Byte 7.
573\end{lstlisting}
574
575Next, we are able to translate \texttt{PseudoStatus} records into \texttt{Status} records using \texttt{status\_of\_pseudo\_status}.
576Translating a \texttt{PseudoStatus}'s code memory requires we expand pseudoinstructions and then assemble to obtain a trie of bytes.
577This never fails, provided that our policy is correct:
578\begin{lstlisting}
579definition status_of_pseudo_status:
580 internal_pseudo_address_map $\rightarrow$ $\forall$pap. $\forall$ps: PseudoStatus pap.
581 $\forall$policy. Status (code_memory_of_pseudo_assembly_program pap policy)
582\end{lstlisting}
583
584The \texttt{next\_internal\_pseudo\_address\_map} function is responsible for run time monitoring of the behaviour of assembly programs, in order to detect well-behaved ones.
585It returns a map that traces memory addresses in internal RAM after execution of the next pseudoinstruction, failing when the instruction tampers with memory addresses in unanticipated (but potentially correct) ways.
586It thus decides the membership of a strict subset of the set of well-behaved programs.
587\begin{lstlisting}
588definition next_internal_pseudo_address_map: internal_pseudo_address_map $\rightarrow$
589 $\forall$cm. (Identifier $\rightarrow$ PseudoStatus cm $\rightarrow$ Word) $\rightarrow$ $\forall$s: PseudoStatus cm.
590   program_counter s < $2^{16}$ $\rightarrow$ option internal_pseudo_address_map
591\end{lstlisting}
592If we wished to allow `benign manipulations' of addresses, it would be this function that needs to be changed.
593Note we once again use dependent types to ensure that program counters are properly within bounds.
594The third argument is a function that resolves the concrete address of a label.
595
596The function \texttt{ticks\_of0} computes how long---in clock cycles---a pseudoinstruction will take to execute when expanded in accordance with a given policy.
597The function returns a pair of natural numbers, needed for recording the execution times of each branch of a conditional jump.
598\begin{lstlisting}
599definition ticks_of0:
600 pseudo_assembly_program $\rightarrow$ (Identifier $\rightarrow$ Word) $\rightarrow$ $\forall$policy. Word $\rightarrow$
601   pseudo_instruction $\rightarrow$ nat $\times$ nat
602\end{lstlisting}
603An additional function, \texttt{ticks\_of}, is merely a wrapper around this function.
604
605Finally, we are able to state and prove our main theorem, relating the execution of a single assembly instruction and the execution of (possibly) many machine code instructions, as long as we are able to track memory addresses properly:
606\begin{lstlisting}
607theorem main_thm:
608 $\forall$M, M': internal_pseudo_address_map.
609 $\forall$program: pseudo_assembly_program.
610 $\forall$program_in_bounds: $\mid$program$\mid$ $\leq$ $2^{16}$.
611 let maps := create_label_cost_map program in
612 let addr_of := ... in
613 program is well labelled $\rightarrow$
614 $\forall$policy. policy is correct for program.
615 $\forall$ps: PseudoStatus program. ps < $\mid$program$\mid$.
616  next_internal_pseudo_address_map M program ... = Some M' $\rightarrow$
617   $\exists$n. execute n (status_of_pseudo_status M ps policy) =
618    status_of_pseudo_status M'
619      (execute_1_pseudo_instruction program
620       (ticks_of program ($\lambda$id. addr_of id ps) policy) ps) policy.
621\end{lstlisting}
622The statement is standard for forward simulation, but restricted to \texttt{PseudoStatuses} \texttt{ps} whose next instruction to be executed is well-behaved with respect to the \texttt{internal\_pseudo\_address\_map} \texttt{M}.
623We explicitly require proof that the policy is correct, the program is well-labelled (i.e. no repeated labels, etc.) and the pseudo-program counter is in the program's bounds.
624Theorem \texttt{main\_thm} establishes the correctness of the assembly process and can be lifted to the forward simulation of an arbitrary number of well-behaved steps on the assembly program.
625
626% ---------------------------------------------------------------------------- %
627% SECTION                                                                      %
628% ---------------------------------------------------------------------------- %
629\section{Conclusions}
630\label{sect.conclusions}
631
632We are proving the correctness of an assembler for MCS-51 assembly language.
633Our assembly language features labels, arbitrary conditional and unconditional jumps to labels, global data and instructions for moving this data into the MCS-51's single 16-bit register.
634Expanding these pseudoinstructions into machine code instructions is not trivial, and the proof that the assembly process is `correct', in that the semantics of a subset of assembly programs are not changed is complex.
635
636The formalisation is a component of CerCo which aims to produce a verified concrete complexity preserving compiler for a large subset of the C language.
637The verified assembler, complete with the underlying formalisation of the semantics of MCS-51 machine code, will form the bedrock layer upon which the rest of CerCo will build its verified compiler platform.
638
639We may compare our work to an `industrial grade' assembler for the MCS-51: SDCC~\cite{sdcc:2011}, the only open source C compiler that targets the MCS-51 instruction set.
640It appears that all pseudojumps in SDCC assembly are expanded to \texttt{LJMP} instructions, the worst possible jump expansion policy from an efficiency point of view.
641Note that this policy is the only possible policy \emph{in theory} that can preserve the semantics of an assembly program during the assembly process, coming at the expense of assembler completeness as the generated program may be too large for code memory, there being a trade-off between the completeness of the assembler and the efficiency of the assembled program.
642The definition and proof of a terminating, correct jump expansion policy is described elsewhere~\cite{boender:correctness:2012}.
643
644Verified assemblers could also be applied to the verification of operating system kernels and other formalised compilers.
645For instance the verified seL4 kernel~\cite{klein:sel4:2009}, CompCert~\cite{leroy:formally:2009} and CompCertTSO~\cite{sevcik:relaxed-memory:2011} all explicitly assume the existence of trustworthy assemblers.
646The fact that an optimising assembler cannot preserve the semantics of all assembly programs may have consequences for these projects.
647
648Our formalisation exploits dependent types in different ways and for multiple purposes.
649The first purpose is to reduce potential errors in the formalisation of the microprocessor.
650Dependent types are used to constrain the size of bitvectors and tries that represent memory quantities and memory areas respectively.
651They are also used to simulate polymorphic variants in Matita, in order to provide precise typings to various functions expecting only a subset of all possible addressing modes that the MCS-51 offers.
652Polymorphic variants nicely capture the absolutely unorthogonal instruction set of the MCS-51 where every opcode must accept its own subset of the 11 addressing mode of the processor.
653
654The second purpose is to single out sources of incompleteness.
655By abstracting our functions over the dependent type of correct policies, we were able to manifest the fact that the compiler never refuses to compile a program where a correct policy exists.
656This also allowed to simplify the initial proof by dropping lemmas establishing that one function fails if and only if some previous function does so.
657
658Finally, dependent types, together with Matita's liberal system of coercions, allow us to simulate almost entirely in user space the proof methodology `Russell' of Sozeau~\cite{sozeau:subset:2006}.
659Not every proof has been carried out in this way: we only used this style to prove that a function satisfies a specification that only involves that function in a significant way.
660It would not be natural to see the proof that fetch and assembly commute as the specification of one of the two functions.
661
662\subsection{Related work}
663\label{subsect.related.work}
664% piton
665We are not the first to consider the correctness of an assembler for a non-trivial assembly language.
666The most impressive piece of work in this domain is Piton~\cite{moore:piton:1996}, a stack of verified components, written and verified in ACL2, ranging from a proprietary FM9001 microprocessor verified at the gate level, to assemblers and compilers for two high-level languages---Lisp and $\mu$Gypsy~\cite{moore:grand:2005}.
667% jinja
668Klein and Nipkow also provide a compiler, virtual machine and operational semantics for the Jinja~\cite{klein:machine:2006} language and prove that their compiler is semantics and type preserving.
669
670Though other verified assemblers exist what sets our work apart from that above is our attempt to optimise the generated machine code.
671This complicates a formalisation as an attempt at the best possible selection of machine instructions must be made---especially important on devices with limited code memory.
672Care must be taken to ensure that the time properties of an assembly program are not modified by assembly lest we affect the semantics of any program employing the MCS-51's I/O facilities.
673This is only possible by inducing a cost model on the source code from the optimisation strategy and input program.
674
675\subsection{Resources}
676\label{subsect.resources}
677Our source files are available at~\url{http://cerco.cs.unibo.it}.
678We assumed several properties of `library functions', e.g. modular arithmetic and datastructure manipulation.
679We axiomatised various small functions needed to complete the main theorems, as well as some `routine' proof obligations of the theorems themselves, in focussing on the main meat of the theorems.
680We believe that the proof strategy is sound and that all axioms can be closed, up to minor bugs that should have local fixes that do not affect the global proof strategy.
681
682The complete development is spread across 29 files with around 20,000 lines of Matita source.
683Relavent files are: \texttt{AssemblyProof.ma}, \texttt{AssemblyProofSplit.ma} and \texttt{AssemblyProofSplitSplit.ma}, consisting of approximately 4500 lines of Matita source.
684Numerous other lines of proofs are spread all over the development because of dependent types and the Russell proof style, which does not allow one to separate the code from the proofs.
685The low ratio between source lines and the number of lines of proof is unusual, but justified by the fact that the pseudo-assembly and the assembly language share most constructs and large swathes of the semantics are shared.
686
687\bibliography{cpp-2012-asm.bib}
688
689\end{document}\renewcommand{\verb}{\lstinline}
690\def\lstlanguagefiles{lst-grafite.tex}
691\lstset{language=Grafite}
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