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37\title{On the correctness of an optimising assembler for the Intel MCS-51 microprocessor\thanks{The project CerCo acknowledges the financial support of the Future and Emerging Technologies (FET) programme within the Seventh Framework Programme for Research of the European Commission, under FET-Open grant number: 243881.}}
38\author{Dominic P. Mulligan \and Claudio Sacerdoti Coen}
39\institute{Dipartimento di Scienze dell'Informazione,\\ Universit\'a degli Studi di Bologna}
40
41\bibliographystyle{splncs03}
42
43\begin{document}
44
45\maketitle
46
47\begin{abstract}
48We present a proof of correctness, in Matita, for an optimising assembler for the MCS-51 microcontroller.
49
50The efficient expansion of pseudoinstructions---namely jumps---into MCS-51 machine instructions is complex.
51We isolate the decision making over how jumps should be expanded from the expansion process itself as much as possible using `policies'.
52This makes the proof of correctness for the assembler significantly more straightforward.
53
54We observe that it is impossible for an optimising assembler to preserve the semantics of every assembly program.
55Assembly language programs can manipulate concrete addresses in arbitrary ways.
56Our proof strategy contains a tracking facility for `good addresses' and only programs that use good addresses have their semantics preserved under assembly.
57Our strategy offers increased flexibility over the traditional approach to proving the correctness of assemblers, wherein addresses in assembly are kept opaque and immutable.
58In particular, we may experiment with allowing the benign manipulation of addresses.
59\keywords{Verified software, CerCo (Certified Complexity), MCS-51 microcontroller, Matita proof assistant}
60\end{abstract}
61
62% ---------------------------------------------------------------------------- %
63% SECTION                                                                      %
64% ---------------------------------------------------------------------------- %
65\section{Introduction}
66\label{sect.introduction}
67
68We consider the formalisation of an assembler for the Intel MCS-51 8-bit microprocessor in the Matita proof assistant~\cite{asperti:user:2007}.
69This formalisation forms a major component of the EU-funded CerCo (`Certified Complexity') project~\cite{cerco:2011}, concerning the construction and formalisation of a concrete complexity preserving compiler for a large subset of the C programming language.
70
71The MCS-51 dates from the early 1980s and is commonly called the 8051/8052.
72Despite the microprocessor's age, derivatives are still widely manufactured by a number of semiconductor foundries, with the processor being used especially in embedded systems development, where well-tested, cheap, predictable microprocessors find their niche.
73
74The MCS-51 has a relative paucity of features compared to its more modern brethren, with the lack of any caching or pipelining features meaning that timing of execution is predictable, making the MCS-51 very attractive for CerCo's ends.
75However, the MCS-51's paucity of features---though an advantage in many respects---also quickly becomes a hindrance, as the MCS-51 features a relatively minuscule series of memory spaces by modern standards.
76As a result our C compiler, to be able to successfully compile realistic programs for embedded devices, ought to produce `tight' machine code.
77
78To do this, we must solve the `branch displacement' problem---deciding how best to expand pseudojumps to labels in assembly language to machine code jumps.
79The branch displacement problem arises when pseudojumps can be expanded
80in different ways to real machine instructions, but the different expansions
81are not equivalent (e.g. differ in size or speed) and not always
82correct (e.g. correctness is only up to global constraints over the compiled
83code). For instance, some jump instructions (short jumps) are very small
84and fast, but they can only reach destinations within a
85certain distance from the current instruction. When the destinations are
86too far away, larger and slower long jumps must be used. The use of a long jump may
87augment the distance between another pseudojump and its target, forcing
88another long jump use, in a cascade. The job of the optimising
89compiler (assembler) is to individually expand every pseudo-instruction in such a way
90that all global constraints are satisfied and that the compiled program
91is minimal in size and faster in concrete time complexity.
92This problem is known to be computationally hard for most CISC architectures (see~\cite{hyde:branch:2006}).
93
94To free CerCo's C compiler from having to consider complications relating to branch displacement, we have chosen to implement an optimising assembler, whose input language the compiler will target.
95Labels, conditional jumps to labels, a program preamble containing global data and a \texttt{MOV} instruction for moving this global data into the MCS-51's one 16-bit register all feature in our assembly language.
96We simplify the proof by assuming that all our assembly programs are pre-linked (i.e. we do not formalise a linker---this is left for future work).
97
98Another complication we have addressed is that of the cost model.
99CerCo imposes a cost model on C programs or, more specifically, on simple blocks of instructions.
100This cost model is induced by the compilation process itself, and its non-compositional nature allows us to assign different costs to identical C statements depending on how they are compiled.
101In short, we aim to obtain a very precise costing for a program by embracing the compilation process, not ignoring it.
102At the assembler level, this is reflected by our need to induce a cost
103model on the assembly code as a function of the assembly program and the
104strategy used to solve the branch displacement problem. In particular, the
105optimising compiler should also return a map that assigns a cost (in clock
106cycles) to every instruction in the source program. We expect the induced cost
107to be preserved by the compiler: we will prove that the compiled code
108tightly simulates the source code by taking exactly the predicted amount of
109time.
110
111Note that the temporal tightness of the simulation is a fundamental prerequisite
112of the correctness of the simulation because some functions of the MCS-51---timers and I/O---depend on the microprocessor's clock.
113If the pseudo- and concrete clock differ the result of an I/O operation may not be preserved.
114
115Branch displacement algorithms must have a deep knowledge of the way
116the rest of the assembler works in order to build globally correct solutions.
117Proving their correctness is quite a complex task (see, for instance,
118the compaion paper~\cite{boender:correctness:2012}).
119Nevertheless, the correctness of the whole assembler only depends on the
120correctness of the branch displacement algorithm.
121Therefore, in the rest of the paper, we presuppose the
122existence of a correct policy, to be computed by a branch displacement
123algorithm if it exists. A policy is the decision over how
124any particular jump should be expanded; it is correct when the global
125constraints are satisfied.
126The assembler fails to assemble an assembly program if and only if a correct policy does not exist.
127This is stated in an elegant way in the dependent type of the assembler: the assembly function is total over a program, a policy and the proof that the policy is correct for that program.
128
129The final complication in the proof of correctness of our optimising assembler
130is due to the kind of semantics associated to pseudo-assembly programs.
131Should assembly programs be allowed to freely manipulate addresses? The
132answer to the question deeply affects the proof of correctness.
133The traditional answer is no: values stored in memory or registers are either
134concrete data or symbolic addresses. The latters can be manipulated only
135in very restrictive ways and many programs that do not do so, for malign or
136benign reasons, are not assigned a semantics and cannot be reasoned about.
137All programs that have a semantics have it preserved by the compiler.
138Instead we took a different, novel approach: we allow programs to freely
139manipulate
140addresses non symbolically, but we only grant preservation of the semantics
141for those programs that do behave in a correct, anticipated way. At least
142in principle, this should allow some reasoning on the actual semantics of
143malign programs. In practice, we note how the alternative approach allows
144more code reusal between the semantics of assembly code and object code,
145with benefits on the size of the formalisation.
146
147The rest of this paper is a detailed description of our proof that is marginally still a work in progress.
148In Subsection~\ref{subsect.matita} we provide a brief overview of the Matita proof assistant for the unfamiliar reader.
149In Section~\ref{sect.the.proof} we discuss the design and implementation of the proof proper.
150In Section~\ref{sect.conclusions} we conclude.
151
152% ---------------------------------------------------------------------------- %
153% SECTION                                                                      %
154% ---------------------------------------------------------------------------- %
155\subsection{Matita}
156\label{subsect.matita}
157
158Matita is a proof assistant based on a variant of the Calculus of (Co)inductive Constructions~\cite{asperti:user:2007}.
159It features dependent types that we exploit in the formalisation.
160The (simplified) syntax of the statements and definitions in the paper should be self-explanatory.
161Pairs are denoted with angular brackets, $\langle-, -\rangle$.
162
163Matita features a liberal system of coercions.
164It is possible to define a uniform coercion $\lambda x.\langle x,?\rangle$ from every type $T$ to the dependent product $\Sigma x:T.P~x$.
165The coercion opens a proof obligation that asks the user to prove that $P$ holds for $x$.
166When a coercion must be applied to a complex term (a $\lambda$-abstraction, a local definition, or a case analysis), the system automatically propagates the coercion to the sub-terms
167 For instance, to apply a coercion to force $\lambda x.M : A \to B$ to have type $\forall x:A.\Sigma y:B.P~x~y$, the system looks for a coercion from $M: B$ to $\Sigma y:B.P~x~y$ in a context augmented with $x:A$.
168This is significant when the coercion opens a proof obligation, as the user will be presented with multiple, but simpler proof obligations in the correct context.
169In this way, Matita supports the `Russell' proof methodology developed by Sozeau in~\cite{sozeau:subset:2006}, with an implementation that is lighter and more tightly integrated with the system than that of Coq.
170
171% ---------------------------------------------------------------------------- %
172% SECTION                                                                      %
173% ---------------------------------------------------------------------------- %
174\section{The proof}
175\label{sect.the.proof}
176
177The aim of the section is to explain the main ideas and steps of the certified
178proof of correctness for an optimizing assembler for the MCS-51. The
179formalisation is available at~\url{http://cerco.cs.unibo.it}.
180
181In Section~\ref{subsect.machine.code.semantics} we sketch an operational semantics (a realistic and efficient emulator) for the MCS-51.
182We also introduce a syntax for decoded instructions that will be reused for the assembly language.
183
184In Section~\ref{subsect.assembly.code.semantics} we describe the assembly language and its operational semantics.
185The latter is parametric in the cost model that will be induced by the assembler.
186It reuses the semantics of the machine code on all `real' (i.e. non-pseudo-) instructions.
187
188Branch displacement policies are introduced in Section~\ref{subsect.the.assembler} where we also describe the assembler as a function over policies as previously described.
189
190The proof of correctness of the assembler consists in showing that the object code given in output, together with a cost model for the source program, simulates the source program executed using that cost model.
191The proof can be divided into two main lemmas.
192The first is correctness with respect to fetching, described in Section~\ref{subsect.total.correctness.of.the.assembler}.
193It roughly states that one step of fetching at the assembly level that returns the decoded instruction $I$ is simulated by $n$ steps of fetching at the object level that returns instructions $J_1,\ldots,J_n$, where $J_1,\ldots,J_n$ is, amongst the possible expansions of $I$, the one picked by the policy.
194The second lemma shows that $J_1,\ldots,J_n$ simulates $I$ but only if $I$ is well-behaved, i.e. it manipulates addresses in ways that are anticipated in the correctness proof.
195To keep track of well-behaved address manipulations, we couple the assembly status with a map that records where addresses are currently stored in memory or in the processor's accumulators.
196We then introduce a dynamic checking function that inspects the assembly status and this map to determine if the operation is well-behaved.
197An affirmative answer is the pre-condition of the lemma.
198The second lemma is detailed in Section~\ref{subsect.total.correctness.for.well.behaved.assembly.programs} where we also establish correctness of our assembler as a composition of the two lemmas: programs that are well-behaved when executed under the cost model induced by the compiler are correctly simulated by the compiled code.
199
200% ---------------------------------------------------------------------------- %
201% SECTION                                                                      %
202% ---------------------------------------------------------------------------- %
203
204\subsection{Machine code and its semantics}
205\label{subsect.machine.code.semantics}
206
207We implemented a realistic and efficient emulator for the MCS-51 microprocessor.
208An MCS-51 program is just a sequence of bytes stored in the read-only code
209memory of the processor, represented as a compact trie of bytes addressed
210by the program counter.
211The \texttt{Status} of the emulator is described as
212a record that contains the microprocessor's program counter, registers, stack
213pointer, clock, special function registers, code memory, and so on.
214The value of the code memory is a parameter of the record since it is not
215changed during execution.
216
217The \texttt{Status} records is itself an instance of a more general
218datatype \texttt{PreStatus} that abstracts over the implementation of code
219memory in order to reuse the same datatype for the semantics of the assembly
220language in the next section.
221
222The execution of a single instruction is performed by the \texttt{execute\_1}
223function, parametric over the content \texttt{cm} of the code memory:
224\begin{lstlisting}
225definition execute_1: $\forall$cm. Status cm $\rightarrow$ Status cm
226\end{lstlisting}
227
228The function \texttt{execute\_1} closely matches the fetch-decode-execute
229cycle of the MCS-51 hardware, as described by a Siemen's manufacturer's data sheet~\cite{siemens:2011}.
230Fetching and decoding are performed simultaneously:
231we first fetch, using the program counter, from code memory the first byte of the instruction to be executed, decoding the resulting opcode, fetching more bytes as is necessary to decode the arguments.
232Decoded instructions are represented by the \texttt{instruction} data type
233which extends a data type of \texttt{preinstruction}s that will be reused
234for the assembly language.
235\begin{lstlisting}
236inductive preinstruction (A: Type[0]): Type[0] :=
237 | ADD: $\llbracket$acc_a$\rrbracket$ → $\llbracket$registr; direct; indirect; data$\rrbracket$ $\rightarrow$ preinstruction A
238 | DEC: $\llbracket$acc_a; registr; direct; indirect$\rrbracket$ $\rightarrow$ preinstruction A
239 | JB: $\llbracket$bit_addr$\rrbracket$ $\rightarrow$ A $\rightarrow$ preinstruction A
240 | ...
241
242inductive instruction: Type[0] :=
243 | LCALL: $\llbracket$addr16$\rrbracket$ $\rightarrow$ instruction
244 | AJMP: $\llbracket$addr11$\rrbracket$ $\rightarrow$ instruction
245 | RealInstruction: preinstruction $\llbracket$relative$\rrbracket$ $\rightarrow$ instruction.
246 | ...
247\end{lstlisting}
248The MCS-51 has many operand modes, but an unorthogonal instruction set: every
249opcode is only enable for a finite subset of the possible operand modes.
250Here we exploit dependent types and an implicit coercion to synthesize
251the type of arguments of opcodes from a vector of names of operand modes.
252For example, \texttt{ACC} has two operands, the first one constrained to be
253the \texttt{A} accumulator, and the second one to be a disjoint union of
254register, direct, indirect and data operand modes.
255
256The parameterised type $A$ of \texttt{preinstruction} represents the addressing mode allowed for conditional jumps; in the \texttt{RealInstruction} constructor
257we constraint it to be a relative offset. A different instantiation will be
258used in the next Section for assembly programs.
259
260Once decoded, execution proceeds by a case analysis on the decoded instruction, following the operation of the hardware.
261For example, the \texttt{DEC} preinstruction (`decrement') is executed as follows:
262\begin{lstlisting}
263 | DEC addr $\Rightarrow$
264  let s := add_ticks1 s in
265  let $\langle$result, flags$\rangle$ := sub_8_with_carry (get_arg_8 s true addr)
266   (bitvector_of_nat 8 1) false in
267     set_arg_8 s addr result
268\end{lstlisting}
269
270Here, \texttt{add\_ticks1} models the incrementing of the internal clock of the microprocessor; it is a parameter of the semantics of \texttt{preinstruction}s
271that is fixed in the semantics of \texttt{instruction}s according to the
272manufacturer datasheet.
273
274% ---------------------------------------------------------------------------- %
275% SECTION                                                                      %
276% ---------------------------------------------------------------------------- %
277
278\subsection{Assembly code and its semantics}
279\label{subsect.assembly.code.semantics}
280
281An assembly program is a list of potentially labelled pseudoinstructions, bundled with a preamble consisting of a list of symbolic names for locations in data memory (i.e. global variables).
282All preinstructions are pseudoinstructions, but conditional jumps are now
283only allowed to use \texttt{Identifiers} (labels) as their target.
284\begin{lstlisting}
285inductive pseudo_instruction: Type[0] :=
286  | Instruction: preinstruction Identifier $\rightarrow$ pseudo_instruction
287    ...
288  | Jmp: Identifier $\rightarrow$ pseudo_instruction
289  | Call: Identifier $\rightarrow$ pseudo_instruction
290  | Mov: $\llbracket$dptr$\rrbracket$ $\rightarrow$ Identifier $\rightarrow$ pseudo_instruction.
291\end{lstlisting}
292The pseudoinstructions \texttt{Jmp}, \texttt{Call} and \texttt{Mov} are generalisations of machine code unconditional jumps, calls and move instructions respectively, all of whom act on labels, as opposed to concrete memory addresses.
293The object code calls and jumps that act on concrete memory addresses are ruled
294out of assembly programs not being included in the preinstructions (see previous
295Section).
296
297Execution of pseudoinstructions is an endofunction on \texttt{PseudoStatus}.
298A \texttt{PseudoStatus} is an instance of \texttt{PreStatus} that differs
299from a \texttt{Status} only in the datatype used for code memory: a list
300of optionally labelled pseudoinstructions versus a trie of bytes.
301The \texttt{PreStatus} type is crucial for sharing the majority of the
302semantics of the two languages.
303
304Emulation for pseudoinstructions is handled by \texttt{execute\_1\_pseudo\_instruction}:
305\begin{lstlisting}
306definition execute_1_pseudo_instruction:
307 $\forall$cm. $\forall$costing:($\forall$ppc: Word. ppc < $\mid$snd cm$\mid$ $\rightarrow$ nat $\times$ nat).
308  $\forall$s:PseudoStatus cm. program_counter s < $\mid$snd cm$\mid$ $\rightarrow$ PseudoStatus cm
309\end{lstlisting}
310The type of \texttt{execute\_1\_pseudo\_instruction} is more involved than
311that of \texttt{execute\_1}. The first difference is that execution is only
312defined when the program counter points to a valid instruction, i.e.
313it is smaller than the length $\mid$\texttt{snd cm}$\mid$ of the program.
314The second difference is the abstraction over the cost model, abbreviated
315here as \emph{costing}.
316The costing is a function that maps valid program counters to pairs of natural numbers representing the number of clock ticks used by the pseudoinstructions stored at those program counters. For conditional jumps the two numbers differ
317to represent different costs for the `true branch' and the `false branch'.
318In the next Section we will see how the optimizing
319assembler induces the only costing that is preserved by compilation.
320Obviously the induced costing is determined by the branch displacement policy
321that decides how to expand every pseudojump to a label into concrete
322instructions.
323
324Execution proceeds by first fetching from pseudo-code memory using the program counter---treated as an index into the pseudoinstruction list.
325This index is always guaranteed to be within the bounds of the pseudoinstruction list due to the dependent type placed on the function.
326No decoding is required.
327We then proceed by case analysis over the pseudoinstruction, reusing the code for object code for all instructions present in the MCS-51's instruction set.
328For all newly introduced pseudoinstructions, we simply translate labels to concrete addresses before behaving as a `real' instruction.
329
330In contrast to other approaches, we do not perform any kind of symbolic execution, wherein data is the disjoint union of bytes and addresses, with addresses kept opaque and immutable.
331Labels are immediately translated to concrete addresses, and registers and memory locations only ever contain bytes, never labels.
332As a consequence, we allow the programmer to mangle, change and generally adjust addresses as they want, under the proviso that the translation process may not be able to preserve the semantics of programs that do this.
333The only limitation introduced by this approach is that the size of
334assembly programs is bounded by $2^16$.
335This will be further discussed in Subsection~\ref{subsect.total.correctness.for.well.behaved.assembly.programs}.
336
337% ---------------------------------------------------------------------------- %
338% SECTION                                                                      %
339% ---------------------------------------------------------------------------- %
340
341\subsection{The assembler}
342\label{subsect.the.assembler}
343
344Conceptually the assembler works in two passes.
345The first pass expands every pseudoinstruction into a list of machine code instructions using the function \texttt{expand\_pseudo\_instruction}.
346The second pass encodes as a list of bytes the expanded instruction list by mapping the function \texttt{assembly1} across the list, and then flattening.
347The program obtained as a list of bytes is ready to be loaded in code memory
348for execution.
349\begin{displaymath}
350\hspace{-0.5cm}
351\mbox{\fontsize{7}{9}\selectfont$[\mathtt{P_1}, \ldots \mathtt{P_n}]$} \underset{\mbox{\fontsize{7}{9}\selectfont$\mathtt{assembly}$}}{\xrightarrow{\left(P_i \underset{\mbox{\fontsize{7}{9}\selectfont$\mathtt{assembly\_1\_pseudo\_instruction}$}}{\xrightarrow{\mathtt{P_i} \xrightarrow{\mbox{\fontsize{7}{9}\selectfont$\mathtt{expand\_pseudo\_instruction}$}} \mathtt{[I^1_i, \ldots I^q_i]} \xrightarrow{\mbox{\fontsize{7}{9}\selectfont$\mathtt{~~~~~~~~assembly1^{*}~~~~~~~~}$}} \mathtt{[0110]}}} \mathtt{[0110]}\right)^{*}}} \mbox{\fontsize{7}{9}\selectfont$\mathtt{[\ldots0110\ldots]}$}
352\end{displaymath}
353The most complex of the two passes is the first, which expands pseudoinstructions and must perform the task of branch displacement~\cite{hyde:branch:2006}.
354The function \texttt{assembly\_1\_pseudo\_instruction} used in the body of the paper is essentially the composition of the two passes.
355
356The branch displacement problem refers to the task of expanding pseudojumps into their concrete counterparts, preferably as efficiently as possible.
357For instance, the MCS-51 features three unconditional jump instructions: \texttt{LJMP} and \texttt{SJMP}---`long jump' and `short jump' respectively---and an 11-bit oddity of the MCS-51, \texttt{AJMP}.
358Each of these three instructions expects arguments in different sizes and behaves in markedly different ways: \texttt{SJMP} may only perform a `local jump'; \texttt{LJMP} may jump to any address in the MCS-51's memory space and \texttt{AJMP} may jump to any address in the current memory page.
359Consequently, the size of each opcode is different, and to squeeze as much code as possible into the MCS-51's limited code memory, the smallest possible opcode that will suffice should be selected.
360
361Similarly, a conditional pseudojump must be translated potentially into a configuration of machine code instructions, depending on the distance to the jump's target.
362For example, to translate a jump to a label, a single conditional jump pseudoinstruction may be translated into a block of three real instructions as follows (here, \texttt{JZ} is `jump if accumulator is zero'):
363{\small{
364\begin{displaymath}
365\begin{array}{r@{\quad}l@{\;\;}l@{\qquad}c@{\qquad}l@{\;\;}l}
366       & \mathtt{JZ}  & \mathtt{label}                      &                 & \mathtt{JZ}   & \text{size of \texttt{SJMP} instruction} \\
367       & \ldots       &                            & \text{translates to}   & \mathtt{SJMP} & \text{size of \texttt{LJMP} instruction} \\
368\mathtt{label:} & \mathtt{MOV} & \mathtt{A}\;\;\mathtt{B}   & \Longrightarrow & \mathtt{LJMP} & \text{address of \textit{label}} \\
369       &              &                            &                 & \ldots        & \\
370       &              &                            &                 & \mathtt{MOV}  & \mathtt{A}\;\;\mathtt{B}
371\end{array}
372\end{displaymath}}}
373Here, if \texttt{JZ} fails, we fall through to the \texttt{SJMP} which jumps over the \texttt{LJMP}.
374Naturally, if \texttt{label} is `close enough', a conditional jump pseudoinstruction is mapped directly to a conditional jump machine instruction; the above translation only applies if \texttt{label} is not sufficiently local.
375
376In order to implement branch displacement it is impossible to really make the \texttt{expand\_pseudo\_instruction} function completely independent of the encoding function.
377This is due to branch displacement requiring the distance in bytes of the target of the jump.
378Moreover the standard solutions for solving the branch displacement problem find their solutions iteratively, by either starting from a solution where all jumps are long, and shrinking them when possible, or starting from a state where all jumps are short and increasing their length as needed.
379Proving the correctness of such algorithms is already quite involved and the correctness of the assembler as a whole does not depend on the `quality' of the solution found to a branch displacement problem.
380For this reason, we try to isolate the computation of a branch displacement problem from the proof of correctness for the assembler by parameterising our \texttt{expand\_pseudo\_instruction} by a `policy'.
381
382\begin{lstlisting}
383definition expand_pseudo_instruction:
384 $\forall$lookup_labels: Identifier $\rightarrow$ Word.
385 $\forall$policy.
386 $\forall$ppc: Word.
387 $\forall$lookup_datalabels: Identifier $\rightarrow$ Word.
388 $\forall$pi: pseudo_instruction.
389  list instruction := ...
390\end{lstlisting}
391Here, the functions \texttt{lookup\_labels} and \texttt{lookup\_datalabels} are the functions that map labels and datalabels to program counters respectively, both of them used in the semantics of assembly.
392The input \texttt{pi} is the pseudoinstruction to be expanded and is found at address \texttt{ppc} in the assembly program.
393The function takes \texttt{policy} as an input.
394In reality, this is a pair of functions, but for the purposes of this paper we simplify.
395The \texttt{policy} maps pseudo-program counters to program counters: the encoding of the expansion of the pseudoinstruction found at address \texttt{a} in the assembly code should be placed into code memory at address \texttt{policy(a)}.
396Of course this is possible only if the policy is correct, which means that the encoding of consecutive assembly instructions must be consecutive in code memory.
397\begin{displaymath}
398\texttt{policy}(\texttt{ppc} + 1) = \texttt{pc} + \texttt{current\_instruction\_size}
399\end{displaymath}
400Here, \texttt{current\_instruction\_size} is the size in bytes of the encoding of the expanded pseudoinstruction found at \texttt{ppc}.
401Note that the entanglement we hinted at is only partially solved in this way: the assembler code can ignore the implementation details of the algorithm that finds a policy;
402however, the algorithm that finds a policy must know the exact behaviour of the assembly program because it needs to predict the way the assembly will expand and encode pseudoinstructions, once fed with a policy.
403A companion submission to this one~\cite{boender:correctness:2012} certifies an algorithm that finds branch displacement policies for the assembler described in this paper.
404
405The \texttt{expand\_pseudo\_instruction} function uses the \texttt{policy} map to determine the size of jump required when expanding pseudojumps, computing the jump size by examining the size of the differences between program counters.
406For instance, if at address \texttt{ppc} in the assembly program we found \texttt{Jmp l} such that \texttt{lookup\_labels l = a}, if the offset \texttt{d = policy(a) - policy(ppc + 1)} is such that \texttt{d} $< 128$ then \texttt{Jmp l} is normally translated to the best local solution, the short jump \texttt{SJMP d}.
407A global best solution to the branch displacement problem, however, is not always made of locally best solutions.
408Therefore, in some circumstances, it is necessary to force the assembler to expand jumps into larger ones.
409This is achieved by another boolean-valued function such that if the function applied to \texttt{ppc} returns true then a \texttt{Jmp l} at address \texttt{ppc} is always translated to a long jump.
410An essentially identical mechanism exists for call instructions.
411
412% ---------------------------------------------------------------------------- %
413% SECTION                                                                      %
414% ---------------------------------------------------------------------------- %
415\subsection{Correctness of the assembler with respect to fetching}
416\label{subsect.total.correctness.of.the.assembler}
417Using our policies, we now work toward proving the correctness of the assembler.
418Correctness means that the assembly process never fails when provided with a correct policy and that the process does not change the semantics of a certain class of well-behaved assembly programs.
419
420The aim of this section is to prove the following informal statement: when we fetch an assembly pseudoinstruction \texttt{I} at address \texttt{ppc}, then we can fetch the expanded pseudoinstruction(s) \texttt{[J1, \ldots, Jn] = fetch\_pseudo\_instruction \ldots\ I\ ppc} from \texttt{policy ppc} in the code memory obtained by loading the assembled object code.
421This constitutes the first major step in the proof of correctness of the assembler, the next one being the simulation of \texttt{I} by \texttt{[J1, \ldots, Jn]} (see Subsection~\ref{subsect.total.correctness.for.well.behaved.assembly.programs}).
422
423The \texttt{assembly} function is given a Russell type (slightly simplified here):
424\begin{lstlisting}
425definition assembly:
426  $\forall$program: pseudo_assembly_program.
427  $\forall$policy.
428    $\Sigma$assembled: list Byte $\times$ (BitVectorTrie costlabel 16).
429      policy is correct for program $\rightarrow$
430      $\mid$program$\mid$ < $2^{16}$ $\rightarrow$ $\mid$fst assembled$\mid$ < $2^{16}$ $\wedge$
431      (policy ($\mid$program$\mid$) = $\mid$fst assembled$\mid$ $\vee$
432      (policy ($\mid$program$\mid$) = 0 $\wedge$ $\mid$fst assembled$\mid$ = $2^{16}$)) $\wedge$
433      $\forall$ppc: pseudo_program_counter. ppc < $2^{16}$ $\rightarrow$
434        let pseudo_instr := fetch from program at ppc in
435        let assembled_i := assemble pseudo_instr in
436          $\mid$assembled_i$\mid$ $\leq$ $2^{16}$ $\wedge$
437            $\forall$n: nat. n < $\mid$assembled_i$\mid$ $\rightarrow$ $\exists$k: nat.
438              nth assembled_i n = nth assembled (policy ppc + k).
439\end{lstlisting}
440In plain words, the type of \texttt{assembly} states the following.
441Suppose we are given a policy that is correct for the program we are assembling.
442Then we return a list of assembled bytes, complete with a map from program counters to cost labels, such that the following properties hold for the list of bytes.
443Under the condition that the policy is `correct' for the program and the program is fully addressable by a 16-bit word, the assembled list is also fully addressable by a 16-bit word, the policy maps the last program counter that can address the program to the last instruction of the assemble pseudoinstruction or overflows, and if we fetch from the pseudo-program counter \texttt{ppc} we get a pseudoinstruction \texttt{pi} and a new pseudo-program counter \texttt{ppc}.
444Further, assembling the pseudoinstruction \texttt{pseudo\_instr} results in a list of bytes, \texttt{assembled\_i}.
445Then, indexing into this list with any natural number \texttt{n} less than the length of \texttt{assembled\_i} gives the same result as indexing into \texttt{assembled} with \texttt{policy ppc} (the program counter pointing to the start of the expansion in \texttt{assembled}) plus \texttt{k}.
446
447Essentially the lemma above states that the \texttt{assembly} function correctly expands pseudoinstructions, and that the expanded instruction reside consecutively in memory.
448This result is lifted from lists of bytes into a result on tries of bytes (i.e. code memories), using an additional lemma: \texttt{assembly\_ok}.
449
450Lemma \texttt{fetch\_assembly} establishes that the \texttt{fetch} and \texttt{assembly1} functions interact correctly.
451The \texttt{fetch} function, as its name implies, fetches the instruction indexed by the program counter in the code memory, while \texttt{assembly1} maps a single instruction to its byte encoding:
452\begin{lstlisting}
453lemma fetch_assembly:
454 $\forall$pc: Word.
455 $\forall$i: instruction.
456 $\forall$code_memory: BitVectorTrie Byte 16.
457 $\forall$assembled: list Byte.
458  assembled = assemble i $\rightarrow$
459  let len := $\mid$assembled$\mid$ in
460  let pc_plus_len := pc + len in
461   encoding_check pc pc_plus_len assembled $\rightarrow$
462   let $\langle$instr, pc', ticks$\rangle$ := fetch pc in
463    instr = i $\wedge$ ticks = (ticks_of_instruction instr) $\wedge$ pc' = pc_plus_len.
464\end{lstlisting}
465We read \texttt{fetch\_assembly} as follows.
466Given an instruction, \texttt{i}, we first assemble the instruction to obtain \texttt{assembled}, checking that the assembled instruction was stored in code memory correctly.
467Fetching from code memory, we obtain a tuple consisting of the instruction, new program counter, and the number of ticks this instruction will take to execute.
468We finally check that the fetched instruction is the same instruction that we began with, and the number of ticks this instruction will take to execute is the same as the result returned by a lookup function, \texttt{ticks\_of\_instruction}, devoted to tracking this information.
469Or, in plainer words, assembling and then immediately fetching again gets you back to where you started.
470
471Lemma \texttt{fetch\_assembly\_pseudo} is obtained by composition of \texttt{expand\_pseudo\_instruction} and \texttt{assembly\_1\_pseudoinstruction}:
472\begin{lstlisting}
473lemma fetch_assembly_pseudo:
474 $\forall$program: pseudo_assembly_program.
475 $\forall$policy.
476 $\forall$ppc.
477 $\forall$code_memory.
478 let $\langle$preamble, instr_list$\rangle$ := program in
479 let pi := $\pi_1$ (fetch_pseudo_instruction instr_list ppc) in
480 let pc := policy ppc in
481 let instrs := expand_pseudo_instructio policy ppc pi in
482 let $\langle$l, a$\rangle$ := assembly_1_pseudoinstruction policy ppc pi in
483 let pc_plus_len := pc + l in
484  encoding_check code_memory pc pc_plus_len a $\rightarrow$
485   fetch_many code_memory pc_plus_len pc instructions.
486\end{lstlisting}
487Here, \texttt{l} is the number of machine code instructions the pseudoinstruction at hand has been expanded into.
488We assemble a single pseudoinstruction with \texttt{assembly\_1\_pseudoinstruction}, which internally calls \texttt{expand\_pseudo\_instruction}.
489The function \texttt{fetch\_many} fetches multiple machine code instructions from code memory and performs some routine checks.
490
491Intuitively, Lemma \texttt{fetch\_assembly\_pseudo} can be read as follows.
492Suppose we expand the pseudoinstruction at \texttt{ppc} with the policy, obtaining the list of machine code instructions \texttt{instrs}.
493Suppose we also assemble the pseudoinstruction at \texttt{ppc} to obtain \texttt{a}, a list of bytes.
494Then, we check with \texttt{fetch\_many} that the number of machine instructions that were fetched matches the number of instruction that \texttt{expand\_pseudo\_instruction} expanded.
495
496The final lemma in this series is \texttt{fetch\_assembly\_pseudo2} that combines the Lemma \texttt{fetch\_assembly\_pseudo} with the correctness of the functions that load object code into the processor's memory:
497\begin{lstlisting}
498lemma fetch_assembly_pseudo2:
499 $\forall$program.
500 $\mid$snd program$\mid$ $\leq$ $2^{16}$ $\rightarrow$
501 $\forall$policy.
502 policy is correct for program $\rightarrow$
503 $\forall$ppc. ppc < $\mid$snd program$\mid$ $\rightarrow$
504  let $\langle$labels, costs$\rangle$ := create_label_cost_map program in
505  let $\langle$assembled, costs'$\rangle$ := $\pi_1$ (assembly program policy) in
506  let cmem := load_code_memory assembled in
507  let $\langle$pi, newppc$\rangle$ := fetch_pseudo_instruction program ppc in
508  let instructions := expand_pseudo_instruction policy ppc pi in
509    fetch_many cmem (policy newppc) (policy ppc) instructions.
510\end{lstlisting}
511
512Here we use $\pi_1$ to project the existential witness from the Russell-typed function \texttt{assembly}.
513
514We read \texttt{fetch\_assembly\_pseudo2} as follows.
515Suppose we are given an assembly program which can be addressed by a 16-bit word and a policy that is correct for this program.
516Suppose we are able to successfully assemble an assembly program using \texttt{assembly} and produce a code memory, \texttt{cmem}.
517Then, fetching a pseudoinstruction from the pseudo-code memory at address \texttt{ppc} corresponds to fetching a sequence of instructions from the real code memory using \texttt{policy} to expand pseudoinstructions.
518The fetched sequence corresponds to the expansion, according to the policy, of the pseudoinstruction.
519
520At first, the lemma appears to immediately imply the correctness of the assembler, but this property is \emph{not} strong enough to establish that the semantics of an assembly program has been preserved by the assembly process since it does not establish the correspondence between the semantics of a pseudoinstruction and that of its expansion.
521In particular, the two semantics differ on instructions that \emph{could} directly manipulate program addresses.
522
523% ---------------------------------------------------------------------------- %
524% SECTION                                                                      %
525% ---------------------------------------------------------------------------- %
526\subsection{Correctness for `well-behaved' assembly programs}
527\label{subsect.total.correctness.for.well.behaved.assembly.programs}
528
529The traditional approach to verifying the correctness of an assembler is to treat memory addresses as opaque structures that cannot be modified.
530Memory is represented as a map from opaque addresses to the disjoint union of data and opaque addresses---addresses are kept opaque to prevent their possible `semantics breaking' manipulation by assembly programs:
531\begin{displaymath}
532\mathtt{Mem} : \mathtt{Addr} \rightarrow \mathtt{Bytes} + \mathtt{Addr} \qquad \llbracket - \rrbracket : \mathtt{Instr} \rightarrow \mathtt{Mem} \rightarrow \mathtt{option\ Mem}
533\end{displaymath}
534The semantics of a pseudoinstruction, $\llbracket - \rrbracket$, is given as a possibly failing function from pseudoinstructions and memory spaces to new memory spaces.
535The semantic function proceeds by case analysis over the operands of a given instruction, failing if either operand is an opaque address, or otherwise succeeding, updating memory.
536\begin{gather*}
537\llbracket \mathtt{ADD\ @A1\ @A2} \rrbracket^\mathtt{M} = \begin{cases}
538                                                              \mathtt{Byte\ b1},\ \mathtt{Byte\ b2} & \rightarrow \mathtt{Some}(\mathtt{M}\ \text{with}\ \mathtt{b1} + \mathtt{b2}) \\
539                                                              -,\ \mathtt{Addr\ a} & \rightarrow \mathtt{None} \\
540                                                              \mathtt{Addr\ a},\ - & \rightarrow \mathtt{None}
541                                                            \end{cases}
542\end{gather*}
543In contrast, in this paper we take a different approach.
544We trace memory locations (and, potentially, registers) that contain memory addresses.
545We then prove that only those assembly programs that use addresses in `safe' ways have their semantics preserved by the assembly process---a sort of dynamic type system sitting atop memory.
546
547We believe that this approach is more flexible when compared to the traditional approach, as in principle it allows us to introduce some permitted \emph{benign} manipulations of addresses that the traditional approach, using opaque addresses, cannot handle, therefore expanding the set of input programs that can be assembled correctly.
548This approach, of using real addresses coupled with a weak, dynamic typing system sitting atop of memory, is similar to one taken by Tuch \emph{et al}~\cite{tuch:types:2007}, for reasoning about low-level C code.
549
550Our analogue of the semantic function above is merely a wrapper around the function that implements the semantics of machine code, paired with a function that keeps track of addresses.
551The semantics of pseudo- and machine code are then essentially shared.
552The only thing that changes at the assembly level is the presence of the new tracking function.
553
554However, with this approach we must detect (at run time) programs that manipulate addresses in well-behaved ways, according to some approximation of well-behavedness.
555We use an \texttt{internal\_pseudo\_address\_map} to trace addresses of code memory addresses in internal RAM:
556\begin{lstlisting}
557definition address_entry := upper_lower $\times$ Byte.
558
559definition internal_pseudo_address_map :=
560  (BitVectorTrie address_entry 7) $\times$ (BitVectorTrie address_entry 7)
561    $\times$ (option address_entry).
562\end{lstlisting}
563Here, \texttt{upper\_lower} is a type isomorphic to the booleans denoting whether a byte value is the upper or lower byte of some 16-bit address.
564
565The implementation of \texttt{internal\_pseudo\_address\_map} is complicated by some peculiarities of the MCS-51's instruction set.
566Note here that all addresses are 16 bit words, but are stored (and manipulated) as 8 bit bytes.
567All \texttt{MOV} instructions in the MCS-51 must use the accumulator \texttt{A} as an intermediary, moving a byte at a time.
568The third component of \texttt{internal\_pseudo\_address\_map} therefore states whether the accumulator currently holds a piece of an address, and if so, whether it is the upper or lower byte of the address (using the \texttt{upper\_lower} flag) complete with the corresponding source address in full.
569The first and second components, on the other hand, performs a similar task for the higher and lower external RAM.
570Again, we use our \texttt{upper\_lower} flag to describe whether a byte is the upper or lower component of a 16-bit address.
571
572The \texttt{low\_internal\_ram\_of\_pseudo\_low\_internal\_ram} function converts the lower internal RAM of a \texttt{PseudoStatus} into the lower internal RAM of a \texttt{Status}.
573A similar function exists for high internal RAM.
574Note that both RAM segments are indexed using addresses 7-bits long:
575\begin{lstlisting}
576definition low_internal_ram_of_pseudo_low_internal_ram:
577 internal_pseudo_address_map $\rightarrow$ policy $\rightarrow$ BitVectorTrie Byte 7
578  $\rightarrow$ BitVectorTrie Byte 7.
579\end{lstlisting}
580
581Next, we are able to translate \texttt{PseudoStatus} records into \texttt{Status} records using \texttt{status\_of\_pseudo\_status}.
582Translating a \texttt{PseudoStatus}'s code memory requires we expand pseudoinstructions and then assemble to obtain a trie of bytes.
583This never fails, provided that our policy is correct:
584\begin{lstlisting}
585definition status_of_pseudo_status:
586 internal_pseudo_address_map $\rightarrow$ $\forall$pap. $\forall$ps: PseudoStatus pap.
587 $\forall$policy. Status (code_memory_of_pseudo_assembly_program pap policy)
588\end{lstlisting}
589
590The \texttt{next\_internal\_pseudo\_address\_map} function is responsible for run time monitoring of the behaviour of assembly programs, in order to detect well-behaved ones.
591It returns a map that traces memory addresses in internal RAM after execution of the next pseudoinstruction, failing when the instruction tampers with memory addresses in unanticipated (but potentially correct) ways.
592It thus decides the membership of a strict subset of the set of well-behaved programs.
593\begin{lstlisting}
594definition next_internal_pseudo_address_map: internal_pseudo_address_map $\rightarrow$
595 $\forall$cm. (Identifier $\rightarrow$ PseudoStatus cm $\rightarrow$ Word) $\rightarrow$ $\forall$s: PseudoStatus cm.
596   program_counter s < $2^{16}$ $\rightarrow$ option internal_pseudo_address_map
597\end{lstlisting}
598If we wished to allow `benign manipulations' of addresses, it would be this function that needs to be changed.
599Note we once again use dependent types to ensure that program counters are properly within bounds.
600The third argument is a function that resolves the concrete address of a label.
601
602The function \texttt{ticks\_of0} computes how long---in clock cycles---a pseudoinstruction will take to execute when expanded in accordance with a given policy.
603The function returns a pair of natural numbers, needed for recording the execution times of each branch of a conditional jump.
604\begin{lstlisting}
605definition ticks_of0:
606 pseudo_assembly_program $\rightarrow$ (Identifier $\rightarrow$ Word) $\rightarrow$ $\forall$policy. Word $\rightarrow$
607   pseudo_instruction $\rightarrow$ nat $\times$ nat
608\end{lstlisting}
609An additional function, \texttt{ticks\_of}, is merely a wrapper around this function.
610
611Finally, we are able to state and prove our main theorem.
612This relates the execution of a single assembly instruction and the execution of (possibly) many machine code instructions, as long as we are able to track memory addresses properly:
613\begin{lstlisting}
614theorem main_thm:
615 $\forall$M, M': internal_pseudo_address_map.
616 $\forall$program: pseudo_assembly_program.
617 $\forall$program_in_bounds: $\mid$program$\mid$ $\leq$ $2^{16}$.
618 let maps := create_label_cost_map program in
619 let addr_of := ... in
620 program is well labelled $\rightarrow$
621 $\forall$policy. policy is correct for program.
622 $\forall$ps: PseudoStatus program. ps < $\mid$program$\mid$.
623  next_internal_pseudo_address_map M program ... = Some M' $\rightarrow$
624   $\exists$n. execute n (status_of_pseudo_status M ps policy) =
625    status_of_pseudo_status M'
626      (execute_1_pseudo_instruction program
627       (ticks_of program ($\lambda$id. addr_of id ps) policy) ps) policy.
628\end{lstlisting}
629The statement is standard for forward simulation, but restricted to \texttt{PseudoStatuses} \texttt{ps} whose next instruction to be executed is well-behaved with respect to the \texttt{internal\_pseudo\_address\_map} \texttt{M}.
630We explicitly require proof that the policy is correct, the program is well-labelled (i.e. no repeated labels, etc.) and the pseudo-program counter is in the program's bounds.
631Theorem \texttt{main\_thm} establishes the correctness of the assembly process and can be lifted to the forward simulation of an arbitrary number of well-behaved steps on the assembly program.
632
633% ---------------------------------------------------------------------------- %
634% SECTION                                                                      %
635% ---------------------------------------------------------------------------- %
636\section{Conclusions}
637\label{sect.conclusions}
638
639We are proving the correctness of an assembler for MCS-51 assembly language.
640Our assembly language features labels, arbitrary conditional and unconditional jumps to labels, global data and instructions for moving this data into the MCS-51's single 16-bit register.
641Expanding these pseudoinstructions into machine code instructions is not trivial, and the proof that the assembly process is `correct', in that the semantics of a subset of assembly programs are not changed is complex.
642
643The formalisation is a component of CerCo which aims to produce a verified concrete complexity preserving compiler for a large subset of the C language.
644The verified assembler, complete with the underlying formalisation of the semantics of MCS-51 machine code, will form the bedrock layer upon which the rest of CerCo will build its verified compiler platform.
645
646It is interesting to compare our work to an `industrial grade' assembler for the MCS-51: SDCC~\cite{sdcc:2011}.
647SDCC is the only open source C compiler that targets the MCS-51 instruction set.
648It appears that all pseudojumps in SDCC assembly are expanded to \texttt{LJMP} instructions, the worst possible jump expansion policy from an efficiency point of view.
649Note that this policy is the only possible policy \emph{in theory} that can preserve the semantics of an assembly program during the assembly process.
650However, this comes at the expense of assembler completeness: the generated program may be too large to fit into code memory.
651In this respect, there is a trade-off between the completeness of the assembler and the efficiency of the assembled program.
652The definition and proof of a terminating, correct jump expansion policy is described in a companion publication to this one~\cite{boender:correctness:2012}.
653
654Aside from their application in verified compiler projects such as CerCo, CompCert~\cite{leroy:formally:2009} and CompCertTSO~\cite{sevcik:relaxed-memory:2011}, verified assemblers such as ours could also be applied to the verification of operating system kernels.
655Of particular note is the verified seL4 kernel~\cite{klein:sel4:2009}.
656This verification explicitly assumes the existence of, amongst other things, a trustworthy assembler and compiler.
657
658Note that both CompCert, CompCertTSO and the seL4 formalisation assume the existence of `trustworthy' assemblers.
659For instance, the CompCert C compiler's backend stops at the PowerPC assembly language, in the default backend.
660The observation that an optimising assembler cannot preserve the semantics of every assembly program may have important consequences for these projects (though in the case of CompCertTSO, targetting a multiprocessor, what exactly constitutes the subset of `good programs' may not be entirely clear).
661If CompCert chooses to assume the existence of an optimising assembler, then care should be made to ensure that any assembly program produced by the CompCert compiler falls into the subset of programs that have a hope of having their semantics preserved by an optimising assembler.
662
663Our formalisation exploits dependent types in different ways and for multiple purposes.
664The first purpose is to reduce potential errors in the formalisation of the microprocessor.
665Dependent types are used to constrain the size of bitvectors and tries that represent memory quantities and memory areas respectively.
666They are also used to simulate polymorphic variants in Matita, in order to provide precise typings to various functions expecting only a subset of all possible addressing modes that the MCS-51 offers.
667Polymorphic variants nicely capture the absolutely unorthogonal instruction set of the MCS-51 where every opcode must accept its own subset of the 11 addressing mode of the processor.
668
669The second purpose is to single out sources of incompleteness.
670By abstracting our functions over the dependent type of correct policies, we were able to manifest the fact that the compiler never refuses to compile a program where a correct policy exists.
671This also allowed to simplify the initial proof by dropping lemmas establishing that one function fails if and only if some previous function does so.
672
673Finally, dependent types, together with Matita's liberal system of coercions, allow us to simulate almost entirely in user space the proof methodology `Russell' of Sozeau~\cite{sozeau:subset:2006}.
674Not every proof has been carried out in this way: we only used this style to prove that a function satisfies a specification that only involves that function in a significant way.
675It would not be natural to see the proof that fetch and assembly commute as the specification of one of the two functions.
676\paragraph{Related work}
677% piton
678We are not the first to consider the correctness of an assembler for a non-trivial assembly language.
679The most impressive piece of work in this domain is Piton~\cite{moore:piton:1996}, a stack of verified components, written and verified in ACL2, ranging from a proprietary FM9001 microprocessor verified at the gate level, to assemblers and compilers for two high-level languages---Lisp and $\mu$Gypsy~\cite{moore:grand:2005}.
680
681% jinja
682Klein and Nipkow consider a Java-like programming language, Jinja~\cite{klein:machine:2006}.
683They provide a compiler, virtual machine and operational semantics for the programming language and virtual machine, and prove that their compiler is semantics and type preserving.
684
685We believe some other verified assemblers exist in the literature.
686However, what sets our work apart from that above is our attempt to optimise the machine code generated by our assembler.
687This complicates any formalisation effort, as an attempt at the best possible selection of machine instructions must be made, especially important on a device such as the MCS-51 with a minuscule code memory.
688Further, care must be taken to ensure that the time properties of an assembly program are not modified by the assembly process lest we affect the semantics of any program employing the MCS-51's I/O facilities.
689This is only possible by inducing a cost model on the source code from the optimisation strategy and input program.
690This will be a \emph{leit motif} of CerCo.
691\paragraph{Resources}
692Our source files are available at~\url{http://cerco.cs.unibo.it}.
693We assumed several properties of `library functions', e.g. modular arithmetic and datastructure manipulation.
694We axiomatised various small functions needed to complete the main theorems, as well as some `routine' proof obligations of the theorems themselves, in focussing on the main meat of the theorems.
695We believe that the proof strategy is sound and that we will be able to close all axioms, up to minor bugs that should have local fixes that do not affect the global proof strategy.
696
697The development, including the definition of the executable semantics of the MCS-51, is spread across 29 files, with around 18,500 lines of Matita source.
698The bulk of the proof is contained in a series of files, \texttt{AssemblyProof.ma}, \texttt{AssemblyProofSplit.ma} and \texttt{AssemblyProofSplitSplit.ma} consisting of approximately 4500 lines of Matita source.
699Numerous other lines of proofs are spread all over the development because of dependent types and the Russell proof style, which does not allow one to separate the code from the proofs.
700The low ratio between source lines and the number of lines of proof is unusual, but justified by the fact that the pseudo-assembly and the assembly language share most constructs and large swathes of the semantics are shared.
701Many lines of code are required to describe the complex semantics of the processor, but for the shared cases the proof of preservation of the semantics is essentially trivial.
702
703\bibliography{cpp-2012-asm.bib}
704
705\end{document}\renewcommand{\verb}{\lstinline}
706\def\lstlanguagefiles{lst-grafite.tex}
707\lstset{language=Grafite}
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