source: Papers/cpp-asm-2012/cpp-2012-asm.tex @ 2357

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37\title{On the correctness of an optimising assembler for the Intel MCS-51 microprocessor\thanks{The project CerCo acknowledges the financial support of the Future and Emerging Technologies (FET) programme within the Seventh Framework Programme for Research of the European Commission, under FET-Open grant number: 243881.}}
38\author{Dominic P. Mulligan \and Claudio Sacerdoti Coen}
39\institute{Dipartimento di Scienze dell'Informazione,\\ Universit\'a degli Studi di Bologna}
40
41\bibliographystyle{splncs03}
42
43\begin{document}
44
45\maketitle
46
47\begin{abstract}
48We present a proof of correctness, in Matita, for an optimising assembler for the MCS-51 microcontroller.
49This assembler constitutes a major component of the EU's CerCo project.
50
51The efficient expansion of pseudoinstructions---namely jumps---into MCS-51 machine instructions is complex.
52We isolate the decision making over how jumps should be expanded from the expansion process itself as much as possible using `policies'.
53This makes the proof of correctness for the assembler significantly more straightforward.
54
55We observe that it is impossible for an optimising assembler to preserve the semantics of every assembly program.
56Assembly language programs can manipulate concrete addresses in arbitrary ways.
57Our proof strategy contains a tracking facility for `good addresses' and only programs that use good addresses have their semantics preserved under assembly.
58Our strategy offers increased flexibility over the traditional approach to proving the correctness of assemblers, wherein addresses in assembly are kept opaque and immutable.
59In particular, we may experiment with allowing the benign manipulation of addresses.
60\keywords{Verified software, CerCo (Certified Complexity), MCS-51 microcontroller, Matita proof assistant}
61\end{abstract}
62
63% ---------------------------------------------------------------------------- %
64% SECTION                                                                      %
65% ---------------------------------------------------------------------------- %
66\section{Introduction}
67\label{sect.introduction}
68
69We consider the formalisation of an assembler for the Intel MCS-51 8-bit microprocessor in the Matita proof assistant~\cite{asperti:user:2007}.
70This formalisation forms a major component of the EU-funded CerCo (`Certified Complexity') project~\cite{cerco:2011}, concerning the construction and formalisation of a concrete complexity preserving compiler for a large subset of the C programming language.
71
72The MCS-51 dates from the early 1980s and is commonly called the 8051/8052.
73Despite the microprocessor's age, derivatives are still widely manufactured by a number of semiconductor foundries, with the processor being used especially in embedded systems development, where well-tested, cheap, predictable microprocessors find their niche.
74
75The MCS-51 has a relative paucity of features compared to its more modern brethren, with the lack of any caching or pipelining features meaning that timing of execution is predictable, making the MCS-51 very attractive for CerCo's ends.
76Yet---as with many things---what one hand giveth, the other taketh away, and the MCS-51's paucity of features---though an advantage in many respects---also quickly becomes a hindrance.
77In particular, the MCS-51 features a relatively minuscule series of memory spaces by modern standards.
78As a result our C compiler, to have any sort of hope of successfully compiling realistic programs for embedded devices, ought to produce `tight' machine code.
79
80In order to do this, we must solve the `branch displacement' problem---deciding how best to expand pseudojumps to labels in assembly language to machine code jumps. The branch displacement problem happears when pseudojumps can be expanded
81in different ways to real machine instructions, but the different expansions
82are not equivalent (e.g. do not have the same size or speed) and not always
83correct (e.g. correctness is only up to global constraints over the compiled
84code). For instance, some jump instructions (short jumps) are very small
85and fast, but they can only reach destinations within a
86certain distance from the current instruction. When the destinations are
87too far away, larger and slower long jumps must be used. The use of a long jump may
88augment the distance between another pseudojump and its target, forcing
89another long jump use, in a cascading effect. The job of the optimising
90compiler (assembler) is to individually expand every pseudo-instruction in such a way
91that all global constraints are satisfied and that the compiled program size
92is minimal in size and faster in time.
93This problem is known to be complex for most CISC architectures (see~\cite{hyde:branch:2006}).
94
95To free the CerCo C compiler from having to consider complications relating to branch displacement, we have chosen to implement an optimising assembler, whose input language the compiler will target.
96Labels, conditional jumps to labels, a program preamble containing global data and a \texttt{MOV} instruction for moving this global data into the MCS-51's one 16-bit register all feature in our assembly language.
97We simplify the proof by assuming that all our assembly programs are pre-linked (i.e. we do not formalise a linker---this is left for future work).
98
99Another complication we have addressed is that of the cost model.
100CerCo imposes a cost model on C programs or, more specifically, on simple blocks of instructions.
101This cost model is induced by the compilation process itself, and its non-compositional nature allows us to assign different costs to identical C statements depending on how they are compiled.
102In short, we aim to obtain a very precise costing for a program by embracing the compilation process, not ignoring it.
103At the assembler level, this is reflected by our need to induce a cost
104model on the assembly code as a function of the assembly program and the
105strategy used to solve the branch displacement problem. In particular, the
106optimising compiler should also return a map that assigns a cost (in clock
107cycles) to every instruction in the source program. We expect the induced cost
108to be preserved by the compiler: we will prove that the compiled code
109tightly simulates the source code by taking exactly the predicted amount of
110time.
111
112Note that the temporal tightness of the simulation is a fundamental prerequisite
113of the correctness of the simulation because some functions of the MCS-51---timers and I/O---depend on the microprocessor's clock.
114If the pseudo- and concrete clock differ the result of an I/O operation may not be preserved.
115
116Branch displacement algorithms must have a deep knowledge of the way
117the rest of the assembler works in order to build globally correct solutions.
118Proving their correctness is quite a complex task (see, for instance,
119the compaion paper~\cite{boender:correctness:2012}).
120Nevertheless, the correctness of the whole assembler only depends on the
121correctness of the branch displacement algorithm.
122Therefore, in the rest of the paper, we presuppose the
123existence of a correct policy, to be computed by a branch displacement
124algorithm if it exists. A policy is the decision over how
125any particular jump should be expanded; it is correct when the global
126constraints are satisfied.
127The assembler fails to assemble an assembly program if and only if a correct policy does not exist.
128This is stated in an elegant way in the dependent type of the assembler: the assembly function is total over a program, a policy and the proof that the policy is correct for that program.
129
130The final complication in the proof of correctness of our optimising assembler
131is due to the kind of semantics associated to pseudo-assembly programs.
132Should assembly programs be allowed to freely manipulate addresses? The
133answer to the question deeply affects the proof of correctness.
134The traditional answer is no: values stored in memory or registers are either
135concrete data or symbolic addresses. The latters can be manipulated only
136in very restrictive ways and many programs that do not do so, for malign or
137benign reasons, are not assigned a semantics and cannot be reasoned about.
138All programs that have a semantics have it preserved by the compiler.
139Instead we took a different, novel approach: we allow programs to freely
140manipulate
141addresses non symbolically, but we only grant preservation of the semantics
142for those programs that do behave in a correct, anticipated way. At least
143in principle, this should allow some reasoning on the actual semantics of
144malign programs. In practice, we note how the alternative approach allows
145more code reusal between the semantics of assembly code and object code,
146with benefits on the size of the formalisation.
147
148The rest of this paper is a detailed description of our proof that is marginally still a work in progress.
149In Section~\ref{sect.matita} we provide a brief overview of the Matita proof assistant for the unfamiliar reader.
150In Section~\ref{sect.the.proof} we discuss the design and implementation of the proof proper.
151In Section~\ref{sect.conclusions} we conclude.
152
153% ---------------------------------------------------------------------------- %
154% SECTION                                                                      %
155% ---------------------------------------------------------------------------- %
156\section{Matita}
157\label{sect.matita}
158
159Matita is a proof assistant based on a variant of the Calculus of (Co)inductive Constructions~\cite{asperti:user:2007}.
160In particular, it features dependent types that we exploit in the formalisation.
161The syntax of the statements and definitions in the paper should be self-explanatory, at least to those exposed to dependent type theory.
162Pairs are denoted with angular brackets, $\langle-, -\rangle$.
163
164Matita features a liberal system of coercions.
165It is possible to define a uniform coercion $\lambda x.\langle x,?\rangle$ from every type $T$ to the dependent product $\Sigma x:T.P~x$.
166The coercion opens a proof obligation that asks the user to prove that $P$ holds for $x$.
167When a coercion must be applied to a complex term (a $\lambda$-abstraction, a local definition, or a case analysis), the system automatically propagates the coercion to the sub-terms
168 For instance, to apply a coercion to force $\lambda x.M : A \to B$ to have type $\forall x:A.\Sigma y:B.P~x~y$, the system looks for a coercion from $M: B$ to $\Sigma y:B.P~x~y$ in a context augmented with $x:A$.
169This is significant when the coercion opens a proof obligation, as the user will be presented with multiple, but simpler proof obligations in the correct context.
170In this way, Matita supports the `Russell' proof methodology developed by Sozeau in~\cite{sozeau:subset:2006}, with an implementation that is lighter and more tightly integrated with the system than that of Coq.
171
172Throughout this paper we simplify the statements of lemmas and types of definitions in order to emphasise readability.
173
174% ---------------------------------------------------------------------------- %
175% SECTION                                                                      %
176% ---------------------------------------------------------------------------- %
177\section{The proof}
178\label{sect.the.proof}
179
180The aim of the section is to explain the main ideas and steps of the certified
181proof of correctness for an optimizing assembler for the MCS-51. The
182formalisation is available at~\url{http://cerco.cs.unibo.it}.
183
184In Section~\ref{subsect.machine.code.semantics} we sketch an operational semantics (a realistic and efficient emulator) for the MCS-51.
185We also introduce a syntax for decoded instructions that will be reused for the assembly language.
186
187In Section~\ref{subsect.assembly.code.semantics} we describe the assembly language and its operational semantics.
188The latter is parametric in the cost model that will be induced by the assembler.
189It reuses the semantics of the machine code on all `real' (i.e. non-pseudo-) instructions.
190
191Branch displacement policies are introduced in Section~\ref{subsect.the.assembler} where we also describe the assembler as a function over policies as previously described.
192
193The proof of correctness of the assembler consists in showing that the object code given in output, together with a cost model for the source program, simulates the source program executed using that cost model.
194The proof can be divided into two main lemmas.
195The first is correctness with respect to fetching, described in Section~\ref{subsect.total.correctness.of.the.assembler}.
196It roughly states that one step of fetching at the assembly level that returns the decoded instruction $I$ is simulated by $n$ steps of fetching at the object level that returns instructions $J_1,\ldots,J_n$, where $J_1,\ldots,J_n$ is, amongst the possible expansions of $I$, the one picked by the policy.
197The second lemma shows that $J_1,\ldots,J_n$ simulates $I$ but only if $I$ is well-behaved, i.e. it manipulates addresses in ways that are anticipated in the correctness proof.
198To keep track of well-behaved address manipulations, we couple the assembly status with a map that records where addresses are currently stored in memory or in the processor's accumulators.
199We then introduce a dynamic checking function that inspects the assembly status and this map to determine if the operation is well-behaved.
200An affirmative answer is the pre-condition of the lemma.
201The second lemma is detailed in Section~\ref{subsect.total.correctness.for.well.behaved.assembly.programs} where we also establish correctness of our assembler as a composition of the two lemmas: programs that are well-behaved when executed under the cost model induced by the compiler are correctly simulated by the compiled code.
202
203% ---------------------------------------------------------------------------- %
204% SECTION                                                                      %
205% ---------------------------------------------------------------------------- %
206
207\subsection{Machine code and its semantics}
208\label{subsect.machine.code.semantics}
209
210We implemented a realistic and efficient emulator for the MCS-51 microprocessor.
211An MCS-51 program is just a sequence of bytes stored in the read-only code
212memory of the processor, represented as a compact trie of bytes addressed
213by the program counter.
214The \texttt{Status} of the emulator is described as
215a record that contains the microprocessor's program counter, registers, stack
216pointer, clock, special function registers, code memory, and so on.
217The value of the code memory is a parameter of the record since it is not
218changed during execution.
219
220The \texttt{Status} records is itself an instance of a more general
221datatype \texttt{PreStatus} that abstracts over the implementation of code
222memory in order to reuse the same datatype for the semantics of the assembly
223language in the next section.
224
225The execution of a single instruction is performed by the \texttt{execute\_1}
226function, parametric over the content \texttt{cm} of the code memory:
227\begin{lstlisting}
228definition execute_1: $\forall$cm. Status cm $\rightarrow$ Status cm
229\end{lstlisting}
230
231The function \texttt{execute\_1} closely matches the fetch-decode-execute
232cycle of the MCS-51 hardware, as described by a Siemen's manufacturer's data sheet~\cite{siemens:2011}.
233Fetching and decoding are performed simultaneously:
234we first fetch, using the program counter, from code memory the first byte of the instruction to be executed, decoding the resulting opcode, fetching more bytes as is necessary to decode the arguments.
235Decoded instructions are represented by the \texttt{instruction} data type
236which extends a data type of \texttt{preinstruction}s that will be reused
237for the assembly language.
238\begin{lstlisting}
239inductive preinstruction (A: Type[0]): Type[0] :=
240 | ADD: $\llbracket$acc_a$\rrbracket$ → $\llbracket$registr; direct; indirect; data$\rrbracket$ $\rightarrow$ preinstruction A
241 | DEC: $\llbracket$acc_a; registr; direct; indirect$\rrbracket$ $\rightarrow$ preinstruction A
242 | JB: $\llbracket$bit_addr$\rrbracket$ $\rightarrow$ A $\rightarrow$ preinstruction A
243 | ...
244
245inductive instruction: Type[0] :=
246 | LCALL: $\llbracket$addr16$\rrbracket$ $\rightarrow$ instruction
247 | AJMP: $\llbracket$addr11$\rrbracket$ $\rightarrow$ instruction
248 | RealInstruction: preinstruction $\llbracket$relative$\rrbracket$ $\rightarrow$ instruction.
249 | ...
250\end{lstlisting}
251The MCS-51 has many operand modes, but an unorthogonal instruction set: every
252opcode is only enable for a finite subset of the possible operand modes.
253Here we exploit dependent types and an implicit coercion to synthesize
254the type of arguments of opcodes from a vector of names of operand modes.
255For example, \texttt{ACC} has two operands, the first one constrained to be
256the \texttt{A} accumulator, and the second one to be a disjoint union of
257register, direct, indirect and data operand modes.
258
259The parameterised type $A$ of \texttt{preinstruction} represents the addressing mode allowed for conditional jumps; in the \texttt{RealInstruction} constructor
260we constraint it to be a relative offset. A different instantiation will be
261used in the next Section for assembly programs.
262
263Once decoded, execution proceeds by a case analysis on the decoded instruction, following the operation of the hardware.
264For example, the \texttt{DEC} preinstruction (`decrement') is executed as follows:
265\begin{lstlisting}
266 | DEC addr $\Rightarrow$
267  let s := add_ticks1 s in
268  let $\langle$result, flags$\rangle$ := sub_8_with_carry (get_arg_8 s true addr)
269   (bitvector_of_nat 8 1) false in
270     set_arg_8 s addr result
271\end{lstlisting}
272
273Here, \texttt{add\_ticks1} models the incrementing of the internal clock of the microprocessor; it is a parameter of the semantics of \texttt{preinstruction}s
274that is fixed in the semantics of \texttt{instruction}s according to the
275manufacturer datasheet.
276
277% ---------------------------------------------------------------------------- %
278% SECTION                                                                      %
279% ---------------------------------------------------------------------------- %
280
281\subsection{Assembly code and its semantics}
282\label{subsect.assembly.code.semantics}
283
284An assembly program is a list of potentially labelled pseudoinstructions, bundled with a preamble consisting of a list of symbolic names for locations in data memory (i.e. global variables).
285All preinstructions are pseudoinstructions, but conditional jumps are now
286only allowed to use \texttt{Identifiers} (labels) as their target.
287\begin{lstlisting}
288inductive pseudo_instruction: Type[0] :=
289  | Instruction: preinstruction Identifier $\rightarrow$ pseudo_instruction
290    ...
291  | Jmp: Identifier $\rightarrow$ pseudo_instruction
292  | Call: Identifier $\rightarrow$ pseudo_instruction
293  | Mov: $\llbracket$dptr$\rrbracket$ $\rightarrow$ Identifier $\rightarrow$ pseudo_instruction.
294\end{lstlisting}
295The pseudoinstructions \texttt{Jmp}, \texttt{Call} and \texttt{Mov} are generalisations of machine code unconditional jumps, calls and move instructions respectively, all of whom act on labels, as opposed to concrete memory addresses.
296The object code calls and jumps that act on concrete memory addresses are ruled
297out of assembly programs since they are not preinstructions (see previous
298Section).
299
300Execution of pseudoinstructions is an endofunction on \texttt{PseudoStatus}.
301A \texttt{PseudoStatus} is an instance of \texttt{PreStatus} that differs
302from a \texttt{Status} only in the datatype used for code memory: a list
303of optionally labelled pseudoinstructions versus a trie of bytes.
304The \texttt{PreStatus} type is crucial for sharing the majority of the
305semantics of the two languages.
306
307Emulation for pseudoinstructions is handled by \texttt{execute\_1\_pseudo\_instruction}:
308\begin{lstlisting}
309definition execute_1_pseudo_instruction:
310 $\forall$cm. ($\forall$ppc: Word. ppc < $\mid$snd cm$\mid$ $\rightarrow$ nat $\times$ nat) $\rightarrow$ $\forall$s:PseudoStatus cm.
311  program_counter s < $\mid$snd cm$\mid$ $\rightarrow$ PseudoStatus cm
312\end{lstlisting}
313The type of \texttt{execute\_1\_pseudo\_instruction} is more involved than
314that of \texttt{execute\_1}. The first difference is that execution is only
315defined when the program counter points to a valid instruction, i.e.
316it is smaller than the length $\mid$\texttt{snd cm}$\mid$ of the program.
317The second difference is the abstraction over the cost model, abbreviated
318here as \emph{costing}.
319The costing is a function that maps valid program counters to pairs of natural numbers representing the number of clock ticks used by the pseudoinstructions stored at those program counters. For conditional jumps the two numbers differ
320to represent different costs for the `true branch' and the `false branch'.
321In the next Section we will see how the optimizing
322assembler induces the only costing that is preserved by compilation.
323Obviously the induced costing is determined by the branch displacement policy
324that decides how to expand every pseudojump to a label into concrete
325instructions.
326
327Execution proceeds by first fetching from pseudo-code memory using the program counter---treated as an index into the pseudoinstruction list.
328This index is always guaranteed to be within the bounds of the pseudoinstruction list due to the dependent type placed on the function.
329No decoding is required.
330We then proceed by case analysis over the pseudoinstruction, reusing the code for object code for all instructions present in the MCS-51's instruction set.
331For all newly introduced pseudoinstructions, we simply translate labels to concrete addresses before behaving as a `real' instruction.
332
333In contrast to other approaches, we do not perform any kind of symbolic execution, wherein data is the disjoint union of bytes and addresses, with addresses kept opaque and immutable.
334Labels are immediately translated to concrete addresses, and registers and memory locations only ever contain bytes, never labels.
335As a consequence, we allow the programmer to mangle, change and generally adjust addresses as they want, under the proviso that the translation process may not be able to preserve the semantics of programs that do this.
336This will be further discussed in Subsection~\ref{subsect.total.correctness.for.well.behaved.assembly.programs}.
337
338% ---------------------------------------------------------------------------- %
339% SECTION                                                                      %
340% ---------------------------------------------------------------------------- %
341
342\subsection{The assembler}
343\label{subsect.the.assembler}
344
345Conceptually the assembler works in two passes.
346The first pass expands pseudoinstructions into a list of machine code instructions using the function \texttt{expand\_pseudo\_instruction}.
347The second pass encodes as a list of bytes the expanded instruction list by mapping the function \texttt{assembly1} across the list, and then flattening.
348\begin{displaymath}
349[\mathtt{P_1}, \ldots \mathtt{P_n}] \xrightarrow{\left(\mathtt{P_i} \xrightarrow{\mbox{\fontsize{7}{9}\selectfont$\mathtt{expand\_pseudo\_instruction}$}} \mathtt{[I^1_i, \ldots I^q_i]} \xrightarrow{\mbox{\fontsize{7}{9}\selectfont$\mathtt{~~~~~~~~assembly1^{*}~~~~~~~~}$}} \mathtt{[0110]}\right)^{*}} \mathtt{[010101]}
350\end{displaymath}
351The most complex of the two passes is the first, which expands pseudoinstructions and must perform the task of branch displacement~\cite{hyde:branch:2006}.
352The function \texttt{assembly\_1\_pseudo\_instruction} used in the body of the paper is essentially the composition of the two passes.
353
354The branch displacement problem refers to the task of expanding pseudojumps into their concrete counterparts, preferably as efficiently as possible.
355For instance, the MCS-51 features three unconditional jump instructions: \texttt{LJMP} and \texttt{SJMP}---`long jump' and `short jump' respectively---and an 11-bit oddity of the MCS-51, \texttt{AJMP}.
356Each of these three instructions expects arguments in different sizes and behaves in markedly different ways: \texttt{SJMP} may only perform a `local jump'; \texttt{LJMP} may jump to any address in the MCS-51's memory space and \texttt{AJMP} may jump to any address in the current memory page.
357Consequently, the size of each opcode is different, and to squeeze as much code as possible into the MCS-51's limited code memory, the smallest possible opcode that will suffice should be selected.
358
359Similarly, a conditional pseudojump must be translated potentially into a configuration of machine code instructions, depending on the distance to the jump's target.
360For example, to translate a jump to a label, a single conditional jump pseudoinstruction may be translated into a block of three real instructions as follows (here, \texttt{JZ} is `jump if accumulator is zero'):
361{\small{
362\begin{displaymath}
363\begin{array}{r@{\quad}l@{\;\;}l@{\qquad}c@{\qquad}l@{\;\;}l}
364       & \mathtt{JZ}  & \mathtt{label}                      &                 & \mathtt{JZ}   & \text{size of \texttt{SJMP} instruction} \\
365       & \ldots       &                            & \text{translates to}   & \mathtt{SJMP} & \text{size of \texttt{LJMP} instruction} \\
366\mathtt{label:} & \mathtt{MOV} & \mathtt{A}\;\;\mathtt{B}   & \Longrightarrow & \mathtt{LJMP} & \text{address of \textit{label}} \\
367       &              &                            &                 & \ldots        & \\
368       &              &                            &                 & \mathtt{MOV}  & \mathtt{A}\;\;\mathtt{B}
369\end{array}
370\end{displaymath}}}
371Here, if \texttt{JZ} fails, we fall through to the \texttt{SJMP} which jumps over the \texttt{LJMP}.
372Naturally, if \texttt{label} is `close enough', a conditional jump pseudoinstruction is mapped directly to a conditional jump machine instruction; the above translation only applies if \texttt{label} is not sufficiently local.
373
374In order to implement branch displacement it is impossible to really make the \texttt{expand\_pseudo\_instruction} function completely independent of the encoding function.
375This is due to branch displacement requiring the distance in bytes of the target of the jump.
376Moreover the standard solutions for solving the branch displacement problem find their solutions iteratively, by either starting from a solution where all jumps are long, and shrinking them when possible, or starting from a state where all jumps are short and increasing their length as needed.
377Proving the correctness of such algorithms is already quite involved and the correctness of the assembler as a whole does not depend on the `quality' of the solution found to a branch displacement problem.
378For this reason, we try to isolate the computation of a branch displacement problem from the proof of correctness for the assembler by parameterising our \texttt{expand\_pseudo\_instruction} by a `policy'.
379
380\begin{lstlisting}
381definition expand_pseudo_instruction:
382 $\forall$lookup_labels: Identifier $\rightarrow$ Word.
383 $\forall$policy.
384 $\forall$ppc: Word.
385 $\forall$lookup_datalabels: Identifier $\rightarrow$ Word.
386 $\forall$pi: pseudo_instruction.
387  list instruction := ...
388\end{lstlisting}
389Here, the functions \texttt{lookup\_labels} and \texttt{lookup\_datalabels} are the functions that map labels and datalabels to program counters respectively, both of them used in the semantics of assembly.
390The input \texttt{pi} is the pseudoinstruction to be expanded and is found at address \texttt{ppc} in the assembly program.
391The function takes \texttt{policy} as an input.
392In reality, this is a pair of functions, but for the purposes of this paper we simplify.
393The \texttt{policy} maps pseudo-program counters to program counters: the encoding of the expansion of the pseudoinstruction found at address \texttt{a} in the assembly code should be placed into code memory at address \texttt{policy(a)}.
394Of course this is possible only if the policy is correct, which means that the encoding of consecutive assembly instructions must be consecutive in code memory.
395\begin{displaymath}
396\texttt{policy}(\texttt{ppc} + 1) = \texttt{pc} + \texttt{current\_instruction\_size}
397\end{displaymath}
398Here, \texttt{current\_instruction\_size} is the size in bytes of the encoding of the expanded pseudoinstruction found at \texttt{ppc}.
399Note that the entanglement we hinted at is only partially solved in this way: the assembler code can ignore the implementation details of the algorithm that finds a policy;
400however, the algorithm that finds a policy must know the exact behaviour of the assembly program because it needs to predict the way the assembly will expand and encode pseudoinstructions, once fed with a policy.
401A companion submission to this one~\cite{boender:correctness:2012} certifies an algorithm that finds branch displacement policies for the assembler described in this paper.
402
403The \texttt{expand\_pseudo\_instruction} function uses the \texttt{policy} map to determine the size of jump required when expanding pseudojumps, computing the jump size by examining the size of the differences between program counters.
404For instance, if at address \texttt{ppc} in the assembly program we found \texttt{Jmp l} such that \texttt{lookup\_labels l = a}, if the offset \texttt{d = policy(a) - policy(ppc + 1)} is such that \texttt{d} $< 128$ then \texttt{Jmp l} is normally translated to the best local solution, the short jump \texttt{SJMP d}.
405A global best solution to the branch displacement problem, however, is not always made of locally best solutions.
406Therefore, in some circumstances, it is necessary to force the assembler to expand jumps into larger ones.
407This is achieved by another boolean-valued function such that if the function applied to \texttt{ppc} returns true then a \texttt{Jmp l} at address \texttt{ppc} is always translated to a long jump.
408An essentially identical mechanism exists for call instructions.
409
410% ---------------------------------------------------------------------------- %
411% SECTION                                                                      %
412% ---------------------------------------------------------------------------- %
413\subsection{Correctness of the assembler with respect to fetching}
414\label{subsect.total.correctness.of.the.assembler}
415Using our policies, we now work toward proving the correctness of the assembler.
416Correctness means that the assembly process never fails when provided with a correct policy and that the process does not change the semantics of a certain class of well-behaved assembly programs.
417
418The aim of this section is to prove the following informal statement: when we fetch an assembly pseudoinstruction \texttt{I} at address \texttt{ppc}, then we can fetch the expanded pseudoinstruction(s) \texttt{[J1, \ldots, Jn] = fetch\_pseudo\_instruction \ldots\ I\ ppc} from \texttt{policy ppc} in the code memory obtained by loading the assembled object code.
419This constitutes the first major step in the proof of correctness of the assembler, the next one being the simulation of \texttt{I} by \texttt{[J1, \ldots, Jn]} (see Subsection~\ref{subsect.total.correctness.for.well.behaved.assembly.programs}).
420
421The \texttt{assembly} function is given a Russell type (slightly simplified here):
422\begin{lstlisting}
423definition assembly:
424  $\forall$program: pseudo_assembly_program.
425  $\forall$policy.
426    $\Sigma$assembled: list Byte $\times$ (BitVectorTrie costlabel 16).
427      policy is correct for program $\rightarrow$
428      $\mid$program$\mid$ < $2^{16}$ $\rightarrow$ $\mid$fst assembled$\mid$ < $2^{16}$ $\wedge$
429      (policy ($\mid$program$\mid$) = $\mid$fst assembled$\mid$ $\vee$
430      (policy ($\mid$program$\mid$) = 0 $\wedge$ $\mid$fst assembled$\mid$ = $2^{16}$)) $\wedge$
431      $\forall$ppc: pseudo_program_counter. ppc < $2^{16}$ $\rightarrow$
432        let pseudo_instr := fetch from program at ppc in
433        let assembled_i := assemble pseudo_instr in
434          $\mid$assembled_i$\mid$ $\leq$ $2^{16}$ $\wedge$
435            $\forall$n: nat. n < $\mid$assembled_i$\mid$ $\rightarrow$ $\exists$k: nat.
436              nth assembled_i n = nth assembled (policy ppc + k).
437\end{lstlisting}
438In plain words, the type of \texttt{assembly} states the following.
439Suppose we are given a policy that is correct for the program we are assembling.
440Then we return a list of assembled bytes, complete with a map from program counters to cost labels, such that the following properties hold for the list of bytes.
441Under the condition that the policy is `correct' for the program and the program is fully addressable by a 16-bit word, the assembled list is also fully addressable by a 16-bit word, the policy maps the last program counter that can address the program to the last instruction of the assemble pseudoinstruction or overflows, and if we fetch from the pseudo-program counter \texttt{ppc} we get a pseudoinstruction \texttt{pi} and a new pseudo-program counter \texttt{ppc}.
442Further, assembling the pseudoinstruction \texttt{pseudo\_instr} results in a list of bytes, \texttt{assembled\_i}.
443Then, indexing into this list with any natural number \texttt{n} less than the length of \texttt{assembled\_i} gives the same result as indexing into \texttt{assembled} with \texttt{policy ppc} (the program counter pointing to the start of the expansion in \texttt{assembled}) plus \texttt{k}.
444
445Essentially the lemma above states that the \texttt{assembly} function correctly expands pseudoinstructions, and that the expanded instruction reside consecutively in memory.
446This result is lifted from lists of bytes into a result on tries of bytes (i.e. code memories), using an additional lemma: \texttt{assembly\_ok}.
447
448Lemma \texttt{fetch\_assembly} establishes that the \texttt{fetch} and \texttt{assembly1} functions interact correctly.
449The \texttt{fetch} function, as its name implies, fetches the instruction indexed by the program counter in the code memory, while \texttt{assembly1} maps a single instruction to its byte encoding:
450\begin{lstlisting}
451lemma fetch_assembly:
452 $\forall$pc: Word.
453 $\forall$i: instruction.
454 $\forall$code_memory: BitVectorTrie Byte 16.
455 $\forall$assembled: list Byte.
456  assembled = assemble i $\rightarrow$
457  let len := $\mid$assembled$\mid$ in
458  let pc_plus_len := pc + len in
459   encoding_check pc pc_plus_len assembled $\rightarrow$
460   let $\langle$instr, pc', ticks$\rangle$ := fetch pc in
461    instr = i $\wedge$ ticks = (ticks_of_instruction instr) $\wedge$ pc' = pc_plus_len.
462\end{lstlisting}
463In particular, we read \texttt{fetch\_assembly} as follows.
464Given an instruction, \texttt{i}, we first assemble the instruction to obtain \texttt{assembled}, checking that the assembled instruction was stored in code memory correctly.
465Fetching from code memory, we obtain a tuple consisting of the instruction, new program counter, and the number of ticks this instruction will take to execute.
466We finally check that the fetched instruction is the same instruction that we began with, and the number of ticks this instruction will take to execute is the same as the result returned by a lookup function, \texttt{ticks\_of\_instruction}, devoted to tracking this information.
467Or, in plainer words, assembling and then immediately fetching again gets you back to where you started.
468
469Lemma \texttt{fetch\_assembly\_pseudo} is obtained by composition of \texttt{expand\_pseudo\_instruction} and \texttt{assembly\_1\_pseudoinstruction}:
470\begin{lstlisting}
471lemma fetch_assembly_pseudo:
472 $\forall$program: pseudo_assembly_program.
473 $\forall$policy.
474 $\forall$ppc.
475 $\forall$code_memory.
476 let $\langle$preamble, instr_list$\rangle$ := program in
477 let pi := $\pi_1$ (fetch_pseudo_instruction instr_list ppc) in
478 let pc := policy ppc in
479 let instrs := expand_pseudo_instructio policy ppc pi in
480 let $\langle$l, a$\rangle$ := assembly_1_pseudoinstruction policy ppc pi in
481 let pc_plus_len := pc + l in
482  encoding_check code_memory pc pc_plus_len a $\rightarrow$
483   fetch_many code_memory pc_plus_len pc instructions.
484\end{lstlisting}
485Here, \texttt{l} is the number of machine code instructions the pseudoinstruction at hand has been expanded into.
486We assemble a single pseudoinstruction with \texttt{assembly\_1\_pseudoinstruction}, which internally calls \texttt{expand\_pseudo\_instruction}.
487The function \texttt{fetch\_many} fetches multiple machine code instructions from code memory and performs some routine checks.
488
489Intuitively, Lemma \texttt{fetch\_assembly\_pseudo} can be read as follows.
490Suppose we expand the pseudoinstruction at \texttt{ppc} with the policy, obtaining the list of machine code instructions \texttt{instrs}.
491Suppose we also assemble the pseudoinstruction at \texttt{ppc} to obtain \texttt{a}, a list of bytes.
492Then, we check with \texttt{fetch\_many} that the number of machine instructions that were fetched matches the number of instruction that \texttt{expand\_pseudo\_instruction} expanded.
493
494The final lemma in this series is \texttt{fetch\_assembly\_pseudo2} that combines the Lemma \texttt{fetch\_assembly\_pseudo} with the correctness of the functions that load object code into the processor's memory:
495\begin{lstlisting}
496lemma fetch_assembly_pseudo2:
497 $\forall$program.
498 $\mid$snd program$\mid$ $\leq$ $2^{16}$ $\rightarrow$
499 $\forall$policy.
500 policy is correct for program $\rightarrow$
501 $\forall$ppc. ppc < $\mid$snd program$\mid$ $\rightarrow$
502  let $\langle$labels, costs$\rangle$ := create_label_cost_map program in
503  let $\langle$assembled, costs'$\rangle$ := $\pi_1$ (assembly program policy) in
504  let cmem := load_code_memory assembled in
505  let $\langle$pi, newppc$\rangle$ := fetch_pseudo_instruction program ppc in
506  let instructions := expand_pseudo_instruction policy ppc pi in
507    fetch_many cmem (policy newppc) (policy ppc) instructions.
508\end{lstlisting}
509
510Here we use $\pi_1$ to project the existential witness from the Russell-typed function \texttt{assembly}.
511
512We read \texttt{fetch\_assembly\_pseudo2} as follows.
513Suppose we are given an assembly program which can be addressed by a 16-bit word and a policy that is correct for this program.
514Suppose we are able to successfully assemble an assembly program using \texttt{assembly} and produce a code memory, \texttt{cmem}.
515Then, fetching a pseudoinstruction from the pseudo-code memory at address \texttt{ppc} corresponds to fetching a sequence of instructions from the real code memory using \texttt{policy} to expand pseudoinstructions.
516The fetched sequence corresponds to the expansion, according to the policy, of the pseudoinstruction.
517
518At first, the lemma appears to immediately imply the correctness of the assembler.
519However, this property is \emph{not} strong enough to establish that the semantics of an assembly program has been preserved by the assembly process since it does not establish the correspondence between the semantics of a pseudoinstruction and that of its expansion.
520In particular, the two semantics differ on instructions that \emph{could} directly manipulate program addresses.
521
522% ---------------------------------------------------------------------------- %
523% SECTION                                                                      %
524% ---------------------------------------------------------------------------- %
525\subsection{Correctness for `well-behaved' assembly programs}
526\label{subsect.total.correctness.for.well.behaved.assembly.programs}
527
528The traditional approach to verifying the correctness of an assembler is to treat memory addresses as opaque structures that cannot be modified.
529Memory is represented as a map from opaque addresses to the disjoint union of data and opaque addresses---addresses are kept opaque to prevent their possible `semantics breaking' manipulation by assembly programs:
530\begin{displaymath}
531\mathtt{Mem} : \mathtt{Addr} \rightarrow \mathtt{Bytes} + \mathtt{Addr} \qquad \llbracket - \rrbracket : \mathtt{Instr} \rightarrow \mathtt{Mem} \rightarrow \mathtt{option\ Mem}
532\end{displaymath}
533The semantics of a pseudoinstruction, $\llbracket - \rrbracket$, is given as a possibly failing function from pseudoinstructions and memory spaces to new memory spaces.
534The semantic function proceeds by case analysis over the operands of a given instruction, failing if either operand is an opaque address, or otherwise succeeding, updating memory.
535\begin{gather*}
536\llbracket \mathtt{ADD\ @A1\ @A2} \rrbracket^\mathtt{M} = \begin{cases}
537                                                              \mathtt{Byte\ b1},\ \mathtt{Byte\ b2} & \rightarrow \mathtt{Some}(\mathtt{M}\ \text{with}\ \mathtt{b1} + \mathtt{b2}) \\
538                                                              -,\ \mathtt{Addr\ a} & \rightarrow \mathtt{None} \\
539                                                              \mathtt{Addr\ a},\ - & \rightarrow \mathtt{None}
540                                                            \end{cases}
541\end{gather*}
542In contrast, in this paper we take a different approach.
543We trace memory locations (and, potentially, registers) that contain memory addresses.
544We then prove that only those assembly programs that use addresses in `safe' ways have their semantics preserved by the assembly process---a sort of dynamic type system sitting atop memory.
545
546We believe that this approach is more flexible when compared to the traditional approach, as in principle it allows us to introduce some permitted \emph{benign} manipulations of addresses that the traditional approach, using opaque addresses, cannot handle, therefore expanding the set of input programs that can be assembled correctly.
547This approach, of using real addresses coupled with a weak, dynamic typing system sitting atop of memory, is similar to one taken by Tuch \emph{et al}~\cite{tuch:types:2007}, for reasoning about low-level C code.
548
549Our analogue of the semantic function above is then merely a wrapper around the function that implements the semantics of machine code, paired with a function that keeps track of addresses.
550This permits a large amount of code reuse, as the semantics of pseudo- and machine code are essentially shared.
551The only thing that changes at the assembly level is the presence of the new tracking function.
552
553However, with this approach we must detect (at run time) programs that manipulate addresses in well-behaved ways, according to some approximation of well-behavedness.
554We use an \texttt{internal\_pseudo\_address\_map} to trace addresses of code memory addresses in internal RAM:
555\begin{lstlisting}
556definition address_entry := upper_lower $\times$ Byte.
557
558definition internal_pseudo_address_map :=
559  (BitVectorTrie address_entry 7) $\times$ (BitVectorTrie address_entry 7)
560    $\times$ (option address_entry).
561\end{lstlisting}
562Here, \texttt{upper\_lower} is a type isomorphic to the booleans denoting whether a byte value is the upper or lower byte of some 16-bit address.
563
564The implementation of \texttt{internal\_pseudo\_address\_map} is complicated by some peculiarities of the MCS-51's instruction set.
565Note here that all addresses are 16 bit words, but are stored (and manipulated) as 8 bit bytes.
566All \texttt{MOV} instructions in the MCS-51 must use the accumulator \texttt{A} as an intermediary, moving a byte at a time.
567The third component of \texttt{internal\_pseudo\_address\_map} therefore states whether the accumulator currently holds a piece of an address, and if so, whether it is the upper or lower byte of the address (using the \texttt{upper\_lower} flag) complete with the corresponding source address in full.
568The first and second components, on the other hand, performs a similar task for the higher and lower external RAM.
569Again, we use our \texttt{upper\_lower} flag to describe whether a byte is the upper or lower component of a 16-bit address.
570
571The \texttt{low\_internal\_ram\_of\_pseudo\_low\_internal\_ram} function converts the lower internal RAM of a \texttt{PseudoStatus} into the lower internal RAM of a \texttt{Status}.
572A similar function exists for high internal RAM.
573Note that both RAM segments are indexed using addresses 7-bits long:
574\begin{lstlisting}
575definition low_internal_ram_of_pseudo_low_internal_ram:
576 internal_pseudo_address_map $\rightarrow$ policy $\rightarrow$ BitVectorTrie Byte 7
577  $\rightarrow$ BitVectorTrie Byte 7.
578\end{lstlisting}
579
580Next, we are able to translate \texttt{PseudoStatus} records into \texttt{Status} records using \texttt{status\_of\_pseudo\_status}.
581Translating a \texttt{PseudoStatus}'s code memory requires we expand pseudoinstructions and then assemble to obtain a trie of bytes.
582This never fails, provided that our policy is correct:
583\begin{lstlisting}
584definition status_of_pseudo_status:
585 internal_pseudo_address_map $\rightarrow$ $\forall$pap. $\forall$ps: PseudoStatus pap.
586 $\forall$policy. Status (code_memory_of_pseudo_assembly_program pap policy)
587\end{lstlisting}
588
589The \texttt{next\_internal\_pseudo\_address\_map} function is responsible for run time monitoring of the behaviour of assembly programs, in order to detect well-behaved ones.
590It returns a map that traces memory addresses in internal RAM after execution of the next pseudoinstruction, failing when the instruction tampers with memory addresses in unanticipated (but potentially correct) ways.
591It thus decides the membership of a strict subset of the set of well-behaved programs.
592\begin{lstlisting}
593definition next_internal_pseudo_address_map: internal_pseudo_address_map $\rightarrow$
594 $\forall$cm. (Identifier $\rightarrow$ PseudoStatus cm $\rightarrow$ Word) $\rightarrow$ $\forall$s: PseudoStatus cm.
595   program_counter s < $2^{16}$ $\rightarrow$ option internal_pseudo_address_map
596\end{lstlisting}
597If we wished to allow `benign manipulations' of addresses, it would be this function that needs to be changed.
598Note we once again use dependent types to ensure that program counters are properly within bounds.
599The third argument is a function that resolves the concrete address of a label.
600
601The function \texttt{ticks\_of0} computes how long---in clock cycles---a pseudoinstruction will take to execute when expanded in accordance with a given policy.
602The function returns a pair of natural numbers, needed for recording the execution times of each branch of a conditional jump.
603\begin{lstlisting}
604definition ticks_of0:
605 pseudo_assembly_program $\rightarrow$ (Identifier $\rightarrow$ Word) $\rightarrow$ $\forall$policy. Word $\rightarrow$
606   pseudo_instruction $\rightarrow$ nat $\times$ nat
607\end{lstlisting}
608An additional function, \texttt{ticks\_of}, is merely a wrapper around this function.
609
610Finally, we are able to state and prove our main theorem.
611This relates the execution of a single assembly instruction and the execution of (possibly) many machine code instructions, as long as we are able to track memory addresses properly:
612\begin{lstlisting}
613theorem main_thm:
614 $\forall$M, M': internal_pseudo_address_map.
615 $\forall$program: pseudo_assembly_program.
616 $\forall$program_in_bounds: $\mid$program$\mid$ $\leq$ $2^{16}$.
617 let maps := create_label_cost_map program in
618 let addr_of := ... in
619 program is well labelled $\rightarrow$
620 $\forall$policy. policy is correct for program.
621 $\forall$ps: PseudoStatus program. ps < $\mid$program$\mid$.
622  next_internal_pseudo_address_map M program ... = Some M' $\rightarrow$
623   $\exists$n. execute n (status_of_pseudo_status M ps policy) =
624    status_of_pseudo_status M'
625      (execute_1_pseudo_instruction program
626       (ticks_of program ($\lambda$id. addr_of id ps) policy) ps) policy.
627\end{lstlisting}
628The statement is standard for forward simulation, but restricted to \texttt{PseudoStatuses} \texttt{ps} whose next instruction to be executed is well-behaved with respect to the \texttt{internal\_pseudo\_address\_map} \texttt{M}.
629Further, we explicitly require proof that our policy is correct, our program is well-labelled (i.e. no repeated labels, and so on) and the pseudo-program counter lies within the bounds of the program.
630Theorem \texttt{main\_thm} establishes the correctness of the assembly process and can simply be lifted to the forward simulation of an arbitrary number of well-behaved steps on the assembly program.
631
632% ---------------------------------------------------------------------------- %
633% SECTION                                                                      %
634% ---------------------------------------------------------------------------- %
635\section{Conclusions}
636\label{sect.conclusions}
637
638We are proving the correctness of an assembler for MCS-51 assembly language.
639In particular, our assembly language features labels, arbitrary conditional and unconditional jumps to labels, global data and instructions for moving this data into the MCS-51's single 16-bit register.
640Expanding these pseudoinstructions into machine code instructions is not trivial, and the proof that the assembly process is `correct', in that the semantics of a subset of assembly programs are not changed is complex.
641
642The formalisation is a key component of the CerCo project, which aims to produce a verified concrete complexity preserving compiler for a large subset of the C programming language.
643The verified assembler, complete with the underlying formalisation of the semantics of MCS-51 machine code, will form the bedrock layer upon which the rest of the CerCo project will build its verified compiler platform.
644
645It is interesting to compare our work to an `industrial grade' assembler for the MCS-51: SDCC~\cite{sdcc:2011}.
646SDCC is the only open source C compiler that targets the MCS-51 instruction set.
647It appears that all pseudojumps in SDCC assembly are expanded to \texttt{LJMP} instructions, the worst possible jump expansion policy from an efficiency point of view.
648Note that this policy is the only possible policy \emph{in theory} that can preserve the semantics of an assembly program during the assembly process.
649However, this comes at the expense of assembler completeness: the generated program may be too large to fit into code memory.
650In this respect, there is a trade-off between the completeness of the assembler and the efficiency of the assembled program.
651The definition and proof of a terminating, correct jump expansion policy is described in a companion publication to this one~\cite{boender:correctness:2012}.
652
653Aside from their application in verified compiler projects such as CerCo, CompCert~\cite{leroy:formally:2009} and CompCertTSO~\cite{sevcik:relaxed-memory:2011}, verified assemblers such as ours could also be applied to the verification of operating system kernels.
654Of particular note is the verified seL4 kernel~\cite{klein:sel4:2009}.
655This verification explicitly assumes the existence of, amongst other things, a trustworthy assembler and compiler.
656
657Note that both CompCert, CompCertTSO and the seL4 formalisation assume the existence of `trustworthy' assemblers.
658For instance, the CompCert C compiler's backend stops at the PowerPC assembly language, in the default backend.
659The observation that an optimising assembler cannot preserve the semantics of every assembly program may have important consequences for these projects (though in the case of CompCertTSO, targetting a multiprocessor, what exactly constitutes the subset of `good programs' may not be entirely clear).
660If CompCert chooses to assume the existence of an optimising assembler, then care should be made to ensure that any assembly program produced by the CompCert compiler falls into the subset of programs that have a hope of having their semantics preserved by an optimising assembler.
661
662Our formalisation exploits dependent types in different ways and for multiple purposes.
663The first purpose is to reduce potential errors in the formalisation of the microprocessor.
664In particular, dependent types are used to constrain the size of bitvectors and tries that represent memory quantities and memory areas respectively.
665They are also used to simulate polymorphic variants in Matita, in order to provide precise typings to various functions expecting only a subset of all possible addressing modes that the MCS-51 offers.
666Polymorphic variants nicely capture the absolutely unorthogonal instruction set of the MCS-51 where every opcode must accept its own subset of the 11 addressing mode of the processor.
667
668The second purpose is to single out sources of incompleteness.
669By abstracting our functions over the dependent type of correct policies, we were able to manifest the fact that the compiler never refuses to compile a program where a correct policy exists.
670This also allowed to simplify the initial proof by dropping lemmas establishing that one function fails if and only if some previous function does so.
671
672Finally, dependent types, together with Matita's liberal system of coercions, allow us to simulate almost entirely in user space the proof methodology `Russell' of Sozeau~\cite{sozeau:subset:2006}.
673Not every proof has been carried out in this way: we only used this style to prove that a function satisfies a specification that only involves that function in a significant way.
674It would not be natural to see the proof that fetch and assembly commute as the specification of one of the two functions.
675
676\subsection{Related work}
677\label{subsect.related.work}
678
679% piton
680We are not the first to consider the correctness of an assembler for a non-trivial assembly language.
681The most impressive piece of work in this domain is the Piton stack~\cite{moore:piton:1996}, a stack of verified components, written and verified in ACL2, ranging from a proprietary FM9001 microprocessor verified at the gate level, to assemblers and compilers for two high-level languages---Lisp and $\mu$Gypsy~\cite{moore:grand:2005}.
682
683% jinja
684Klein and Nipkow consider a Java-like programming language, Jinja~\cite{klein:machine:2006}.
685They provide a compiler, virtual machine and operational semantics for the programming language and virtual machine, and prove that their compiler is semantics and type preserving.
686
687We believe some other verified assemblers exist in the literature.
688However, what sets our work apart from that above is our attempt to optimise the machine code generated by our assembler.
689This complicates any formalisation effort, as an attempt at the best possible selection of machine instructions must be made, especially important on a device such as the MCS-51 with a minuscule code memory.
690Further, care must be taken to ensure that the time properties of an assembly program are not modified by the assembly process lest we affect the semantics of any program employing the MCS-51's I/O facilities.
691This is only possible by inducing a cost model on the source code from the optimisation strategy and input program.
692This will be a \emph{leit motif} of CerCo.
693
694\subsection{Resources}
695\label{subsect.resources}
696
697All files relating to our formalisation effort can be found online at~\url{http://cerco.cs.unibo.it}.
698In particular, we have assumed several properties of `library functions' related in particular to modular arithmetic and datastructure manipulation.
699Moreover, we have axiomatised various ancillary functions needed to complete the main theorems, as well as some `routine' proof obligations of the theorems themselves, preferring instead to focus on the main meat of the theorems.
700We thus believe that the proof strategy is sound and that we will be able to close soon all axioms, up to possible minor bugs that should have local fixes that do not affect the global proof strategy.
701
702The development, including the definition of the executable semantics of the MCS-51, is spread across 29 files, totalling around 18,500 lines of Matita source.
703The bulk of the proof described herein is contained in a series of files, \texttt{AssemblyProof.ma}, \texttt{AssemblyProofSplit.ma} and \texttt{AssemblyProofSplitSplit.ma} consisting at the moment of approximately 4200 lines of Matita source.
704Numerous other lines of proofs are spread all over the development because of dependent types and the Russell proof style, which does not allow one to separate the code from the proofs.
705The low ratio between the number of lines of code and the number of lines of proof is unusual.
706It is justified by the fact that the pseudo-assembly and the assembly language share most constructs and that large parts of the semantics are also shared.
707Therefore many lines of code are required to describe the complex semantics of the processor, but, for the shared cases, the proof of preservation of the semantics is essentially trivial.
708
709\bibliography{cpp-2012-asm.bib}
710
711\end{document}\renewcommand{\verb}{\lstinline}
712\def\lstlanguagefiles{lst-grafite.tex}
713\lstset{language=Grafite}
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