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37\title{On the correctness of an optimising assembler for the Intel MCS-51 microprocessor\thanks{The project CerCo acknowledges the financial support of the Future and Emerging Technologies (FET) programme within the Seventh Framework Programme for Research of the European Commission, under FET-Open grant number: 243881.}}
38\author{Dominic P. Mulligan \and Claudio Sacerdoti Coen}
39\institute{Dipartimento di Scienze dell'Informazione,\\ Universit\'a degli Studi di Bologna}
40
41\bibliographystyle{splncs03}
42
43\begin{document}
44
45\maketitle
46
47\begin{abstract}
48We present a proof of correctness, in Matita, for an optimising assembler for the MCS-51 microcontroller.
49This assembler constitutes a major component of the EU's CerCo project.
50
51The efficient expansion of pseudoinstructions---namely jumps---into MCS-51 machine instructions is complex.
52We isolate the decision making over how jumps should be expanded from the expansion process itself as much as possible using `policies'.
53This makes the proof of correctness for the assembler significantly more straightforward.
54
55We observe that it is impossible for an optimising assembler to preserve the semantics of every assembly program.
56Assembly language programs can manipulate concrete addresses in arbitrary ways.
57Our proof strategy contains a tracking facility for `good addresses' and only programs that use good addresses have their semantics preserved under assembly.
58Our strategy offers increased flexibility over the traditional approach to proving the correctness of assemblers, wherein addresses in assembly are kept opaque and immutable.
59In particular, we may experiment with allowing the benign manipulation of addresses.
60\keywords{Verified software, CerCo (Certified Complexity), MCS-51 microcontroller, Matita proof assistant}
61\end{abstract}
62
63% ---------------------------------------------------------------------------- %
64% SECTION                                                                      %
65% ---------------------------------------------------------------------------- %
66\section{Introduction}
67\label{sect.introduction}
68
69We consider the formalisation of an assembler for the Intel MCS-51 8-bit microprocessor in the Matita proof assistant~\cite{asperti:user:2007}.
70This formalisation forms a major component of the EU-funded CerCo (`Certified Complexity') project~\cite{cerco:2011}, concerning the construction and formalisation of a concrete complexity preserving compiler for a large subset of the C programming language.
71
72The MCS-51 dates from the early 1980s and is commonly called the 8051/8052.
73Despite the microprocessor's age, derivatives are still widely manufactured by a number of semiconductor foundries, with the processor being used especially in embedded systems development, where well-tested, cheap, predictable microprocessors find their niche.
74
75The MCS-51 has a relative paucity of features compared to its more modern brethren, with the lack of any caching or pipelining features meaning that timing of execution is predictable, making the MCS-51 very attractive for CerCo's ends.
76Yet---as with many things---what one hand giveth, the other taketh away, and the MCS-51's paucity of features---though an advantage in many respects---also quickly becomes a hindrance.
77In particular, the MCS-51 features a relatively minuscule series of memory spaces by modern standards.
78As a result our C compiler, to have any sort of hope of successfully compiling realistic programs for embedded devices, ought to produce `tight' machine code.
79
80In order to do this, we must solve the `branch displacement' problem---deciding how best to expand pseudojumps to labels in assembly language to machine code jumps. The branch displacement problem happears when pseudojumps can be expanded
81in different ways to real machine instructions, but the different expansions
82are not equivalent (e.g. do not have the same size or speed) and not always
83correct (e.g. correctness is only up to global constraints over the compiled
84code). For instance, some jump instructions (short jumps) are very small
85and fast, but they can only reach destinations within a
86certain distance from the current instruction. When the destinations are
87too far away, larger and slower long jumps must be used. The use of a long jump may
88augment the distance between another pseudojump and its target, forcing
89another long jump use, in a cascading effect. The job of the optimizing
90compiler (assembler) is to individually expand every pseudo-instruction in such a way
91that all global constraints are satisfied and that the compiled program size
92is minimal in size and faster in time. The problem is known to be particularly
93complex for most CICS architectures (for instance, see~\cite{hyde:branch:2006}).
94
95To free the CerCo C compiler from having to consider complications relating to branch displacement, we have chosen to implement an optimising assembler, whose input language the compiler will target.
96Labels, conditional jumps to labels, a program preamble containing global data and a \texttt{MOV} instruction for moving this global data into the MCS-51's one 16-bit register all feature in our assembly language.
97We simplify the proof by assuming that all our assembly programs are pre-linked (i.e. we do not formalise a linker---this is left for future work).
98
99Another complication we have addressed is that of the cost model.
100CerCo imposes a cost model on C programs or, more specifically, on simple blocks of instructions.
101This cost model is induced by the compilation process itself, and its non-compositional nature allows us to assign different costs to identical blocks of instructions depending on how they are compiled.
102In short, we aim to obtain a very precise costing for a program by embracing the compilation process, not ignoring it.
103At the assembler level, this is reflected by our need to induce a cost
104model on the assembly code as a function of the assembly program and the
105strategy used to solve the branch displacement problem. In particular, the
106optimizing compiler should also return a map that assigns a cost (in clock
107cycles) to every instruction in the source program. We expect the induced cost
108to be preserved by the compiler: we will prove that the compiled code
109tightly simulates the source code by taking exactly the predicted amount of
110time.
111
112Note that the temporal tightness of the simulation is a fundamental prerequisite
113of the correctness of the simulation because some functions of the MCS-51,
114notably timers and I/O, depend on the microprocessor's clock. If the
115pseudo and concrete clock differs, the result of an I/O operation may not be
116preserved.
117
118Branch displacement algorithms must have a deep knowledge of the way
119the rest of the assembler works in order to build globally correct solutions.
120Proving their correctness is quite a complex task (see, for instance,
121the compaion paper~\cite{boender:correctness:2012}).
122Nevertheless, the correctness of the whole assembler only depends on the
123correctness of the branch displacement algorithm.
124Therefore, in the rest of the paper, we abstract the assembler on the
125existence of a correct policy, to be computed by a branch displacement
126algorithm if it exists. A policy is the decision over how
127any particular jump should be expanded; it is correct when the global
128constraints are satisfied.
129The assembler fails to assemble an assembly program if and only if a correct policy does not exist. This is stated in an elegant way in the dependent type of the assembler: the assembly function is total over a program, a policy and the proof that the policy is correct for that program.
130
131The rest of this paper is a detailed description of our proof that is, in part, still a work in progress.
132
133We provide the reader with a brief `roadmap' for the rest of the paper.
134In Section~\ref{sect.matita} we provide a brief overview of the Matita proof assistant for the unfamiliar reader.
135In Section~\ref{sect.the.proof} we discuss the design and implementation of the proof proper.
136In Section~\ref{sect.conclusions} we conclude.
137
138% ---------------------------------------------------------------------------- %
139% SECTION                                                                      %
140% ---------------------------------------------------------------------------- %
141\section{Matita}
142\label{sect.matita}
143
144Matita is a proof assistant based on a variant of the Calculus of (Co)inductive Constructions~\cite{asperti:user:2007}.
145In particular, it features dependent types that we exploit in the formalisation.
146The syntax of the statements and definitions in the paper should be self-explanatory, at least to those exposed to dependent type theory.
147We only remark that the use of `$\mathtt{?}$' or `$\mathtt{\ldots}$' for omitting single terms or sequences of terms to be inferred automatically by the system, respectively.
148Those that are not inferred are left to the user as proof obligations.
149Pairs are denoted with angular brackets, $\langle-, -\rangle$.
150
151Matita features a liberal system of coercions.
152It is possible to define a uniform coercion $\lambda x.\langle x,?\rangle$ from every type $T$ to the dependent product $\Sigma x:T.P~x$.
153The coercion opens a proof obligation that asks the user to prove that $P$ holds for $x$.
154When a coercion must be applied to a complex term (a $\lambda$-abstraction, a local definition, or a case analysis), the system automatically propagates the coercion to the sub-terms
155 For instance, to apply a coercion to force $\lambda x.M : A \to B$ to have type $\forall x:A.\Sigma y:B.P~x~y$, the system looks for a coercion from $M: B$ to $\Sigma y:B.P~x~y$ in a context augmented with $x:A$.
156This is significant when the coercion opens a proof obligation, as the user will be presented with multiple, but simpler proof obligations in the correct context.
157In this way, Matita supports the ``Russell'' proof methodology developed by Sozeau in~\cite{sozeau:subset:2006}, with an implementation that is lighter and more tightly integrated with the system than that of Coq.
158
159% ---------------------------------------------------------------------------- %
160% SECTION                                                                      %
161% ---------------------------------------------------------------------------- %
162\section{The proof}
163\label{sect.the.proof}
164
165% ---------------------------------------------------------------------------- %
166% SECTION                                                                      %
167% ---------------------------------------------------------------------------- %
168
169\subsection{Machine code semantics}
170\label{subsect.machine.code.semantics}
171
172Our emulator centres around a \texttt{Status} record, describing the microprocessor's state.
173This record contains fields corresponding to the microprocessor's program counter, registers, stack pointer, special function registers, and so on.
174At the machine code level, code memory is implemented as a compact trie of bytes addressed by the program counter.
175We parameterise \texttt{Status} records by this representation as a few technical tasks manipulating statuses are made simpler using this approach, as well as permitting a modicum of abstraction.
176
177We may execute a single step of a machine code program using the \texttt{execute\_1} function, which returns an updated \texttt{Status}:
178\begin{lstlisting}
179definition execute_1: $\forall$cm. Status cm $\rightarrow$ Status cm := $\ldots$
180\end{lstlisting}
181Here \texttt{Status} is parameterised by \texttt{cm}, a code memory represented as a trie.
182%The function \texttt{execute} allows one to execute an arbitrary, but fixed (due to Matita's normalisation requirement) number of steps of a program.
183The function \texttt{execute\_1} closely matches the operation of the MCS-51 hardware, as described by a Siemen's manufacturer's data sheet (specifically, this one~\cite{siemens:2011}).
184We first fetch, using the program counter, from code memory the first byte of the instruction to be executed, decoding the resulting opcode, fetching more bytes as is necessary.
185Decoded instructions are represented as an inductive type, where $\llbracket - \rrbracket$ denotes a fixed-length vector:
186\begin{lstlisting}
187inductive preinstruction (A: Type[0]): Type[0] :=
188 | ADD: $\llbracket$acc_a$\rrbracket$ → $\llbracket$registr; direct; indirect; data$\rrbracket$ $\rightarrow$ preinstruction A
189 | DEC: $\llbracket$acc_a; registr; direct; indirect$\rrbracket$ $\rightarrow$ preinstruction A
190 | JB: $\llbracket$bit_addr$\rrbracket$ $\rightarrow$ A $\rightarrow$ preinstruction A
191 | ...
192
193inductive instruction: Type[0] :=
194 | LCALL: $\llbracket$addr16$\rrbracket$ $\rightarrow$ instruction
195 | AJMP: $\llbracket$addr11$\rrbracket$ $\rightarrow$ instruction
196 | RealInstruction: preinstruction $\llbracket$relative$\rrbracket$ $\rightarrow$ instruction.
197 | ...
198\end{lstlisting}
199Here, we use dependent types to provide a precise typing for instructions, specifying in their type the permitted addressing modes that their arguments can belong to.
200The parameterised type $A$ of \texttt{preinstruction} represents the addressing mode for conditional jumps; in \texttt{instruction} we fix this type to be a relative offset in the constructor \texttt{RealInstruction}.
201
202Once decoded, execution proceeds by a case analysis on the decoded instruction, following the operation of the hardware.
203For example, the \texttt{DEC} instruction (`decrement') is implemented as follows:
204\begin{lstlisting}
205 | DEC addr $\Rightarrow$
206  let s := add_ticks1 s in
207  let $\langle$result, flags$\rangle$ := sub_8_with_carry (get_arg_8 $\ldots$ s true addr)
208   (bitvector_of_nat 8 1) false in
209     set_arg_8 $\ldots$ s addr result
210\end{lstlisting}
211
212Here, \texttt{add\_ticks1} models the incrementing of the internal clock of the microprocessor.
213
214% ---------------------------------------------------------------------------- %
215% SECTION                                                                      %
216% ---------------------------------------------------------------------------- %
217
218\subsection{Assembly code semantics}
219\label{subsect.assembly.code.semantics}
220
221An assembly program is a list of potentially labelled pseudoinstructions, bundled with a preamble consisting of a list of symbolic names for locations in data memory (i.e. global variables).
222Pseudoinstructions are implemented as an inductive type:
223\begin{lstlisting}
224inductive pseudo_instruction: Type[0] :=
225  | Instruction: preinstruction Identifier $\rightarrow$ pseudo_instruction
226    ...
227  | Jmp: Identifier $\rightarrow$ pseudo_instruction
228  | Call: Identifier $\rightarrow$ pseudo_instruction
229  | Mov: $\llbracket$dptr$\rrbracket$ $\rightarrow$ Identifier $\rightarrow$ pseudo_instruction.
230\end{lstlisting}
231The pseudoinstructions \texttt{Jmp}, \texttt{Call} and \texttt{Mov} are generalisations of machine code unconditional jumps, calls and move instructions respectively, all of whom act on labels, as opposed to concrete memory addresses.
232Similarly, conditional jumps can now only jump to labels, as is implied by the first constructor of the type above.
233All other object code instructions are available at the assembly level, with the exception of those that appeared in the \texttt{instruction} type, such as \texttt{ACALL} and \texttt{LJMP}.
234These are jumps and calls to absolute addresses, which we do not wish to allow at the assembly level.
235
236Execution of pseudoinstructions is a function from \texttt{PseudoStatus} to \texttt{PseudoStatus}.
237Both \texttt{Status} and \texttt{PseudoStatus} are instances of a more general type parameterised over the representation of code memory.
238The more general type is crucial for sharing the majority of the semantics of the two languages.
239
240Emulation for pseudoinstructions is handled by \texttt{execute\_1\_pseudo\_instruction}:
241\begin{lstlisting}
242definition execute_1_pseudo_instruction:
243 $\forall$cm. ($\forall$ppc: Word. ppc < $\mid$snd cm$\mid$ $\rightarrow$ nat $\times$ nat) $\rightarrow$ $\forall$s:PseudoStatus cm.
244  program_counter $\ldots$ s < $\mid$snd cm$\mid$ $\rightarrow$ PseudoStatus cm := $\ldots$
245\end{lstlisting}
246The type of \texttt{execute\_1\_pseudo\_instruction} is interesting.
247Note here that our representation of code memory \texttt{cm} is no longer a bitvector trie of bytes, but a list of pseudoinstructions.
248Further, we take in a function that maps program counters (at the assembly level) to pairs of natural numbers representing the number of clock ticks that the pseudoinstructions needs to execute, post expansion.
249We call this function a \emph{costing}, and note that the costing is induced by the particular strategy we use to expand pseudoinstructions.
250If we change how we expand conditional jumps to labels, for instance, then the costing needs to change, hence \texttt{execute\_1\_pseudo\_instruction}'s parametricity in the costing.
251This costing function expects a proof, at its second argument, stating that the program counter falls within the bounds of the pseudoprogram.
252A similar invariant holds of the pseudoprogram counter passed to the \texttt{execute\_1\_pseudo\_instruction} function.
253
254The costing returns \emph{pairs} of natural numbers because, in the case of expanding conditional jumps to labels, the expansion of the `true branch' and `false branch' may differ in execution time.
255The \texttt{add\_ticks1} function, which we have already seen used to increment the machine clock above, is determined for the assembly language from the costing function.
256
257Execution proceeds by first fetching from pseudo-code memory using the program counter---treated as an index into the pseudoinstruction list.
258This index is always guaranteed to be within the bounds of the pseudoinstruction list due to the dependent type placed on the function.
259No decoding is required.
260We then proceed by case analysis over the pseudoinstruction, reusing the code for object code for all instructions present in the MCS-51's instruction set.
261For all newly introduced pseudoinstructions, we simply translate labels to concrete addresses before behaving as a `real' instruction.
262
263In contrast to other approaches, we do not perform any kind of symbolic execution, wherein data is the disjoint union of bytes and addresses, with addresses kept opaque and immutable.
264Labels are immediately translated to concrete addresses, and registers and memory locations only ever contain bytes, never labels.
265As a consequence, we allow the programmer to mangle, change and generally adjust addresses as they want, under the proviso that the translation process may not be able to preserve the semantics of programs that do this.
266This will be further discussed in Subsection~\ref{subsect.total.correctness.for.well.behaved.assembly.programs}.
267
268% ---------------------------------------------------------------------------- %
269% SECTION                                                                      %
270% ---------------------------------------------------------------------------- %
271
272\subsection{The assembler}
273\label{subsect.the.assembler}
274
275Conceptually the assembler works in two passes.
276The first pass expands pseudoinstructions into a list of machine code instructions using the function \texttt{expand\_pseudo\_instruction}.
277The second pass encodes as a list of bytes the expanded instruction list by mapping the function \texttt{assembly1} across the list, and then flattening.
278\begin{displaymath}
279[\mathtt{P_1}, \ldots \mathtt{P_n}] \xrightarrow{\left(\mathtt{P_i} \xrightarrow{\mbox{\fontsize{7}{9}\selectfont$\mathtt{expand\_pseudo\_instruction}$}} \mathtt{[I^1_i, \ldots I^q_i]} \xrightarrow{\mbox{\fontsize{7}{9}\selectfont$\mathtt{~~~~~~~~assembly1^{*}~~~~~~~~}$}} \mathtt{[0110]}\right)^{*}} \mathtt{[010101]}
280\end{displaymath}
281The most complex of the two passes is the first, which expands pseudoinstructions and must perform the task of branch displacement~\cite{hyde:branch:2006}.
282The function \texttt{assembly\_1\_pseudo\_instruction} used in the body of the paper is essentially the composition of the two passes.
283
284The branch displacement problem refers to the task of expanding pseudojumps into their concrete counterparts, preferably as efficiently as possible.
285For instance, the MCS-51 features three unconditional jump instructions: \texttt{LJMP} and \texttt{SJMP}---`long jump' and `short jump' respectively---and an 11-bit oddity of the MCS-51, \texttt{AJMP}.
286Each of these three instructions expects arguments in different sizes and behaves in markedly different ways: \texttt{SJMP} may only perform a `local jump'; \texttt{LJMP} may jump to any address in the MCS-51's memory space and \texttt{AJMP} may jump to any address in the current memory page.
287Consequently, the size of each opcode is different, and to squeeze as much code as possible into the MCS-51's limited code memory, the smallest possible opcode that will suffice should be selected.
288
289Similarly, a conditional pseudojump must be translated potentially into a configuration of machine code instructions, depending on the distance to the jump's target.
290For example, to translate a jump to a label, a single conditional jump pseudoinstruction may be translated into a block of three real instructions as follows (here, \texttt{JZ} is `jump if accumulator is zero'):
291{\small{
292\begin{displaymath}
293\begin{array}{r@{\quad}l@{\;\;}l@{\qquad}c@{\qquad}l@{\;\;}l}
294       & \mathtt{JZ}  & \mathtt{label}                      &                 & \mathtt{JZ}   & \text{size of \texttt{SJMP} instruction} \\
295       & \ldots       &                            & \text{translates to}   & \mathtt{SJMP} & \text{size of \texttt{LJMP} instruction} \\
296\mathtt{label:} & \mathtt{MOV} & \mathtt{A}\;\;\mathtt{B}   & \Longrightarrow & \mathtt{LJMP} & \text{address of \textit{label}} \\
297       &              &                            &                 & \ldots        & \\
298       &              &                            &                 & \mathtt{MOV}  & \mathtt{A}\;\;\mathtt{B}
299\end{array}
300\end{displaymath}}}
301Here, if \texttt{JZ} fails, we fall through to the \texttt{SJMP} which jumps over the \texttt{LJMP}.
302Naturally, if \texttt{label} is `close enough', a conditional jump pseudoinstruction is mapped directly to a conditional jump machine instruction; the above translation only applies if \texttt{label} is not sufficiently local.
303
304In order to implement branch displacement it is impossible to really make the \texttt{expand\_pseudo\_instruction} function completely independent of the encoding function.
305This is due to branch displacement requiring the distance in bytes of the target of the jump.
306Moreover the standard solutions for solving the branch displacement problem find their solutions iteratively, by either starting from a solution where all jumps are long, and shrinking them when possible, or starting from a state where all jumps are short and increasing their length as needed.
307Proving the correctness of such algorithms is already quite involved and the correctness of the assembler as a whole does not depend on the `quality' of the solution found to a branch displacement problem.
308For this reason, we try to isolate the computation of a branch displacement problem from the proof of correctness for the assembler by parameterising our \texttt{expand\_pseudo\_instruction} by a `policy'.
309
310\begin{lstlisting}
311definition expand_pseudo_instruction:
312 $\forall$lookup_labels: Identifier $\rightarrow$ Word.
313 $\forall$sigma: Word $\rightarrow$ Word.
314 $\forall$policy: Word $\rightarrow$ bool.
315 $\forall$ppc: Word.
316 $\forall$lookup_datalabels: Identifier $\rightarrow$ Word.
317 $\forall$pi: pseudo_instruction.
318  list instruction := ...
319\end{lstlisting}
320Here, the functions \texttt{lookup\_labels} and \texttt{lookup\_datalabels} are the functions that map labels and datalabels to program counters respectively, both of them used in the semantics of assembly.
321The input \texttt{pi} is the pseudoinstruction to be expanded and is found at address \texttt{ppc} in the assembly program.
322The policy is defined using the two functions \texttt{sigma} and \texttt{policy}, of which \texttt{sigma} is the most interesting.
323The function \texttt{sigma} maps pseudo program counters to program counters: the encoding of the expansion of the pseudoinstruction found at address \texttt{a} in the assembly code should be placed into code memory at address \texttt{sigma(a)}.
324Of course this is possible only if the policy is correct, which means that the encoding of consecutive assembly instructions must be consecutive in code memory.
325\begin{displaymath}
326\texttt{sigma}(\texttt{ppc} + 1) = \texttt{pc} + \texttt{current\_instruction\_size}
327\end{displaymath}
328Here, \texttt{current\_instruction\_size} is the size in bytes of the encoding of the expanded pseudoinstruction found at \texttt{ppc}.
329Note that the entanglement we hinted at is only partially solved in this way: the assembler code can ignore the implementation details of the algorithm that finds a policy;
330however, the algorithm that finds a policy must know the exact behaviour of the assembly program because it needs to predict the way the assembly will expand and encode pseudoinstructions, once fed with a policy.
331A companion submission to this one~\cite{boender:correctness:2012} certifies an algorithm that finds branch displacement policies for the assembler described in this paper.
332
333The \texttt{expand\_pseudo\_instruction} function uses the \texttt{sigma} map to determine the size of jump required when expanding pseudojumps, computing the jump size by examining the size of the differences between program counters.
334For instance, if at address \texttt{ppc} in the assembly program we found \texttt{Jmp l} such that \texttt{lookup\_labels l = a}, if the offset \texttt{d = sigma(a) - sigma(ppc + 1)} is such that \texttt{d} $< 128$ then \texttt{Jmp l} is normally translated to the best local solution, the short jump \texttt{SJMP d}.
335A global best solution to the branch displacement problem, however, is not always made of locally best solutions.
336Therefore, in some circumstances, it is necessary to force the assembler to expand jumps into larger ones.
337This is achieved by the \texttt{policy} function: if \texttt{policy ppc = true} then a \texttt{Jmp l} at address \texttt{ppc} is always translated to a long jump.
338An essentially identical mechanism exists for call instructions.
339
340% ---------------------------------------------------------------------------- %
341% SECTION                                                                      %
342% ---------------------------------------------------------------------------- %
343\subsection{Correctness of the assembler with respect to fetching}
344\label{subsect.total.correctness.of.the.assembler}
345Using our policies, we now work toward proving the total correctness of the assembler.
346By `total correctness', we mean that the assembly process never fails when provided with a correct policy and that the process does not change the semantics of a certain class of well behaved assembly programs.
347
348The aim of this section is to prove the following informal statement: when we fetch an assembly pseudoinstruction \texttt{I} at address \texttt{ppc}, then we can fetch the expanded pseudoinstruction(s) \texttt{[J1, \ldots, Jn] = fetch\_pseudo\_instruction \ldots\ I\ ppc} from \texttt{sigma(ppc)} in the code memory obtained by loading the assembled object code.
349This constitutes the first major step in the proof of correctness of the assembler, the next one being the simulation of \texttt{I} by \texttt{[J1, \ldots, Jn]} (see Subsection~\ref{subsect.total.correctness.for.well.behaved.assembly.programs}).
350
351The \texttt{assembly} function is given a Russell type (slightly simplified here):
352\begin{lstlisting}
353definition assembly:
354  $\forall$program: pseudo_assembly_program.
355  $\forall$policy.
356    $\Sigma$assembled: list Byte $\times$ (BitVectorTrie costlabel 16).
357      policy is correct for program $\rightarrow$
358      $\mid$program$\mid$ < $2^{16}$ $\rightarrow$
359      $\mid$fst assembled$\mid$ < $2^{16}$ $\wedge$
360      policy ($\mid$program$\mid$) = $\mid$fst assembled$\mid$ $\vee$
361      policy ($\mid$program$\mid$) = 0 $\wedge$ $\mid$fst assembled$\mid$ = $2^{16}$ $\wedge$
362      $\forall$ppc: pseudo\_program\_counter such that ppc < $2^{16}$.
363        let pseudo_instr := fetch from program at ppc in
364        let assembled_i := assemble pseudo_instr in
365          $\mid$assembled_i$\mid$ $\leq$ $2^{16}$ $\wedge$
366            $\forall$n: nat such that n < $\mid$assembled_i$\mid$.
367            $\exists$k: nat.
368              nth assembled_i n = nth assembled (policy ppc + k).
369\end{lstlisting}
370In plain words, the type of \texttt{assembly} states the following.
371Suppose we are given a policy that is correct for the program we are assembling, and suppose the program to be assembled is fully addressable by a 16-bit word.
372Then if we fetch from the pseudo program counter \texttt{ppc} we get a pseudoinstruction \texttt{pi} and a new pseudo program counter \texttt{ppc}.
373Further, assembling the pseudoinstruction \texttt{pi} results in a list of bytes, \texttt{a}.
374Then, indexing into this list with any natural number \texttt{j} less than the length of \texttt{a} gives the same result as indexing into \texttt{assembled} with \texttt{sigma(ppc)} (the program counter pointing to the start of the expansion in \texttt{assembled}) plus \texttt{j}.
375
376Essentially the lemma above states that the \texttt{assembly} function correctly expands pseudoinstructions, and that the expanded instruction reside consecutively in memory.
377This result is lifted from lists of bytes into a result on tries of bytes (i.e. code memories), using an additional lemma: \texttt{assembly\_ok}.
378
379Lemma \texttt{fetch\_assembly} establishes that the \texttt{fetch} and \texttt{assembly1} functions interact correctly.
380The \texttt{fetch} function, as its name implies, fetches the instruction indexed by the program counter in the code memory, while \texttt{assembly1} maps a single instruction to its byte encoding:
381\begin{lstlisting}
382lemma fetch_assembly:
383 $\forall$pc: Word.
384 $\forall$i: instruction.
385 $\forall$code_memory: BitVectorTrie Byte 16.
386 $\forall$assembled: list Byte.
387  assembled = assembly1 i $\rightarrow$
388  let len := length $\ldots$ assembled in
389  let pc_plus_len := add $\ldots$ pc (bitvector_of_nat $\ldots$ len) in
390   encoding_check code_memory pc pc_plus_len assembled $\rightarrow$
391   let $\langle$instr, pc', ticks$\rangle$ := fetch code_memory pc in
392    instr = i $\wedge$ ticks = (ticks_of_instruction instr) $\wedge$ pc' = pc_plus_len.
393\end{lstlisting}
394In particular, we read \texttt{fetch\_assembly} as follows.
395Given an instruction, \texttt{i}, we first assemble the instruction to obtain \texttt{assembled}, checking that the assembled instruction was stored in code memory correctly.
396Fetching from code memory, we obtain a tuple consisting of the instruction, new program counter, and the number of ticks this instruction will take to execute.
397We finally check that the fetched instruction is the same instruction that we began with, and the number of ticks this instruction will take to execute is the same as the result returned by a lookup function, \texttt{ticks\_of\_instruction}, devoted to tracking this information.
398Or, in plainer words, assembling and then immediately fetching again gets you back to where you started.
399
400Lemma \texttt{fetch\_assembly\_pseudo} (slightly simplified, here) is obtained by composition of \texttt{expand\_pseudo\_instruction} and \texttt{assembly\_1\_pseudoinstruction}:
401\begin{lstlisting}
402lemma fetch_assembly_pseudo:
403 $\forall$program: pseudo_assembly_program.
404 $\forall$sigma: Word $\rightarrow$ Word.
405 $\forall$policy: Word $\rightarrow$ bool.
406 $\forall$ppc.
407 $\forall$code_memory.
408 let $\langle$preamble, instr_list$\rangle$ := program in
409 let pi := $\pi_1$ (fetch_pseudo_instruction instr_list ppc) in
410 let pc := sigma ppc in
411 let instrs := expand_pseudo_instruction $\ldots$ sigma policy ppc $\ldots$ pi in
412 let $\langle$l, a$\rangle$ := assembly_1_pseudoinstruction $\ldots$ sigma policy ppc $\ldots$ pi in
413 let pc_plus_len := add $\ldots$ pc (bitvector_of_nat $\ldots$ l) in
414  encoding_check code_memory pc pc_plus_len a $\rightarrow$
415   fetch_many code_memory pc_plus_len pc instructions.
416\end{lstlisting}
417Here, \texttt{l} is the number of machine code instructions the pseudoinstruction at hand has been expanded into.
418We assemble a single pseudoinstruction with \texttt{assembly\_1\_pseudoinstruction}, which internally calls \texttt{expand\_pseudo\_instruction}.
419The function \texttt{fetch\_many} fetches multiple machine code instructions from code memory and performs some routine checks.
420
421Intuitively, Lemma \texttt{fetch\_assembly\_pseudo} can be read as follows.
422Suppose we expand the pseudoinstruction at \texttt{ppc} with the policy decision \texttt{sigma}, obtaining the list of machine code instructions \texttt{instrs}.
423Suppose we also assemble the pseudoinstruction at \texttt{ppc} to obtain \texttt{a}, a list of bytes.
424Then, we check with \texttt{fetch\_many} that the number of machine instructions that were fetched matches the number of instruction that \texttt{expand\_pseudo\_instruction} expanded.
425
426The final lemma in this series is \texttt{fetch\_assembly\_pseudo2} that combines the Lemma \texttt{fetch\_assembly\_pseudo} with the correctness of the functions that load object code into the processor's memory.
427Again, we slightly simplify:
428\begin{lstlisting}
429lemma fetch_assembly_pseudo2:
430 $\forall$program.
431 $\forall$sigma.
432 $\forall$policy.
433 $\forall$sigma_meets_specification.
434 $\forall$ppc.
435  let $\langle$preamble, instr_list$\rangle$ := program in
436  let $\langle$labels, costs$\rangle$ := create_label_cost_map instr_list in
437  let $\langle$assembled, costs'$\rangle$ := $\pi_1$ $\ldots$ (assembly program sigma policy) in
438  let cmem := load_code_memory assembled in
439  let $\langle$pi, newppc$\rangle$ := fetch_pseudo_instruction instr_list ppc in
440  let instructions := expand_pseudo_instruction $\ldots$ sigma ppc $\ldots$ pi in
441    fetch_many cmem (sigma newppc) (sigma ppc) instructions.
442\end{lstlisting}
443
444Here we use $\pi_1 \ldots$ to project the existential witness from the Russell-typed function \texttt{assembly}.
445
446We read \texttt{fetch\_assembly\_pseudo2} as follows.
447Suppose we are able to successfully assemble an assembly program using \texttt{assembly} and produce a code memory, \texttt{cmem}.
448Then, fetching a pseudoinstruction from the pseudo-code memory at address \texttt{ppc} corresponds to fetching a sequence of instructions from the real code memory using \texttt{sigma} to expand pseudoinstructions.
449The fetched sequence corresponds to the expansion, according to \texttt{sigma}, of the pseudoinstruction.
450
451At first, the lemma appears to immediately imply the correctness of the assembler.
452However, this property is \emph{not} strong enough to establish that the semantics of an assembly program has been preserved by the assembly process since it does not establish the correspondence between the semantics of a pseudoinstruction and that of its expansion.
453In particular, the two semantics differ on instructions that \emph{could} directly manipulate program addresses.
454
455% ---------------------------------------------------------------------------- %
456% SECTION                                                                      %
457% ---------------------------------------------------------------------------- %
458\subsection{Total correctness for `well behaved' assembly programs}
459\label{subsect.total.correctness.for.well.behaved.assembly.programs}
460
461The traditional approach to verifying the correctness of an assembler is to treat memory addresses as opaque structures that cannot be modified.
462Memory is represented as a map from opaque addresses to the disjoint union of data and opaque addresses---addresses are kept opaque to prevent their possible `semantics breaking' manipulation by assembly programs:
463\begin{displaymath}
464\mathtt{Mem} : \mathtt{Addr} \rightarrow \mathtt{Bytes} + \mathtt{Addr} \qquad \llbracket - \rrbracket : \mathtt{Instr} \rightarrow \mathtt{Mem} \rightarrow \mathtt{option\ Mem}
465\end{displaymath}
466The semantics of a pseudoinstruction, $\llbracket - \rrbracket$, is given as a possibly failing function from pseudoinstructions and memory spaces to new memory spaces.
467The semantic function proceeds by case analysis over the operands of a given instruction, failing if either operand is an opaque address, or otherwise succeeding, updating memory.
468\begin{gather*}
469\llbracket \mathtt{ADD\ @A1\ @A2} \rrbracket^\mathtt{M} = \begin{cases}
470                                                              \mathtt{Byte\ b1},\ \mathtt{Byte\ b2} & \rightarrow \mathtt{Some}(\mathtt{M}\ \text{with}\ \mathtt{b1} + \mathtt{b2}) \\
471                                                              -,\ \mathtt{Addr\ a} & \rightarrow \mathtt{None} \\
472                                                              \mathtt{Addr\ a},\ - & \rightarrow \mathtt{None}
473                                                            \end{cases}
474\end{gather*}
475In contrast, in this paper we take a different approach.
476We trace memory locations (and, potentially, registers) that contain memory addresses.
477We then prove that only those assembly programs that use addresses in `safe' ways have their semantics preserved by the assembly process---a sort of dynamic type system sitting atop memory.
478
479We believe that this approach is more flexible when compared to the traditional approach, as in principle it allows us to introduce some permitted \emph{benign} manipulations of addresses that the traditional approach, using opaque addresses, cannot handle, therefore expanding the set of input programs that can be assembled correctly.
480This approach, of using real addresses coupled with a weak, dynamic typing system sitting atop of memory, is similar to one taken by Tuch \emph{et al}~\cite{tuch:types:2007}, for reasoning about low-level C code.
481
482Our analogue of the semantic function above is then merely a wrapper around the function that implements the semantics of machine code, paired with a function that keeps track of addresses.
483This permits a large amount of code reuse, as the semantics of pseudo- and machine code are essentially shared.
484The only thing that changes at the assembly level is the presence of the new tracking function.
485
486However, with this approach we must detect (at run time) programs that manipulate addresses in well behaved ways, according to some approximation of well-behavedness.
487We use an \texttt{internal\_pseudo\_address\_map} to trace addresses of code memory addresses in internal RAM:
488\begin{lstlisting}
489definition internal_pseudo_address_map :=
490  list ((BitVector 8) $\times$ (bool $\times$ Word)) $\times$ (option (bool $\times$ Word)).
491\end{lstlisting}
492The implementation of \texttt{internal\_pseudo\_address\_map} is complicated by some peculiarities of the MCS-51's instruction set.
493Note here that all addresses are 16 bit words, but are stored (and manipulated) as 8 bit bytes.
494All \texttt{MOV} instructions in the MCS-51 must use the accumulator \texttt{A} as an intermediary, moving a byte at a time.
495The second component of \texttt{internal\_pseudo\_address\_map} therefore states whether the accumulator currently holds a piece of an address, and if so, whether it is the upper or lower byte of the address (using the boolean flag) complete with the corresponding source address in full.
496The first component, on the other hand, performs a similar task for the rest of external RAM.
497Again, we use a boolean flag to describe whether a byte is the upper or lower component of a 16-bit address.
498
499The \texttt{low\_internal\_ram\_of\_pseudo\_low\_internal\_ram} function converts the lower internal RAM of a \texttt{PseudoStatus} into the lower internal RAM of a \texttt{Status}.
500A similar function exists for high internal RAM.
501Note that both RAM segments are indexed using addresses 7-bits long.
502The function is currently axiomatised, and an associated set of axioms prescribe the behaviour of the function:
503\begin{lstlisting}
504axiom low_internal_ram_of_pseudo_low_internal_ram:
505 internal_pseudo_address_map$\rightarrow$BitVectorTrie Byte 7$\rightarrow$BitVectorTrie Byte 7.
506\end{lstlisting}
507
508Next, we are able to translate \texttt{PseudoStatus} records into \texttt{Status} records using \texttt{status\_of\_pseudo\_status}.
509Translating a \texttt{PseudoStatus}'s code memory requires we expand pseudoinstructions and then assemble to obtain a trie of bytes.
510This never fails, provided that our policy is correct:
511\begin{lstlisting}
512definition status_of_pseudo_status:
513 internal_pseudo_address_map $\rightarrow$ $\forall$pap. $\forall$ps: PseudoStatus pap.
514 $\forall$sigma: Word $\rightarrow$ Word. $\forall$policy: Word $\rightarrow$ bool.
515  Status (code_memory_of_pseudo_assembly_program pap sigma policy)
516\end{lstlisting}
517
518The \texttt{next\_internal\_pseudo\_address\_map} function is responsible for run time monitoring of the behaviour of assembly programs, in order to detect well behaved ones.
519It returns a map that traces memory addresses in internal RAM after execution of the next pseudoinstruction, failing when the instruction tampers with memory addresses in unanticipated (but potentially correct) ways.
520It thus decides the membership of a strict subset of the set of well behaved programs.
521\begin{lstlisting}
522definition next_internal_pseudo_address_map: internal_pseudo_address_map
523 $\rightarrow$ PseudoStatus $\rightarrow$ option internal_pseudo_address_map
524\end{lstlisting}
525Note, if we wished to allow `benign manipulations' of addresses, it would be this function that needs to be changed.
526
527The function \texttt{ticks\_of0} computes how long---in clock cycles---a pseudoinstruction will take to execute when expanded in accordance with a given policy.
528The function returns a pair of natural numbers, needed for recording the execution times of each branch of a conditional jump.
529\begin{lstlisting}
530definition ticks_of0:
531 pseudo_assembly_program $\rightarrow$ (Word $\rightarrow$ Word) $\rightarrow$ (Word $\rightarrow$ bool) $\rightarrow$ Word $\rightarrow$
532   pseudo_instruction $\rightarrow$ nat $\times$ nat := $\ldots$
533\end{lstlisting}
534An additional function, \texttt{ticks\_of}, is merely a wrapper around this function.
535
536Finally, we are able to state and prove our main theorem.
537This relates the execution of a single assembly instruction and the execution of (possibly) many machine code instructions, as long as we are able to track memory addresses properly:
538\begin{lstlisting}
539theorem main_thm:
540 $\forall$M, M': internal_pseudo_address_map.
541 $\forall$program: pseudo_assembly_program.
542 let $\langle$preamble, instr_list$\rangle$ := program in
543 $\forall$is_well_labelled: is_well_labelled_p instr_list.
544 $\forall$sigma: Word $\rightarrow$ Word.
545 $\forall$policy: Word $\rightarrow$ bool.
546 $\forall$sigma_meets_specification.
547 $\forall$ps: PseudoStatus program.
548 $\forall$program_counter_in_bounds.
549  next_internal_pseudo_address_map M program ps = Some $\ldots$ M' $\rightarrow$
550  $\exists$n. execute n $\ldots$ (status_of_pseudo_status M $\ldots$ ps sigma policy) =
551   status_of_pseudo_status M' $\ldots$ (execute_1_pseudo_instruction
552     (ticks_of program sigma policy) program ps) sigma policy.
553\end{lstlisting}
554The statement is standard for forward simulation, but restricted to \texttt{PseudoStatuses} \texttt{ps} whose next instruction to be executed is well-behaved with respect to the \texttt{internal\_pseudo\_address\_map} \texttt{M}.
555Further, we explicitly require proof that our policy is correct and the pseudo program counter lies within the bounds of the program.
556Theorem \texttt{main\_thm} establishes the total correctness of the assembly process and can simply be lifted to the forward simulation of an arbitrary number of well behaved steps on the assembly program.
557
558% ---------------------------------------------------------------------------- %
559% SECTION                                                                      %
560% ---------------------------------------------------------------------------- %
561\section{Conclusions}
562\label{sect.conclusions}
563
564We are proving the total correctness of an assembler for MCS-51 assembly language.
565In particular, our assembly language features labels, arbitrary conditional and unconditional jumps to labels, global data and instructions for moving this data into the MCS-51's single 16-bit register.
566Expanding these pseudoinstructions into machine code instructions is not trivial, and the proof that the assembly process is `correct', in that the semantics of a subset of assembly programs are not changed is complex.
567
568The formalisation is a key component of the CerCo project, which aims to produce a verified concrete complexity preserving compiler for a large subset of the C programming language.
569The verified assembler, complete with the underlying formalisation of the semantics of MCS-51 machine code, will form the bedrock layer upon which the rest of the CerCo project will build its verified compiler platform.
570
571It is interesting to compare our work to an `industrial grade' assembler for the MCS-51: SDCC~\cite{sdcc:2011}.
572SDCC is the only open source C compiler that targets the MCS-51 instruction set.
573It appears that all pseudojumps in SDCC assembly are expanded to \texttt{LJMP} instructions, the worst possible jump expansion policy from an efficiency point of view.
574Note that this policy is the only possible policy \emph{in theory} that can preserve the semantics of an assembly program during the assembly process.
575However, this comes at the expense of assembler completeness: the generated program may be too large to fit into code memory.
576In this respect, there is a trade-off between the completeness of the assembler and the efficiency of the assembled program.
577The definition and proof of a terminating, correct jump expansion policy is described in a companion publication to this one~\cite{boender:correctness:2012}.
578
579Aside from their application in verified compiler projects such as CerCo, CompCert~\cite{leroy:formally:2009} and CompCertTSO~\cite{sevcik:relaxed-memory:2011}, verified assemblers such as ours could also be applied to the verification of operating system kernels.
580Of particular note is the verified seL4 kernel~\cite{klein:sel4:2009,klein:sel4:2010}.
581This verification explicitly assumes the existence of, amongst other things, a trustworthy assembler and compiler.
582
583Note that both CompCert, CompCertTSO and the seL4 formalisation assume the existence of `trustworthy' assemblers.
584For instance, the CompCert C compiler's backend stops at the PowerPC assembly language, in the default backend.
585The observation that an optimising assembler cannot preserve the semantics of every assembly program may have important consequences for these projects (though in the case of CompCertTSO, targetting a multiprocessor, what exactly constitutes the subset of `good programs' may not be entirely clear).
586If CompCert chooses to assume the existence of an optimising assembler, then care should be made to ensure that any assembly program produced by the CompCert compiler falls into the subset of programs that have a hope of having their semantics preserved by an optimising assembler.
587
588Our formalisation exploits dependent types in different ways and for multiple purposes.
589The first purpose is to reduce potential errors in the formalisation of the microprocessor.
590In particular, dependent types are used to constrain the size of bitvectors and tries that represent memory quantities and memory areas respectively.
591They are also used to simulate polymorphic variants in Matita, in order to provide precise typings to various functions expecting only a subset of all possible addressing modes that the MCS-51 offers.
592Polymorphic variants nicely capture the absolutely unorthogonal instruction set of the MCS-51 where every opcode must accept its own subset of the 11 addressing mode of the processor.
593
594The second purpose is to single out the sources of incompleteness.
595By abstracting our functions over the dependent type of correct policies, we were able to manifest the fact that the compiler never refuses to compile a program where a correct policy exists.
596This also allowed to simplify the initial proof by dropping lemmas establishing that one function fails if and only if some previous function does so.
597
598Finally, dependent types, together with Matita's liberal system of coercions, allow us to simulate almost entirely---in user space---the proof methodology ``Russell'' of Sozeau~\cite{sozeau:subset:2006}.
599However, not every proof has been carried out in this way: we only used this style to prove that a function satisfies a specification that only involves that function in a significant way.
600For example, it would be unnatural to see the proof that fetch and assembly commute as the specification of one of the two functions.
601
602\subsection{Related work}
603\label{subsect.related.work}
604
605% piton
606We are not the first to consider the total correctness of an assembler for a non-trivial assembly language.
607Perhaps the most impressive piece of work in this domain is the Piton stack~\cite{moore:piton:1996,moore:grand:2005}.
608This was a stack of verified components, written and verified in ACL2, ranging from a proprietary FM9001 microprocessor verified at the gate level, to assemblers and compilers for two high-level languages---a dialect of Lisp and $\mu$Gypsy~\cite{moore:grand:2005}.
609
610% jinja
611Klein and Nipkow consider a Java-like programming language, Jinja~\cite{klein:machine:2006,klein:machine:2010}.
612They provide a compiler, virtual machine and operational semantics for the programming language and virtual machine, and prove that their compiler is semantics and type preserving.
613
614We believe some other verified assemblers exist in the literature.
615However, what sets our work apart from that above is our attempt to optimise the machine code generated by our assembler.
616This complicates any formalisation effort, as an attempt at the best possible selection of machine instructions must be made, especially important on a device such as the MCS-51 with a minuscule code memory.
617Further, care must be taken to ensure that the time properties of an assembly program are not modified by the assembly process lest we affect the semantics of any program employing the MCS-51's I/O facilities.
618This is only possible by inducing a cost model on the source code from the optimisation strategy and input program.
619This will be a \emph{leit motif} of CerCo.
620
621\subsection{Resources}
622\label{subsect.resources}
623
624All files relating to our formalisation effort can be found online at~\url{http://cerco.cs.unibo.it}.
625In particular, we have assumed several properties of ``library functions'' related in particular to modular arithmetic and datastructure manipulation.
626Moreover, we have axiomatised various ancillary functions needed to complete the main theorems, as well as some `routine' proof obligations of the theorems themselves, preferring instead to focus on the main meat of the theorems.
627We thus believe that the proof strategy is sound and that we will be able to close soon all axioms, up to possible minor bugs that should have local fixes that do not affect the global proof strategy.
628
629The development, including the definition of the executable semantics of the MCS-51, is spread across 29 files, totalling around 18,500 lines of Matita source.
630The bulk of the proof described herein is contained in a series of files, \texttt{AssemblyProof.ma}, \texttt{AssemblyProofSplit.ma} and \texttt{AssemblyProofSplitSplit.ma} consisting at the moment of approximately 4200 lines of Matita source.
631Numerous other lines of proofs are spread all over the development because of dependent types and the Russell proof style, which does not allow one to separate the code from the proofs.
632The low ratio between the number of lines of code and the number of lines of proof is unusual.
633It is justified by the fact that the pseudo-assembly and the assembly language share most constructs and that large parts of the semantics are also shared.
634Therefore many lines of code are required to describe the complex semantics of the processor, but, for the shared cases, the proof of preservation of the semantics is essentially trivial.
635
636\bibliography{cpp-2012-asm.bib}
637
638\end{document}\renewcommand{\verb}{\lstinline}
639\def\lstlanguagefiles{lst-grafite.tex}
640\lstset{language=Grafite}
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