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37\title{On the correctness of an optimising assembler for the Intel MCS-51 microprocessor\thanks{The project CerCo acknowledges the financial support of the Future and Emerging Technologies (FET) programme within the Seventh Framework Programme for Research of the European Commission, under FET-Open grant number: 243881.}}
38\author{Dominic P. Mulligan \and Claudio Sacerdoti Coen}
39\institute{Dipartimento di Scienze dell'Informazione,\\ Universit\'a degli Studi di Bologna}
40
41\bibliographystyle{splncs03}
42
43\begin{document}
44
45\maketitle
46
47\begin{abstract}
48We present a proof of correctness, in Matita, for an optimising assembler for the MCS-51 microcontroller.
49This assembler constitutes a major component of the EU's CerCo project.
50
51The efficient expansion of pseudoinstructions---namely jumps---into MCS-51 machine instructions is complex.
52We isolate the decision making over how jumps should be expanded from the expansion process itself as much as possible using `policies'.
53This makes the proof of correctness for the assembler significantly more straightforward.
54
55We observe that it is impossible for an optimising assembler to preserve the semantics of every assembly program.
56Assembly language programs can manipulate concrete addresses in arbitrary ways.
57Our proof strategy contains a tracking facility for `good addresses' and only programs that use good addresses have their semantics preserved under assembly.
58Our strategy offers increased flexibility over the traditional approach to proving the correctness of assemblers, wherein addresses in assembly are kept opaque and immutable.
59In particular, we may experiment with allowing the benign manipulation of addresses.
60\keywords{Verified software, CerCo (Certified Complexity), MCS-51 microcontroller, Matita proof assistant}
61\end{abstract}
62
63% ---------------------------------------------------------------------------- %
64% SECTION                                                                      %
65% ---------------------------------------------------------------------------- %
66\section{Introduction}
67\label{sect.introduction}
68
69We consider the formalisation of an assembler for the Intel MCS-51 8-bit microprocessor in the Matita proof assistant~\cite{asperti:user:2007}.
70This formalisation forms a major component of the EU-funded CerCo (`Certified Complexity') project~\cite{cerco:2011}, concerning the construction and formalisation of a concrete complexity preserving compiler for a large subset of the C programming language.
71
72The MCS-51 dates from the early 1980s and is commonly called the 8051/8052.
73Despite the microprocessor's age, derivatives are still widely manufactured by a number of semiconductor foundries, with the processor being used especially in embedded systems development, where well-tested, cheap, predictable microprocessors find their niche.
74
75The MCS-51 has a relative paucity of features compared to its more modern brethren, with the lack of any caching or pipelining features meaning that timing of execution is predictable, making the MCS-51 very attractive for CerCo's ends.
76Yet---as with many things---what one hand giveth, the other taketh away, and the MCS-51's paucity of features---though an advantage in many respects---also quickly becomes a hindrance.
77In particular, the MCS-51 features a relatively minuscule series of memory spaces by modern standards.
78As a result our C compiler, to have any sort of hope of successfully compiling realistic programs for embedded devices, ought to produce `tight' machine code.
79
80In order to do this, we must solve the `branch displacement' problem---deciding how best to expand pseudojumps to labels in assembly language to machine code jumps.
81Clearly a correct but efficient strategy would be to expand all unconditional pseudojumps to the MCS-51's \texttt{LJMP} instruction, and all conditional pseudojumps to a set configuration of jumps using \texttt{LJMP} instructions; this is inefficient and a waste of valuable code memory space.
82Finding an efficient solution with this expansion process is not trivial, and is a well-known problem for those writing assemblers targetting CISC architectures (for instance, see~\cite{hyde:branch:2006}).
83
84To free the CerCo C compiler from having to consider complications relating to branch displacement, we have chosen to implement an optimising assembler, whose input language the compiler will target.
85Labels, conditional jumps to labels, a program preamble containing global data and a \texttt{MOV} instruction for moving this global data into the MCS-51's one 16-bit register all feature in our assembly language.
86We simplify the proof by assuming that all our assembly programs are pre-linked (i.e. we do not formalise a linker---this is left for future work).
87
88Further, we must make sure that the assembly process does not change the timing characteristics of an assembly program for two reasons.
89
90First, the semantics of some functions of the MCS-51, notably I/O, depend on the microprocessor's clock.
91Changing how long a particular program takes to execute can affect the semantics of a program.
92This is undesirable.
93
94Second, CerCo imposes a cost model on C programs or, more specifically, on simple blocks of instructions.
95This cost model is induced by the compilation process itself, and its non-compositional nature allows us to assign different costs to identical blocks of instructions depending on how they are compiled.
96In short, we aim to obtain a very precise costing for a program by embracing the compilation process, not ignoring it.
97This, however, complicates the proof of correctness for the compiler proper, and we must prove that both the meaning and concrete complexity characteristics of the program are preserved for every translation pass in the compiler, including the assembler.
98
99How we went about resolving this problem affected the shape of our proof of correctness for the whole assembler in a rather profound way.
100We first attempted to synthesise a solution bottom up: starting with no solution, we gradually refine a solution using the same functions that implement the jump expansion process.
101Using this technique, solutions can fail to exist, and the proof of correctness for the assembler quickly descends into a diabolical quagmire.
102
103Abandoning this attempt, we instead split the `policy'---the decision over how any particular jump should be expanded---from the implementation that actually expands assembly programs into machine code.
104Assuming the existence of a correct policy, we prove the implementation of the assembler correct.
105Further, we proved that the assembler fails to assemble an assembly program if and only if a correct policy does not exist.
106This is achieved by means of dependent types: the assembly function is total over a program, a policy and the proof that the policy is correct for that program.
107
108Policies do not exist in only a limited number of circumstances: namely, if a pseudoinstruction attempts to jump to a label that does not exist, or the program is too large to fit in code memory, even after shrinking jumps according to the policy.
109The first circumstance is an example of a serious compiler error, as an ill-formed assembly program was generated, and does not (and should not) count as a mark against the completeness of the assembler.
110
111The rest of this paper is a detailed description of our proof that is, in part, still a work in progress.
112
113We provide the reader with a brief `roadmap' for the rest of the paper.
114In Section~\ref{sect.matita} we provide a brief overview of the Matita proof assistant for the unfamiliar reader.
115In Section~\ref{sect.the.proof} we discuss the design and implementation of the proof proper.
116In Section~\ref{sect.conclusions} we conclude.
117
118% ---------------------------------------------------------------------------- %
119% SECTION                                                                      %
120% ---------------------------------------------------------------------------- %
121\section{Matita}
122\label{sect.matita}
123
124Matita is a proof assistant based on a variant of the Calculus of (Co)inductive Constructions~\cite{asperti:user:2007}.
125In particular, it features dependent types that we exploit in the formalisation.
126The syntax of the statements and definitions in the paper should be self-explanatory, at least to those exposed to dependent type theory.
127We only remark that the use of `$\mathtt{?}$' or `$\mathtt{\ldots}$' for omitting single terms or sequences of terms to be inferred automatically by the system, respectively.
128Those that are not inferred are left to the user as proof obligations.
129Pairs are denoted with angular brackets, $\langle-, -\rangle$.
130
131Matita features a liberal system of coercions.
132It is possible to define a uniform coercion $\lambda x.\langle x,?\rangle$ from every type $T$ to the dependent product $\Sigma x:T.P~x$.
133The coercion opens a proof obligation that asks the user to prove that $P$ holds for $x$.
134When a coercion must be applied to a complex term (a $\lambda$-abstraction, a local definition, or a case analysis), the system automatically propagates the coercion to the sub-terms
135 For instance, to apply a coercion to force $\lambda x.M : A \to B$ to have type $\forall x:A.\Sigma y:B.P~x~y$, the system looks for a coercion from $M: B$ to $\Sigma y:B.P~x~y$ in a context augmented with $x:A$.
136This is significant when the coercion opens a proof obligation, as the user will be presented with multiple, but simpler proof obligations in the correct context.
137In this way, Matita supports the ``Russell'' proof methodology developed by Sozeau in~\cite{sozeau:subset:2006}, with an implementation that is lighter and more tightly integrated with the system than that of Coq.
138
139% ---------------------------------------------------------------------------- %
140% SECTION                                                                      %
141% ---------------------------------------------------------------------------- %
142\section{The proof}
143\label{sect.the.proof}
144
145% ---------------------------------------------------------------------------- %
146% SECTION                                                                      %
147% ---------------------------------------------------------------------------- %
148
149\subsection{Machine code semantics}
150\label{subsect.machine.code.semantics}
151
152Our emulator centres around a \texttt{Status} record, describing the microprocessor's state.
153This record contains fields corresponding to the microprocessor's program counter, registers, stack pointer, special function registers, and so on.
154At the machine code level, code memory is implemented as a compact trie of bytes addressed by the program counter.
155We parameterise \texttt{Status} records by this representation as a few technical tasks manipulating statuses are made simpler using this approach, as well as permitting a modicum of abstraction.
156
157We may execute a single step of a machine code program using the \texttt{execute\_1} function, which returns an updated \texttt{Status}:
158\begin{lstlisting}
159definition execute_1: $\forall$cm. Status cm $\rightarrow$ Status cm := $\ldots$
160\end{lstlisting}
161Here \texttt{Status} is parameterised by \texttt{cm}, a code memory represented as a trie.
162%The function \texttt{execute} allows one to execute an arbitrary, but fixed (due to Matita's normalisation requirement) number of steps of a program.
163The function \texttt{execute\_1} closely matches the operation of the MCS-51 hardware, as described by a Siemen's manufacturer's data sheet (specifically, this one~\cite{siemens:2011}).
164We first fetch, using the program counter, from code memory the first byte of the instruction to be executed, decoding the resulting opcode, fetching more bytes as is necessary.
165Decoded instructions are represented as an inductive type, where $\llbracket - \rrbracket$ denotes a fixed-length vector:
166\begin{lstlisting}
167inductive preinstruction (A: Type[0]): Type[0] :=
168 | ADD: $\llbracket$acc_a$\rrbracket$ → $\llbracket$registr; direct; indirect; data$\rrbracket$ $\rightarrow$ preinstruction A
169 | DEC: $\llbracket$acc_a; registr; direct; indirect$\rrbracket$ $\rightarrow$ preinstruction A
170 | JB: $\llbracket$bit_addr$\rrbracket$ $\rightarrow$ A $\rightarrow$ preinstruction A
171 | ...
172
173inductive instruction: Type[0] :=
174 | LCALL: $\llbracket$addr16$\rrbracket$ $\rightarrow$ instruction
175 | AJMP: $\llbracket$addr11$\rrbracket$ $\rightarrow$ instruction
176 | RealInstruction: preinstruction $\llbracket$relative$\rrbracket$ $\rightarrow$ instruction.
177 | ...
178\end{lstlisting}
179Here, we use dependent types to provide a precise typing for instructions, specifying in their type the permitted addressing modes that their arguments can belong to.
180The parameterised type $A$ of \texttt{preinstruction} represents the addressing mode for conditional jumps; in \texttt{instruction} we fix this type to be a relative offset in the constructor \texttt{RealInstruction}.
181
182Once decoded, execution proceeds by a case analysis on the decoded instruction, following the operation of the hardware.
183For example, the \texttt{DEC} instruction (`decrement') is implemented as follows:
184\begin{lstlisting}
185 | DEC addr $\Rightarrow$
186  let s := add_ticks1 s in
187  let $\langle$result, flags$\rangle$ := sub_8_with_carry (get_arg_8 $\ldots$ s true addr)
188   (bitvector_of_nat 8 1) false in
189     set_arg_8 $\ldots$ s addr result
190\end{lstlisting}
191
192Here, \texttt{add\_ticks1} models the incrementing of the internal clock of the microprocessor.
193
194% ---------------------------------------------------------------------------- %
195% SECTION                                                                      %
196% ---------------------------------------------------------------------------- %
197
198\subsection{Assembly code semantics}
199\label{subsect.assembly.code.semantics}
200
201An assembly program is a list of potentially labelled pseudoinstructions, bundled with a preamble consisting of a list of symbolic names for locations in data memory (i.e. global variables).
202Pseudoinstructions are implemented as an inductive type:
203\begin{lstlisting}
204inductive pseudo_instruction: Type[0] :=
205  | Instruction: preinstruction Identifier $\rightarrow$ pseudo_instruction
206    ...
207  | Jmp: Identifier $\rightarrow$ pseudo_instruction
208  | Call: Identifier $\rightarrow$ pseudo_instruction
209  | Mov: $\llbracket$dptr$\rrbracket$ $\rightarrow$ Identifier $\rightarrow$ pseudo_instruction.
210\end{lstlisting}
211The pseudoinstructions \texttt{Jmp}, \texttt{Call} and \texttt{Mov} are generalisations of machine code unconditional jumps, calls and move instructions respectively, all of whom act on labels, as opposed to concrete memory addresses.
212Similarly, conditional jumps can now only jump to labels, as is implied by the first constructor of the type above.
213All other object code instructions are available at the assembly level, with the exception of those that appeared in the \texttt{instruction} type, such as \texttt{ACALL} and \texttt{LJMP}.
214These are jumps and calls to absolute addresses, which we do not wish to allow at the assembly level.
215
216Execution of pseudoinstructions is a function from \texttt{PseudoStatus} to \texttt{PseudoStatus}.
217Both \texttt{Status} and \texttt{PseudoStatus} are instances of a more general type parameterised over the representation of code memory.
218The more general type is crucial for sharing the majority of the semantics of the two languages.
219
220Emulation for pseudoinstructions is handled by \texttt{execute\_1\_pseudo\_instruction}:
221\begin{lstlisting}
222definition execute_1_pseudo_instruction:
223 $\forall$cm. ($\forall$ppc: Word. ppc < $\mid$snd cm$\mid$ $\rightarrow$ nat $\times$ nat) $\rightarrow$ $\forall$s:PseudoStatus cm.
224  program_counter $\ldots$ s < $\mid$snd cm$\mid$ $\rightarrow$ PseudoStatus cm := $\ldots$
225\end{lstlisting}
226The type of \texttt{execute\_1\_pseudo\_instruction} is interesting.
227Note here that our representation of code memory \texttt{cm} is no longer a bitvector trie of bytes, but a list of pseudoinstructions.
228Further, we take in a function that maps program counters (at the assembly level) to pairs of natural numbers representing the number of clock ticks that the pseudoinstructions needs to execute, post expansion.
229We call this function a \emph{costing}, and note that the costing is induced by the particular strategy we use to expand pseudoinstructions.
230If we change how we expand conditional jumps to labels, for instance, then the costing needs to change, hence \texttt{execute\_1\_pseudo\_instruction}'s parametricity in the costing.
231This costing function expects a proof, at its second argument, stating that the program counter falls within the bounds of the pseudoprogram.
232A similar invariant holds of the pseudoprogram counter passed to the \texttt{execute\_1\_pseudo\_instruction} function.
233
234The costing returns \emph{pairs} of natural numbers because, in the case of expanding conditional jumps to labels, the expansion of the `true branch' and `false branch' may differ in execution time.
235The \texttt{add\_ticks1} function, which we have already seen used to increment the machine clock above, is determined for the assembly language from the costing function.
236
237Execution proceeds by first fetching from pseudo-code memory using the program counter---treated as an index into the pseudoinstruction list.
238This index is always guaranteed to be within the bounds of the pseudoinstruction list due to the dependent type placed on the function.
239No decoding is required.
240We then proceed by case analysis over the pseudoinstruction, reusing the code for object code for all instructions present in the MCS-51's instruction set.
241For all newly introduced pseudoinstructions, we simply translate labels to concrete addresses before behaving as a `real' instruction.
242
243In contrast to other approaches, we do not perform any kind of symbolic execution, wherein data is the disjoint union of bytes and addresses, with addresses kept opaque and immutable.
244Labels are immediately translated to concrete addresses, and registers and memory locations only ever contain bytes, never labels.
245As a consequence, we allow the programmer to mangle, change and generally adjust addresses as they want, under the proviso that the translation process may not be able to preserve the semantics of programs that do this.
246This will be further discussed in Subsection~\ref{subsect.total.correctness.for.well.behaved.assembly.programs}.
247
248% ---------------------------------------------------------------------------- %
249% SECTION                                                                      %
250% ---------------------------------------------------------------------------- %
251
252\subsection{The assembler}
253\label{subsect.the.assembler}
254
255Conceptually the assembler works in two passes.
256The first pass expands pseudoinstructions into a list of machine code instructions using the function \texttt{expand\_pseudo\_instruction}.
257The second pass encodes as a list of bytes the expanded instruction list by mapping the function \texttt{assembly1} across the list, and then flattening.
258\begin{displaymath}
259[\mathtt{P_1}, \ldots \mathtt{P_n}] \xrightarrow{\left(\mathtt{P_i} \xrightarrow{\mbox{\fontsize{7}{9}\selectfont$\mathtt{expand\_pseudo\_instruction}$}} \mathtt{[I^1_i, \ldots I^q_i]} \xrightarrow{\mbox{\fontsize{7}{9}\selectfont$\mathtt{~~~~~~~~assembly1^{*}~~~~~~~~}$}} \mathtt{[0110]}\right)^{*}} \mathtt{[010101]}
260\end{displaymath}
261The most complex of the two passes is the first, which expands pseudoinstructions and must perform the task of branch displacement~\cite{hyde:branch:2006}.
262The function \texttt{assembly\_1\_pseudo\_instruction} used in the body of the paper is essentially the composition of the two passes.
263
264The branch displacement problem refers to the task of expanding pseudojumps into their concrete counterparts, preferably as efficiently as possible.
265For instance, the MCS-51 features three unconditional jump instructions: \texttt{LJMP} and \texttt{SJMP}---`long jump' and `short jump' respectively---and an 11-bit oddity of the MCS-51, \texttt{AJMP}.
266Each of these three instructions expects arguments in different sizes and behaves in markedly different ways: \texttt{SJMP} may only perform a `local jump'; \texttt{LJMP} may jump to any address in the MCS-51's memory space and \texttt{AJMP} may jump to any address in the current memory page.
267Consequently, the size of each opcode is different, and to squeeze as much code as possible into the MCS-51's limited code memory, the smallest possible opcode that will suffice should be selected.
268
269Similarly, a conditional pseudojump must be translated potentially into a configuration of machine code instructions, depending on the distance to the jump's target.
270For example, to translate a jump to a label, a single conditional jump pseudoinstruction may be translated into a block of three real instructions as follows (here, \texttt{JZ} is `jump if accumulator is zero'):
271{\small{
272\begin{displaymath}
273\begin{array}{r@{\quad}l@{\;\;}l@{\qquad}c@{\qquad}l@{\;\;}l}
274       & \mathtt{JZ}  & \mathtt{label}                      &                 & \mathtt{JZ}   & \text{size of \texttt{SJMP} instruction} \\
275       & \ldots       &                            & \text{translates to}   & \mathtt{SJMP} & \text{size of \texttt{LJMP} instruction} \\
276\mathtt{label:} & \mathtt{MOV} & \mathtt{A}\;\;\mathtt{B}   & \Longrightarrow & \mathtt{LJMP} & \text{address of \textit{label}} \\
277       &              &                            &                 & \ldots        & \\
278       &              &                            &                 & \mathtt{MOV}  & \mathtt{A}\;\;\mathtt{B}
279\end{array}
280\end{displaymath}}}
281Here, if \texttt{JZ} fails, we fall through to the \texttt{SJMP} which jumps over the \texttt{LJMP}.
282Naturally, if \texttt{label} is `close enough', a conditional jump pseudoinstruction is mapped directly to a conditional jump machine instruction; the above translation only applies if \texttt{label} is not sufficiently local.
283
284In order to implement branch displacement it is impossible to really make the \texttt{expand\_pseudo\_instruction} function completely independent of the encoding function.
285This is due to branch displacement requiring the distance in bytes of the target of the jump.
286Moreover the standard solutions for solving the branch displacement problem find their solutions iteratively, by either starting from a solution where all jumps are long, and shrinking them when possible, or starting from a state where all jumps are short and increasing their length as needed.
287Proving the correctness of such algorithms is already quite involved and the correctness of the assembler as a whole does not depend on the `quality' of the solution found to a branch displacement problem.
288For this reason, we try to isolate the computation of a branch displacement problem from the proof of correctness for the assembler by parameterising our \texttt{expand\_pseudo\_instruction} by a `policy'.
289
290\begin{lstlisting}
291definition expand_pseudo_instruction:
292 $\forall$lookup_labels: Identifier $\rightarrow$ Word.
293 $\forall$sigma: Word $\rightarrow$ Word.
294 $\forall$policy: Word $\rightarrow$ bool.
295 $\forall$ppc: Word.
296 $\forall$lookup_datalabels: Identifier $\rightarrow$ Word.
297 $\forall$pi: pseudo_instruction.
298  list instruction := ...
299\end{lstlisting}
300Here, the functions \texttt{lookup\_labels} and \texttt{lookup\_datalabels} are the functions that map labels and datalabels to program counters respectively, both of them used in the semantics of assembly.
301The input \texttt{pi} is the pseudoinstruction to be expanded and is found at address \texttt{ppc} in the assembly program.
302The policy is defined using the two functions \texttt{sigma} and \texttt{policy}, of which \texttt{sigma} is the most interesting.
303The function \texttt{sigma} maps pseudo program counters to program counters: the encoding of the expansion of the pseudoinstruction found at address \texttt{a} in the assembly code should be placed into code memory at address \texttt{sigma(a)}.
304Of course this is possible only if the policy is correct, which means that the encoding of consecutive assembly instructions must be consecutive in code memory.
305\begin{displaymath}
306\texttt{sigma}(\texttt{ppc} + 1) = \texttt{pc} + \texttt{current\_instruction\_size}
307\end{displaymath}
308Here, \texttt{current\_instruction\_size} is the size in bytes of the encoding of the expanded pseudoinstruction found at \texttt{ppc}.
309Note that the entanglement we hinted at is only partially solved in this way: the assembler code can ignore the implementation details of the algorithm that finds a policy;
310however, the algorithm that finds a policy must know the exact behaviour of the assembly program because it needs to predict the way the assembly will expand and encode pseudoinstructions, once fed with a policy.
311A companion submission to this one~\cite{boender:correctness:2012} certifies an algorithm that finds branch displacement policies for the assembler described in this paper.
312
313The \texttt{expand\_pseudo\_instruction} function uses the \texttt{sigma} map to determine the size of jump required when expanding pseudojumps, computing the jump size by examining the size of the differences between program counters.
314For instance, if at address \texttt{ppc} in the assembly program we found \texttt{Jmp l} such that \texttt{lookup\_labels l = a}, if the offset \texttt{d = sigma(a) - sigma(ppc + 1)} is such that \texttt{d} $< 128$ then \texttt{Jmp l} is normally translated to the best local solution, the short jump \texttt{SJMP d}.
315A global best solution to the branch displacement problem, however, is not always made of locally best solutions.
316Therefore, in some circumstances, it is necessary to force the assembler to expand jumps into larger ones.
317This is achieved by the \texttt{policy} function: if \texttt{policy ppc = true} then a \texttt{Jmp l} at address \texttt{ppc} is always translated to a long jump.
318An essentially identical mechanism exists for call instructions.
319
320% ---------------------------------------------------------------------------- %
321% SECTION                                                                      %
322% ---------------------------------------------------------------------------- %
323\subsection{Correctness of the assembler with respect to fetching}
324\label{subsect.total.correctness.of.the.assembler}
325Using our policies, we now work toward proving the total correctness of the assembler.
326By `total correctness', we mean that the assembly process never fails when provided with a correct policy and that the process does not change the semantics of a certain class of well behaved assembly programs.
327
328The aim of this section is to prove the following informal statement: when we fetch an assembly pseudoinstruction \texttt{I} at address \texttt{ppc}, then we can fetch the expanded pseudoinstruction(s) \texttt{[J1, \ldots, Jn] = fetch\_pseudo\_instruction \ldots\ I\ ppc} from \texttt{sigma(ppc)} in the code memory obtained by loading the assembled object code.
329This constitutes the first major step in the proof of correctness of the assembler, the next one being the simulation of \texttt{I} by \texttt{[J1, \ldots, Jn]} (see Subsection~\ref{subsect.total.correctness.for.well.behaved.assembly.programs}).
330
331The \texttt{assembly} function is given a Russell type (slightly simplified here):
332\begin{lstlisting}
333definition assembly:
334  $\forall$program: pseudo_assembly_program.
335  $\forall$policy.
336    $\Sigma$assembled: list Byte $\times$ (BitVectorTrie costlabel 16).
337      policy is correct for program $\rightarrow$
338      $\mid$program$\mid$ < $2^{16}$ $\rightarrow$
339      $\mid$fst assembled$\mid$ < $2^{16}$ $\wedge$
340      policy ($\mid$program$\mid$) = $\mid$fst assembled$\mid$ $\vee$
341      policy ($\mid$program$\mid$) = 0 $\wedge$ $\mid$fst assembled$\mid$ = $2^{16}$ $\wedge$
342      $\forall$ppc: pseudo\_program\_counter such that ppc < $2^{16}$.
343        let pseudo_instr := fetch from program at ppc in
344        let assembled_i := assemble pseudo_instr in
345          $\mid$assembled_i$\mid$ $\leq$ $2^{16}$ $\wedge$
346            $\forall$n: nat such that n < $\mid$assembled_i$\mid$.
347            $\exists$k: nat.
348              nth assembled_i n = nth assembled (policy ppc + k).
349\end{lstlisting}
350In plain words, the type of \texttt{assembly} states the following.
351Suppose we are given a policy that is correct for the program we are assembling, and suppose the program to be assembled is fully addressable by a 16-bit word.
352Then if we fetch from the pseudo program counter \texttt{ppc} we get a pseudoinstruction \texttt{pi} and a new pseudo program counter \texttt{ppc}.
353Further, assembling the pseudoinstruction \texttt{pi} results in a list of bytes, \texttt{a}.
354Then, indexing into this list with any natural number \texttt{j} less than the length of \texttt{a} gives the same result as indexing into \texttt{assembled} with \texttt{sigma(ppc)} (the program counter pointing to the start of the expansion in \texttt{assembled}) plus \texttt{j}.
355
356Essentially the lemma above states that the \texttt{assembly} function correctly expands pseudoinstructions, and that the expanded instruction reside consecutively in memory.
357This result is lifted from lists of bytes into a result on tries of bytes (i.e. code memories), using an additional lemma: \texttt{assembly\_ok}.
358
359Lemma \texttt{fetch\_assembly} establishes that the \texttt{fetch} and \texttt{assembly1} functions interact correctly.
360The \texttt{fetch} function, as its name implies, fetches the instruction indexed by the program counter in the code memory, while \texttt{assembly1} maps a single instruction to its byte encoding:
361\begin{lstlisting}
362lemma fetch_assembly:
363 $\forall$pc: Word.
364 $\forall$i: instruction.
365 $\forall$code_memory: BitVectorTrie Byte 16.
366 $\forall$assembled: list Byte.
367  assembled = assembly1 i $\rightarrow$
368  let len := length $\ldots$ assembled in
369  let pc_plus_len := add $\ldots$ pc (bitvector_of_nat $\ldots$ len) in
370   encoding_check code_memory pc pc_plus_len assembled $\rightarrow$
371   let $\langle$instr, pc', ticks$\rangle$ := fetch code_memory pc in
372    instr = i $\wedge$ ticks = (ticks_of_instruction instr) $\wedge$ pc' = pc_plus_len.
373\end{lstlisting}
374In particular, we read \texttt{fetch\_assembly} as follows.
375Given an instruction, \texttt{i}, we first assemble the instruction to obtain \texttt{assembled}, checking that the assembled instruction was stored in code memory correctly.
376Fetching from code memory, we obtain a tuple consisting of the instruction, new program counter, and the number of ticks this instruction will take to execute.
377We finally check that the fetched instruction is the same instruction that we began with, and the number of ticks this instruction will take to execute is the same as the result returned by a lookup function, \texttt{ticks\_of\_instruction}, devoted to tracking this information.
378Or, in plainer words, assembling and then immediately fetching again gets you back to where you started.
379
380Lemma \texttt{fetch\_assembly\_pseudo} (slightly simplified, here) is obtained by composition of \texttt{expand\_pseudo\_instruction} and \texttt{assembly\_1\_pseudoinstruction}:
381\begin{lstlisting}
382lemma fetch_assembly_pseudo:
383 $\forall$program: pseudo_assembly_program.
384 $\forall$sigma: Word $\rightarrow$ Word.
385 $\forall$policy: Word $\rightarrow$ bool.
386 $\forall$ppc.
387 $\forall$code_memory.
388 let $\langle$preamble, instr_list$\rangle$ := program in
389 let pi := $\pi_1$ (fetch_pseudo_instruction instr_list ppc) in
390 let pc := sigma ppc in
391 let instrs := expand_pseudo_instruction $\ldots$ sigma policy ppc $\ldots$ pi in
392 let $\langle$l, a$\rangle$ := assembly_1_pseudoinstruction $\ldots$ sigma policy ppc $\ldots$ pi in
393 let pc_plus_len := add $\ldots$ pc (bitvector_of_nat $\ldots$ l) in
394  encoding_check code_memory pc pc_plus_len a $\rightarrow$
395   fetch_many code_memory pc_plus_len pc instructions.
396\end{lstlisting}
397Here, \texttt{l} is the number of machine code instructions the pseudoinstruction at hand has been expanded into.
398We assemble a single pseudoinstruction with \texttt{assembly\_1\_pseudoinstruction}, which internally calls \texttt{expand\_pseudo\_instruction}.
399The function \texttt{fetch\_many} fetches multiple machine code instructions from code memory and performs some routine checks.
400
401Intuitively, Lemma \texttt{fetch\_assembly\_pseudo} can be read as follows.
402Suppose we expand the pseudoinstruction at \texttt{ppc} with the policy decision \texttt{sigma}, obtaining the list of machine code instructions \texttt{instrs}.
403Suppose we also assemble the pseudoinstruction at \texttt{ppc} to obtain \texttt{a}, a list of bytes.
404Then, we check with \texttt{fetch\_many} that the number of machine instructions that were fetched matches the number of instruction that \texttt{expand\_pseudo\_instruction} expanded.
405
406The final lemma in this series is \texttt{fetch\_assembly\_pseudo2} that combines the Lemma \texttt{fetch\_assembly\_pseudo} with the correctness of the functions that load object code into the processor's memory.
407Again, we slightly simplify:
408\begin{lstlisting}
409lemma fetch_assembly_pseudo2:
410 $\forall$program.
411 $\forall$sigma.
412 $\forall$policy.
413 $\forall$sigma_meets_specification.
414 $\forall$ppc.
415  let $\langle$preamble, instr_list$\rangle$ := program in
416  let $\langle$labels, costs$\rangle$ := create_label_cost_map instr_list in
417  let $\langle$assembled, costs'$\rangle$ := $\pi_1$ $\ldots$ (assembly program sigma policy) in
418  let cmem := load_code_memory assembled in
419  let $\langle$pi, newppc$\rangle$ := fetch_pseudo_instruction instr_list ppc in
420  let instructions := expand_pseudo_instruction $\ldots$ sigma ppc $\ldots$ pi in
421    fetch_many cmem (sigma newppc) (sigma ppc) instructions.
422\end{lstlisting}
423
424Here we use $\pi_1 \ldots$ to project the existential witness from the Russell-typed function \texttt{assembly}.
425
426We read \texttt{fetch\_assembly\_pseudo2} as follows.
427Suppose we are able to successfully assemble an assembly program using \texttt{assembly} and produce a code memory, \texttt{cmem}.
428Then, fetching a pseudoinstruction from the pseudo-code memory at address \texttt{ppc} corresponds to fetching a sequence of instructions from the real code memory using \texttt{sigma} to expand pseudoinstructions.
429The fetched sequence corresponds to the expansion, according to \texttt{sigma}, of the pseudoinstruction.
430
431At first, the lemma appears to immediately imply the correctness of the assembler.
432However, this property is \emph{not} strong enough to establish that the semantics of an assembly program has been preserved by the assembly process since it does not establish the correspondence between the semantics of a pseudoinstruction and that of its expansion.
433In particular, the two semantics differ on instructions that \emph{could} directly manipulate program addresses.
434
435% ---------------------------------------------------------------------------- %
436% SECTION                                                                      %
437% ---------------------------------------------------------------------------- %
438\subsection{Total correctness for `well behaved' assembly programs}
439\label{subsect.total.correctness.for.well.behaved.assembly.programs}
440
441The traditional approach to verifying the correctness of an assembler is to treat memory addresses as opaque structures that cannot be modified.
442Memory is represented as a map from opaque addresses to the disjoint union of data and opaque addresses---addresses are kept opaque to prevent their possible `semantics breaking' manipulation by assembly programs:
443\begin{displaymath}
444\mathtt{Mem} : \mathtt{Addr} \rightarrow \mathtt{Bytes} + \mathtt{Addr} \qquad \llbracket - \rrbracket : \mathtt{Instr} \rightarrow \mathtt{Mem} \rightarrow \mathtt{option\ Mem}
445\end{displaymath}
446The semantics of a pseudoinstruction, $\llbracket - \rrbracket$, is given as a possibly failing function from pseudoinstructions and memory spaces to new memory spaces.
447The semantic function proceeds by case analysis over the operands of a given instruction, failing if either operand is an opaque address, or otherwise succeeding, updating memory.
448\begin{gather*}
449\llbracket \mathtt{ADD\ @A1\ @A2} \rrbracket^\mathtt{M} = \begin{cases}
450                                                              \mathtt{Byte\ b1},\ \mathtt{Byte\ b2} & \rightarrow \mathtt{Some}(\mathtt{M}\ \text{with}\ \mathtt{b1} + \mathtt{b2}) \\
451                                                              -,\ \mathtt{Addr\ a} & \rightarrow \mathtt{None} \\
452                                                              \mathtt{Addr\ a},\ - & \rightarrow \mathtt{None}
453                                                            \end{cases}
454\end{gather*}
455In contrast, in this paper we take a different approach.
456We trace memory locations (and, potentially, registers) that contain memory addresses.
457We then prove that only those assembly programs that use addresses in `safe' ways have their semantics preserved by the assembly process---a sort of dynamic type system sitting atop memory.
458
459We believe that this approach is more flexible when compared to the traditional approach, as in principle it allows us to introduce some permitted \emph{benign} manipulations of addresses that the traditional approach, using opaque addresses, cannot handle, therefore expanding the set of input programs that can be assembled correctly.
460This approach, of using real addresses coupled with a weak, dynamic typing system sitting atop of memory, is similar to one taken by Tuch \emph{et al}~\cite{tuch:types:2007}, for reasoning about low-level C code.
461
462Our analogue of the semantic function above is then merely a wrapper around the function that implements the semantics of machine code, paired with a function that keeps track of addresses.
463This permits a large amount of code reuse, as the semantics of pseudo- and machine code are essentially shared.
464The only thing that changes at the assembly level is the presence of the new tracking function.
465
466However, with this approach we must detect (at run time) programs that manipulate addresses in well behaved ways, according to some approximation of well-behavedness.
467We use an \texttt{internal\_pseudo\_address\_map} to trace addresses of code memory addresses in internal RAM:
468\begin{lstlisting}
469definition internal_pseudo_address_map :=
470  list ((BitVector 8) $\times$ (bool $\times$ Word)) $\times$ (option (bool $\times$ Word)).
471\end{lstlisting}
472The implementation of \texttt{internal\_pseudo\_address\_map} is complicated by some peculiarities of the MCS-51's instruction set.
473Note here that all addresses are 16 bit words, but are stored (and manipulated) as 8 bit bytes.
474All \texttt{MOV} instructions in the MCS-51 must use the accumulator \texttt{A} as an intermediary, moving a byte at a time.
475The second component of \texttt{internal\_pseudo\_address\_map} therefore states whether the accumulator currently holds a piece of an address, and if so, whether it is the upper or lower byte of the address (using the boolean flag) complete with the corresponding source address in full.
476The first component, on the other hand, performs a similar task for the rest of external RAM.
477Again, we use a boolean flag to describe whether a byte is the upper or lower component of a 16-bit address.
478
479The \texttt{low\_internal\_ram\_of\_pseudo\_low\_internal\_ram} function converts the lower internal RAM of a \texttt{PseudoStatus} into the lower internal RAM of a \texttt{Status}.
480A similar function exists for high internal RAM.
481Note that both RAM segments are indexed using addresses 7-bits long.
482The function is currently axiomatised, and an associated set of axioms prescribe the behaviour of the function:
483\begin{lstlisting}
484axiom low_internal_ram_of_pseudo_low_internal_ram:
485 internal_pseudo_address_map$\rightarrow$BitVectorTrie Byte 7$\rightarrow$BitVectorTrie Byte 7.
486\end{lstlisting}
487
488Next, we are able to translate \texttt{PseudoStatus} records into \texttt{Status} records using \texttt{status\_of\_pseudo\_status}.
489Translating a \texttt{PseudoStatus}'s code memory requires we expand pseudoinstructions and then assemble to obtain a trie of bytes.
490This never fails, provided that our policy is correct:
491\begin{lstlisting}
492definition status_of_pseudo_status:
493 internal_pseudo_address_map $\rightarrow$ $\forall$pap. $\forall$ps: PseudoStatus pap.
494 $\forall$sigma: Word $\rightarrow$ Word. $\forall$policy: Word $\rightarrow$ bool.
495  Status (code_memory_of_pseudo_assembly_program pap sigma policy)
496\end{lstlisting}
497
498The \texttt{next\_internal\_pseudo\_address\_map} function is responsible for run time monitoring of the behaviour of assembly programs, in order to detect well behaved ones.
499It returns a map that traces memory addresses in internal RAM after execution of the next pseudoinstruction, failing when the instruction tampers with memory addresses in unanticipated (but potentially correct) ways.
500It thus decides the membership of a strict subset of the set of well behaved programs.
501\begin{lstlisting}
502definition next_internal_pseudo_address_map: internal_pseudo_address_map
503 $\rightarrow$ PseudoStatus $\rightarrow$ option internal_pseudo_address_map
504\end{lstlisting}
505Note, if we wished to allow `benign manipulations' of addresses, it would be this function that needs to be changed.
506
507The function \texttt{ticks\_of0} computes how long---in clock cycles---a pseudoinstruction will take to execute when expanded in accordance with a given policy.
508The function returns a pair of natural numbers, needed for recording the execution times of each branch of a conditional jump.
509\begin{lstlisting}
510definition ticks_of0:
511 pseudo_assembly_program $\rightarrow$ (Word $\rightarrow$ Word) $\rightarrow$ (Word $\rightarrow$ bool) $\rightarrow$ Word $\rightarrow$
512   pseudo_instruction $\rightarrow$ nat $\times$ nat := $\ldots$
513\end{lstlisting}
514An additional function, \texttt{ticks\_of}, is merely a wrapper around this function.
515
516Finally, we are able to state and prove our main theorem.
517This relates the execution of a single assembly instruction and the execution of (possibly) many machine code instructions, as long as we are able to track memory addresses properly:
518\begin{lstlisting}
519theorem main_thm:
520 $\forall$M, M': internal_pseudo_address_map.
521 $\forall$program: pseudo_assembly_program.
522 let $\langle$preamble, instr_list$\rangle$ := program in
523 $\forall$is_well_labelled: is_well_labelled_p instr_list.
524 $\forall$sigma: Word $\rightarrow$ Word.
525 $\forall$policy: Word $\rightarrow$ bool.
526 $\forall$sigma_meets_specification.
527 $\forall$ps: PseudoStatus program.
528 $\forall$program_counter_in_bounds.
529  next_internal_pseudo_address_map M program ps = Some $\ldots$ M' $\rightarrow$
530  $\exists$n. execute n $\ldots$ (status_of_pseudo_status M $\ldots$ ps sigma policy) =
531   status_of_pseudo_status M' $\ldots$ (execute_1_pseudo_instruction
532     (ticks_of program sigma policy) program ps) sigma policy.
533\end{lstlisting}
534The statement is standard for forward simulation, but restricted to \texttt{PseudoStatuses} \texttt{ps} whose next instruction to be executed is well-behaved with respect to the \texttt{internal\_pseudo\_address\_map} \texttt{M}.
535Further, we explicitly require proof that our policy is correct and the pseudo program counter lies within the bounds of the program.
536Theorem \texttt{main\_thm} establishes the total correctness of the assembly process and can simply be lifted to the forward simulation of an arbitrary number of well behaved steps on the assembly program.
537
538% ---------------------------------------------------------------------------- %
539% SECTION                                                                      %
540% ---------------------------------------------------------------------------- %
541\section{Conclusions}
542\label{sect.conclusions}
543
544We are proving the total correctness of an assembler for MCS-51 assembly language.
545In particular, our assembly language features labels, arbitrary conditional and unconditional jumps to labels, global data and instructions for moving this data into the MCS-51's single 16-bit register.
546Expanding these pseudoinstructions into machine code instructions is not trivial, and the proof that the assembly process is `correct', in that the semantics of a subset of assembly programs are not changed is complex.
547
548The formalisation is a key component of the CerCo project, which aims to produce a verified concrete complexity preserving compiler for a large subset of the C programming language.
549The verified assembler, complete with the underlying formalisation of the semantics of MCS-51 machine code, will form the bedrock layer upon which the rest of the CerCo project will build its verified compiler platform.
550
551It is interesting to compare our work to an `industrial grade' assembler for the MCS-51: SDCC~\cite{sdcc:2011}.
552SDCC is the only open source C compiler that targets the MCS-51 instruction set.
553It appears that all pseudojumps in SDCC assembly are expanded to \texttt{LJMP} instructions, the worst possible jump expansion policy from an efficiency point of view.
554Note that this policy is the only possible policy \emph{in theory} that can preserve the semantics of an assembly program during the assembly process.
555However, this comes at the expense of assembler completeness: the generated program may be too large to fit into code memory.
556In this respect, there is a trade-off between the completeness of the assembler and the efficiency of the assembled program.
557The definition and proof of a terminating, correct jump expansion policy is described in a companion publication to this one~\cite{boender:correctness:2012}.
558
559Aside from their application in verified compiler projects such as CerCo, CompCert~\cite{leroy:formally:2009} and CompCertTSO~\cite{sevcik:relaxed-memory:2011}, verified assemblers such as ours could also be applied to the verification of operating system kernels.
560Of particular note is the verified seL4 kernel~\cite{klein:sel4:2009,klein:sel4:2010}.
561This verification explicitly assumes the existence of, amongst other things, a trustworthy assembler and compiler.
562
563Note that both CompCert, CompCertTSO and the seL4 formalisation assume the existence of `trustworthy' assemblers.
564For instance, the CompCert C compiler's backend stops at the PowerPC assembly language, in the default backend.
565The observation that an optimising assembler cannot preserve the semantics of every assembly program may have important consequences for these projects (though in the case of CompCertTSO, targetting a multiprocessor, what exactly constitutes the subset of `good programs' may not be entirely clear).
566If CompCert chooses to assume the existence of an optimising assembler, then care should be made to ensure that any assembly program produced by the CompCert compiler falls into the subset of programs that have a hope of having their semantics preserved by an optimising assembler.
567
568Our formalisation exploits dependent types in different ways and for multiple purposes.
569The first purpose is to reduce potential errors in the formalisation of the microprocessor.
570In particular, dependent types are used to constrain the size of bitvectors and tries that represent memory quantities and memory areas respectively.
571They are also used to simulate polymorphic variants in Matita, in order to provide precise typings to various functions expecting only a subset of all possible addressing modes that the MCS-51 offers.
572Polymorphic variants nicely capture the absolutely unorthogonal instruction set of the MCS-51 where every opcode must accept its own subset of the 11 addressing mode of the processor.
573
574The second purpose is to single out the sources of incompleteness.
575By abstracting our functions over the dependent type of correct policies, we were able to manifest the fact that the compiler never refuses to compile a program where a correct policy exists.
576This also allowed to simplify the initial proof by dropping lemmas establishing that one function fails if and only if some previous function does so.
577
578Finally, dependent types, together with Matita's liberal system of coercions, allow us to simulate almost entirely---in user space---the proof methodology ``Russell'' of Sozeau~\cite{sozeau:subset:2006}.
579However, not every proof has been carried out in this way: we only used this style to prove that a function satisfies a specification that only involves that function in a significant way.
580For example, it would be unnatural to see the proof that fetch and assembly commute as the specification of one of the two functions.
581
582\subsection{Related work}
583\label{subsect.related.work}
584
585% piton
586We are not the first to consider the total correctness of an assembler for a non-trivial assembly language.
587Perhaps the most impressive piece of work in this domain is the Piton stack~\cite{moore:piton:1996,moore:grand:2005}.
588This was a stack of verified components, written and verified in ACL2, ranging from a proprietary FM9001 microprocessor verified at the gate level, to assemblers and compilers for two high-level languages---a dialect of Lisp and $\mu$Gypsy~\cite{moore:grand:2005}.
589
590% jinja
591Klein and Nipkow consider a Java-like programming language, Jinja~\cite{klein:machine:2006,klein:machine:2010}.
592They provide a compiler, virtual machine and operational semantics for the programming language and virtual machine, and prove that their compiler is semantics and type preserving.
593
594We believe some other verified assemblers exist in the literature.
595However, what sets our work apart from that above is our attempt to optimise the machine code generated by our assembler.
596This complicates any formalisation effort, as an attempt at the best possible selection of machine instructions must be made, especially important on a device such as the MCS-51 with a minuscule code memory.
597Further, care must be taken to ensure that the time properties of an assembly program are not modified by the assembly process lest we affect the semantics of any program employing the MCS-51's I/O facilities.
598This is only possible by inducing a cost model on the source code from the optimisation strategy and input program.
599This will be a \emph{leit motif} of CerCo.
600
601\subsection{Resources}
602\label{subsect.resources}
603
604All files relating to our formalisation effort can be found online at~\url{http://cerco.cs.unibo.it}.
605In particular, we have assumed several properties of ``library functions'' related in particular to modular arithmetic and datastructure manipulation.
606Moreover, we have axiomatised various ancillary functions needed to complete the main theorems, as well as some `routine' proof obligations of the theorems themselves, preferring instead to focus on the main meat of the theorems.
607We thus believe that the proof strategy is sound and that we will be able to close soon all axioms, up to possible minor bugs that should have local fixes that do not affect the global proof strategy.
608
609The development, including the definition of the executable semantics of the MCS-51, is spread across 29 files, totalling around 18,500 lines of Matita source.
610The bulk of the proof described herein is contained in a series of files, \texttt{AssemblyProof.ma}, \texttt{AssemblyProofSplit.ma} and \texttt{AssemblyProofSplitSplit.ma} consisting at the moment of approximately 4200 lines of Matita source.
611Numerous other lines of proofs are spread all over the development because of dependent types and the Russell proof style, which does not allow one to separate the code from the proofs.
612The low ratio between the number of lines of code and the number of lines of proof is unusual.
613It is justified by the fact that the pseudo-assembly and the assembly language share most constructs and that large parts of the semantics are also shared.
614Therefore many lines of code are required to describe the complex semantics of the processor, but, for the shared cases, the proof of preservation of the semantics is essentially trivial.
615
616\bibliography{cpp-2012-asm.bib}
617
618\end{document}\renewcommand{\verb}{\lstinline}
619\def\lstlanguagefiles{lst-grafite.tex}
620\lstset{language=Grafite}
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