source: Deliverables/D4.1/Matita/ASM.ma @ 557

Last change on this file since 557 was 465, checked in by mulligan, 9 years ago

Moved over to standard library.

File size: 8.5 KB
Line 
1include "BitVector.ma".
2include "String.ma".
3
4ninductive addressing_mode: Type[0] ≝
5  DIRECT: Byte → addressing_mode
6| INDIRECT: Bit → addressing_mode
7| EXT_INDIRECT: Bit → addressing_mode
8| REGISTER: BitVector (S (S (S O))) → addressing_mode
9| ACC_A: addressing_mode
10| ACC_B: addressing_mode
11| DPTR: addressing_mode
12| DATA: Byte → addressing_mode
13| DATA16: Word → addressing_mode
14| ACC_DPTR: addressing_mode
15| ACC_PC: addressing_mode
16| EXT_INDIRECT_DPTR: addressing_mode
17| INDIRECT_DPTR: addressing_mode
18| CARRY: addressing_mode
19| BIT_ADDR: Byte → addressing_mode
20| N_BIT_ADDR: Byte → addressing_mode
21| RELATIVE: Byte → addressing_mode
22| ADDR11: Word11 → addressing_mode
23| ADDR16: Word → addressing_mode.
24
25ninductive addressing_mode_tag : Type[0] ≝
26  direct: addressing_mode_tag
27| indirect: addressing_mode_tag
28| ext_indirect: addressing_mode_tag
29| register: addressing_mode_tag
30| acc_a: addressing_mode_tag
31| acc_b: addressing_mode_tag
32| dptr: addressing_mode_tag
33| data: addressing_mode_tag
34| data16: addressing_mode_tag
35| acc_dptr: addressing_mode_tag
36| acc_pc: addressing_mode_tag
37| ext_indirect_dptr: addressing_mode_tag
38| indirect_dptr: addressing_mode_tag
39| carry: addressing_mode_tag
40| bit_addr: addressing_mode_tag
41| n_bit_addr: addressing_mode_tag
42| relative: addressing_mode_tag
43| addr11: addressing_mode_tag
44| addr16: addressing_mode_tag.
45
46ndefinition eq_a ≝
47  λa, b: addressing_mode_tag.
48    match a with
49      [ direct ⇒ match b with [ direct ⇒ true | _ ⇒ false ]
50      | indirect ⇒ match b with [ indirect ⇒ true | _ ⇒ false ]
51      | ext_indirect ⇒ match b with [ ext_indirect ⇒ true | _ ⇒ false ]
52      | register ⇒ match b with [ register ⇒ true | _ ⇒ false ]
53      | acc_a ⇒ match b with [ acc_a ⇒ true | _ ⇒ false ]
54      | acc_b ⇒ match b with [ acc_b ⇒ true | _ ⇒ false ]
55      | dptr ⇒ match b with [ dptr ⇒ true | _ ⇒ false ]
56      | data ⇒ match b with [ data ⇒ true | _ ⇒ false ]
57      | data16 ⇒ match b with [ data16 ⇒ true | _ ⇒ false ]
58      | acc_dptr ⇒ match b with [ acc_dptr ⇒ true | _ ⇒ false ]
59      | acc_pc ⇒ match b with [ acc_pc ⇒ true | _ ⇒ false ]
60      | ext_indirect_dptr ⇒ match b with [ ext_indirect_dptr ⇒ true | _ ⇒ false ]
61      | indirect_dptr ⇒ match b with [ indirect_dptr ⇒ true | _ ⇒ false ]
62      | carry ⇒ match b with [ carry ⇒ true | _ ⇒ false ]
63      | bit_addr ⇒ match b with [ bit_addr ⇒ true | _ ⇒ false ]
64      | n_bit_addr ⇒ match b with [ n_bit_addr ⇒ true | _ ⇒ false ]
65      | relative ⇒ match b with [ relative ⇒ true | _ ⇒ false ]
66      | addr11 ⇒ match b with [ addr11 ⇒ true | _ ⇒ false ]
67      | addr16 ⇒ match b with [ addr16 ⇒ true | _ ⇒ false ]
68      ].
69
70(* to avoid expansion... *)
71nlet rec is_a (d:addressing_mode_tag) (A:addressing_mode) on d ≝
72  match d with
73   [ direct ⇒ match A with [ DIRECT _ ⇒ true | _ ⇒ false ]
74   | indirect ⇒ match A with [ INDIRECT _ ⇒ true | _ ⇒ false ]
75   | ext_indirect ⇒ match A with [ EXT_INDIRECT _ ⇒ true | _ ⇒ false ]
76   | register ⇒ match A with [ REGISTER _ ⇒ true | _ ⇒ false ]
77   | acc_a ⇒ match A with [ ACC_A ⇒ true | _ ⇒ false ]
78   | acc_b ⇒ match A with [ ACC_B ⇒ true | _ ⇒ false ]
79   | dptr ⇒ match A with [ DPTR ⇒ true | _ ⇒ false ]
80   | data ⇒ match A with [ DATA _ ⇒ true | _ ⇒ false ]
81   | data16 ⇒ match A with [ DATA16 _ ⇒ true | _ ⇒ false ]
82   | acc_dptr ⇒ match A with [ ACC_DPTR ⇒ true | _ ⇒ false ]
83   | acc_pc ⇒ match A with [ ACC_PC ⇒ true | _ ⇒ false ]
84   | ext_indirect_dptr ⇒ match A with [ EXT_INDIRECT_DPTR ⇒ true | _ ⇒ false ]
85   | indirect_dptr ⇒ match A with [ INDIRECT_DPTR ⇒ true | _ ⇒ false ]
86   | carry ⇒ match A with [ CARRY ⇒ true | _ ⇒ false ]
87   | bit_addr ⇒ match A with [ BIT_ADDR _ ⇒ true | _ ⇒ false ]
88   | n_bit_addr ⇒ match A with [ N_BIT_ADDR _ ⇒ true | _ ⇒ false ]
89   | relative ⇒ match A with [ RELATIVE _ ⇒ true | _ ⇒ false ]
90   | addr11 ⇒ match A with [ ADDR11 _ ⇒ true | _ ⇒ false ]
91   | addr16 ⇒ match A with [ ADDR16 _ ⇒ true | _ ⇒ false ]].
92
93
94nlet rec is_in n (l: Vector addressing_mode_tag n) (A:addressing_mode) on l : bool ≝
95 match l return λm.λ_:Vector addressing_mode_tag m.bool with
96  [ VEmpty ⇒ false
97  | VCons m he (tl: Vector addressing_mode_tag m) ⇒
98     is_a he A ∨ is_in ? tl A ].
99
100ndefinition bool_to_Prop ≝
101 λb. match b with [ true ⇒ True | false ⇒ False ].
102
103nrecord subaddressing_mode (n) (l: Vector addressing_mode_tag (S n)) : Type[0] ≝
104 { subaddressing_modeel:> addressing_mode;
105   subaddressing_modein: bool_to_Prop (is_in ? l subaddressing_modeel)
106 }.
107
108ncoercion subaddressing_mode : ∀n.∀l:Vector addressing_mode_tag (S n).Type[0]
109 ≝ subaddressing_mode on _l: Vector addressing_mode_tag (S ?) to Type[0].
110
111ncoercion mk_subaddressing_mode :
112 ∀n.∀l:Vector addressing_mode_tag (S n).∀a:addressing_mode.
113  ∀p:bool_to_Prop (is_in ? l a).subaddressing_mode n l
114 ≝ mk_subaddressing_mode on a:addressing_mode to subaddressing_mode ? ?.
115
116ninductive jump (A: Type[0]): Type[0] ≝
117  JC: A → jump A
118| JNC: A → jump A
119| JB: [[bit_addr]] → A → jump A
120| JNB: [[bit_addr]] → A → jump A
121| JBC: [[bit_addr]] → A → jump A
122| JZ: A → jump A
123| JNZ: A → jump A
124| CJNE:
125   [[acc_a]] × [[direct; data]] ⊎ [[register; indirect]] × [[data]] → A → jump A
126| DJNZ: [[register ; direct]] → A → jump A.
127
128ninductive preinstruction (A: Type[0]) : Type[0] ≝
129   ADD: [[acc_a]] → [[ register ; direct ; indirect ; data ]] → preinstruction A
130 | ADDC: [[acc_a]] → [[ register ; direct ; indirect ; data ]] → preinstruction A
131 | SUBB: [[acc_a]] → [[ register ; direct ; indirect ; data ]] → preinstruction A
132 | INC: [[ acc_a ; register ; direct ; indirect ; dptr ]] → preinstruction A
133 | DEC: [[ acc_a ; register ; direct ; indirect ]] → preinstruction A
134 | MUL: [[acc_a]] → [[acc_b]] → preinstruction A
135 | DIV: [[acc_a]] → [[acc_b]] → preinstruction A
136 | DA: [[acc_a]] → preinstruction A
137
138 (* logical operations *)
139 | ANL:
140   [[acc_a]] × [[ register ; direct ; indirect ; data ]] ⊎
141   [[direct]] × [[ acc_a ; data ]] ⊎
142   [[carry]] × [[ bit_addr ; n_bit_addr]] → preinstruction A
143 | ORL:
144   [[acc_a]] × [[ register ; data ; direct ; indirect ]] ⊎
145   [[direct]] × [[ acc_a ; data ]] ⊎
146   [[carry]] × [[ bit_addr ; n_bit_addr]] → preinstruction A
147 | XRL:
148   [[acc_a]] × [[ data ; register ; direct ; indirect ]] ⊎
149   [[direct]] × [[ acc_a ; data ]] → preinstruction A
150 | CLR: [[ acc_a ; carry ; bit_addr ]] → preinstruction A
151 | CPL: [[ acc_a ; carry ; bit_addr ]] → preinstruction A
152 | RL: [[acc_a]] → preinstruction A
153 | RLC: [[acc_a]] → preinstruction A
154 | RR: [[acc_a]] → preinstruction A
155 | RRC: [[acc_a]] → preinstruction A
156 | SWAP: [[acc_a]] → preinstruction A
157
158 (* data transfer *)
159 | MOV:
160    [[acc_a]] × [[ register ; direct ; indirect ; data ]] ⊎
161    [[ register ; indirect ]] × [[ acc_a ; direct ; data ]] ⊎
162    [[direct]] × [[ acc_a ; register ; direct ; indirect ; data ]] ⊎
163    [[dptr]] × [[data16]] ⊎
164    [[carry]] × [[bit_addr]] ⊎
165    [[bit_addr]] × [[carry]] → preinstruction A
166 | MOVC: [[acc_a]] → [[ acc_dptr ; acc_pc ]] → preinstruction A
167 | MOVX:
168    [[acc_a]] × [[ ext_indirect ; ext_indirect_dptr ]] ⊎
169    [[ ext_indirect ; ext_indirect_dptr ]] × [[acc_a]] → preinstruction A
170 | SETB: [[ carry ; bit_addr ]] → preinstruction A
171 | PUSH: [[direct]] → preinstruction A
172 | POP: [[direct]] → preinstruction A
173 | XCH: [[acc_a]] → [[ register ; direct ; indirect ]] → preinstruction A
174 | XCHD: [[acc_a]] → [[indirect]] → preinstruction A
175
176 (* program branching *)
177 | Jump: jump A → preinstruction A
178 | ACALL: [[addr11]] → preinstruction A
179 | LCALL: [[addr16]] → preinstruction A
180 | RET: preinstruction A
181 | RETI: preinstruction A
182 | AJMP: [[addr11]] → preinstruction A
183 | LJMP: [[addr16]] → preinstruction A
184 | SJMP: [[relative]] → preinstruction A
185 | JMP: [[indirect_dptr]] → preinstruction A
186 | NOP: preinstruction A.
187
188ndefinition instruction ≝ preinstruction [[relative]].
189
190ninductive labelled_instruction: Type[0] ≝
191   Instruction: instruction → labelled_instruction
192 | Cost: String → labelled_instruction
193 | Jmp: String → labelled_instruction
194 | Call: String → labelled_instruction
195 | Mov: [[dptr]] → String → labelled_instruction
196 | Label: String → labelled_instruction
197 | WithLabel: jump String → labelled_instruction.
198
199ndefinition preamble ≝ list (String × nat).
200
201ndefinition assembly_program ≝ preamble × (list labelled_instruction).
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