source: Deliverables/D4.1/ASMInterpret.mli @ 454

Last change on this file since 454 was 454, checked in by sacerdot, 9 years ago

CSC + Nicolas + Dominic:

1) back-porting of changes by Nicolas from the compiler
2) new file ASMCosts to compute the cost of labels
3) several changes here and there to implement 2)

File size: 2.9 KB
Line 
1open BitVectors;;
2open Physical;;
3
4exception CodeTooLarge
5
6type time = int;;
7type line = [ `P1 of byte
8            | `P3 of byte
9            | `SerialBuff of [ `Eight of byte
10                             | `Nine of BitVectors.bit * byte
11                             ]
12            ];;
13
14val string_of_line: line -> string;;
15
16type epsilon = int;;
17
18(* In:  reception time, line of input, new continuation,
19   Out: transmission time, output line, expected duration until reply,
20        new continuation.
21*)
22type continuation =
23  [`In of time * line * epsilon * continuation] option *
24  [`Out of (time -> line -> time * continuation) ];;
25
26type status =
27{
28  (* Memory *)
29  code_memory: WordMap.map;        (* can be reduced *)
30  low_internal_ram: Byte7Map.map;
31  high_internal_ram: Byte7Map.map;
32  external_ram: WordMap.map;
33
34  (* Program counter *)
35  pc: word;
36
37  (* SFRs *)
38  sp: byte;
39  dpl: byte;
40  dph: byte;
41  pcon: byte;
42  tcon: byte;
43  tmod: byte;
44  tl0: byte;
45  tl1: byte;
46  th0: byte;
47  th1: byte;
48  p1: byte;
49  scon: byte;
50  sbuf: byte;
51  ie: byte;
52  p3: byte;
53  ip: byte;
54  psw: byte;
55  acc: byte;
56  b: byte;
57  t2con: byte;   (* 8052 only *)
58  rcap2l: byte;  (* 8052 only *)
59  rcap2h: byte;  (* 8052 only *)
60  tl2: byte;     (* 8052 only *)
61  th2: byte;     (* 8052 only *)
62
63  (* Latches for the output lines *)
64  p1_latch: byte;
65  p3_latch: byte;
66
67  (* Fields for tracking the state of the processor. *)
68 
69  (* IO specific *)
70  previous_p1_val: bool;
71  previous_p3_val: bool;
72
73  serial_epsilon_out: epsilon option;
74  serial_epsilon_in: epsilon option;
75
76  io_epsilon: epsilon;
77
78  serial_v_in: [`Eight of byte | `Nine of (BitVectors.bit * byte) ] option;
79  serial_v_out: [`Eight of byte | `Nine of (BitVectors.bit * byte) ] option;
80
81  serial_k_out: continuation option;
82
83  io: continuation;
84  expected_out_time: [ `None | `Now | `At of time ];
85
86  (* Timer and clock specific *)
87  clock: time;
88  timer0: word;
89  timer1: word;
90  timer2: word;  (* can be missing *)
91
92  esi_running: bool;
93  t0i_running: bool;
94  t1i_running: bool;
95  e0i_running: bool;
96  e1i_running: bool;
97  es_running: bool;
98}
99
100val string_of_status: status -> string
101
102module WordMap: Map.S with type key = BitVectors.word
103
104type labelled_memory = BitVectors.byte list * string WordMap.t * bool (* has main *)
105
106val assembly:
107 [< ASM.labelled_instruction] ASM.program ->
108  (*ASM.instruction list * symbol_table *) labelled_memory
109
110(*
111val link:
112 (ASM.instruction list * symbol_table * cost_map) list -> BitVectors.byte list
113*)
114
115val initialize: status
116
117val load_code_memory: BitVectors.byte list -> Physical.WordMap.map
118val load_mem: Physical.WordMap.map -> status -> status
119val load: BitVectors.byte list -> status -> status
120
121exception Halt  (* to be raised to stop execution *)
122
123(* the callback function is used to observe the execution
124   trace; it can raise Hold to stop execution. Otherwise
125   the processor never halts. *)
126val execute: (status -> unit) -> status -> status
127
128val fetch: Physical.WordMap.map -> word -> ASM.instruction * word * int
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