source: Deliverables/D4.1/ASMInterpret.mli @ 195

Last change on this file since 195 was 195, checked in by mulligan, 10 years ago

Added printout of processor status when we enter the infinite SJMP loop
at the end. Need to add printout of register status, though. Every
other important SFR, etc. is already implemented.

File size: 2.1 KB
Line 
1open BitVectors;;
2open Physical;;
3
4exception CodeTooLarge
5
6type time = int;;
7type line = [ `P1 of byte
8            | `P3 of byte
9            | `SerialBuff of [ `Eight of byte | `Nine of BitVectors.bit * byte ]];;
10
11val string_of_line: line -> string;;
12(* In:  reception time, line of input, new continuation,
13   Out: transmission time, output line, expected duration until reply,
14        new continuation.
15*)
16type continuation =
17  [`In of time * line * continuation] option *
18  [`Out of (time -> line -> time * continuation) ]
19
20type status = private
21 { code_memory: WordMap.map;        (* can be reduced *)
22   low_internal_ram: Byte7Map.map;
23   high_internal_ram: Byte7Map.map;
24   external_ram: WordMap.map;       (* can be reduced *)
25
26   pc: word;
27
28   (* sfr *)
29   sp: byte;
30   dpl: byte;
31   dph: byte;
32   pcon: byte;
33   tcon: byte;
34   tmod: byte;
35   tl0: byte;
36   tl1: byte;
37   th0: byte;
38   th1: byte;
39   p1: byte;
40   p1_latch: byte;
41   scon: byte;
42   sbuf: byte;
43   ie: byte;
44   p3: byte;
45   p3_latch: byte;
46   ip: byte;
47   psw: byte;
48   acc: byte;
49   b: byte;
50   t2con: byte; (* 8052 only *)
51   rcap2l: byte; (* 8052 only *)
52   rcap2h: byte; (* 8052 only *)
53   tl2: byte; (* 8052 only *)
54   th2: byte; (* 8052 only *)
55
56   clock: time;
57   timer0: word;
58   timer1: word;
59   timer2: word;  (* can be missing *)
60   expected_out_time: [ `None | `Now | `At of time ];
61   io: continuation
62 }
63
64val string_of_status: status -> string
65
66module IntMap: Map.S with type key = int
67
68val assembly:
69 ASM.labelled_instruction list -> BitVectors.byte list (*ASM.instruction list * symbol_table *) * string IntMap.t
70
71(*
72val link:
73 (ASM.instruction list * symbol_table * cost_map) list -> BitVectors.byte list
74*)
75
76val initialize: status
77
78val load_mem: Physical.WordMap.map -> status -> status
79val load: BitVectors.byte list -> status -> status
80
81exception Halt  (* to be raised to stop execution *)
82
83(* the callback function is used to observe the execution
84   trace; it can raise Hold to stop execution. Otherwise
85   the processor never halts. *)
86val execute: (status -> unit) -> status -> status
87
88val fetch: Physical.WordMap.map -> word -> ASM.instruction * word * int
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