1 | |
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2 | (** This module defines the operators and branch conditions of the |
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3 | MIPS processor. *) |
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4 | |
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5 | (* Pasted from Pottier's PP compiler *) |
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6 | |
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7 | (* These type definitions document the target processor's operators |
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8 | and branch conditions. Here, the target processor is the MIPS. *) |
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9 | |
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10 | (* The MIPS manual explains that some instructions are actual machine |
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11 | instructions, while others are pseudo-instructions, which are |
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12 | expanded away by the assembler. Do we need to be aware of the |
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13 | distinction? |
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14 | |
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15 | Ignoring the distinction is interesting. There are several |
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16 | processors in the MIPS family, and the distinction between actual |
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17 | instructions and pseudo-instructions might vary with the |
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18 | processor. For instance, a future member of the MIPS family might |
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19 | implement more instructions in hardware than its predecessors. |
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20 | |
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21 | On the other hand, ignoring the distinction means that we cannot |
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22 | use the hardware register [$at], which is reserved by the assembler |
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23 | for translating some pseudo-instructions into actual instructions. |
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24 | |
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25 | Our approach is to follow standard practice and to exploit |
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26 | pseudo-instructions when desired. This means that we cannot use |
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27 | register [$at]. *) |
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28 | |
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29 | (* Immediate constants, used in the definition of some operators. They |
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30 | must fit in 16 bits. *) |
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31 | |
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32 | type immediate16 = |
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33 | int32 |
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34 | |
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35 | (* Offsets, used as part of addressing modes. They are measured in |
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36 | bytes and must fit in 16 bits. *) |
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37 | |
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38 | type offset = |
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39 | immediate16 |
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40 | |
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41 | (* Unary (integer arithmetic) operators. *) |
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42 | |
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43 | type unop = |
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44 | | UOpAddi of immediate16 |
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45 | | UOpSlti of immediate16 (* set on less than immediate *) |
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46 | | UOpSltiu of immediate16 |
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47 | | UOpAndi of immediate16 |
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48 | | UOpOri of immediate16 |
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49 | | UOpXori of immediate16 |
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50 | | UOpNeg |
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51 | | UOpNot |
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52 | |
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53 | (* Binary (integer arithmetic or integer comparison) operators. Among |
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54 | the comparison operators, only [OpLt] corresponds to a MIPS binary |
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55 | comparison instruction, namely [slt]. All others correspond to |
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56 | pseudo-instructions. They are exploited because they are |
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57 | convenient. *) |
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58 | |
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59 | type binop = |
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60 | | OpAdd |
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61 | | OpSub |
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62 | | OpMul |
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63 | | OpDiv |
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64 | | OpDivu |
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65 | | OpModu |
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66 | | OpLt |
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67 | | OpLtu |
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68 | | OpLe |
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69 | | OpLeu |
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70 | | OpGt |
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71 | | OpGtu |
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72 | | OpGe |
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73 | | OpGeu |
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74 | | OpEq |
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75 | | OpNe |
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76 | | OpSllv |
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77 | | OpSrav |
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78 | | OpSrlv |
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79 | | OpAnd |
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80 | | OpOr |
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81 | | OpXor |
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82 | |
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83 | (* Unary branch conditions. *) |
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84 | |
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85 | type uncon = |
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86 | |
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87 | (* Greater than or equal to zero. *) |
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88 | |
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89 | | UConGez |
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90 | |
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91 | (* Greater than zero. *) |
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92 | |
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93 | | UConGtz |
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94 | |
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95 | (* Less than or equal to zero. *) |
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96 | |
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97 | | UConLez |
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98 | |
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99 | (* Less than zero. *) |
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100 | |
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101 | | UConLtz |
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102 | |
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103 | (* Binary branch conditions. *) |
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104 | |
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105 | and bincon = |
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106 | |
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107 | (* Equal. *) |
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108 | |
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109 | | ConEq |
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110 | |
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111 | (* Not equal. *) |
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112 | |
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113 | | ConNe |
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